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JPH0528497B2 - - Google Patents
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JPH0528497B2 - - Google Patents

Info

Publication number
JPH0528497B2
JPH0528497B2 JP25813685A JP25813685A JPH0528497B2 JP H0528497 B2 JPH0528497 B2 JP H0528497B2 JP 25813685 A JP25813685 A JP 25813685A JP 25813685 A JP25813685 A JP 25813685A JP H0528497 B2 JPH0528497 B2 JP H0528497B2
Authority
JP
Japan
Prior art keywords
semiconductor substrate
diode
integrated circuit
manufacturing
ion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP25813685A
Other languages
Japanese (ja)
Other versions
JPS62117337A (en
Inventor
Yoshuki Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP25813685A priority Critical patent/JPS62117337A/en
Publication of JPS62117337A publication Critical patent/JPS62117337A/en
Publication of JPH0528497B2 publication Critical patent/JPH0528497B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention] 【発明の属する技術分野】[Technical field to which the invention pertains]

本発明は、イオン注入あるいは反応性イオンエ
ツチング、プラズマエツチングなどのドライエツ
チングのように半導体基板にイオンを衝突させる
技術を用いて行う半導体集積回路の製造方法に関
する。
The present invention relates to a method of manufacturing a semiconductor integrated circuit using a technique of bombarding a semiconductor substrate with ions, such as ion implantation or dry etching such as reactive ion etching or plasma etching.

【従来技術とその問題点】[Prior art and its problems]

イオン注入あるいはドライエツチングの工程に
おいて、半導体基板にイオンを衝突させると、イ
オンの衝撃により半導体結晶の格子欠陥を生じ、
表面状態が悪くなるためその後の微細加工が不可
能になり、また集積される素子も所望の特性が得
られなくなる。
During the ion implantation or dry etching process, when ions are bombarded with a semiconductor substrate, the ion bombardment causes lattice defects in the semiconductor crystal.
Since the surface condition deteriorates, subsequent microfabrication becomes impossible, and desired characteristics cannot be obtained from the integrated elements.

【発明の目的】[Purpose of the invention]

本発明は、上述の問題を解決してイオンの衝突
により半導体基板の放射損傷を防止して微細加工
を行う半導体集積回路の製造方法を提供すること
を目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit in which microfabrication is performed while preventing radiation damage to a semiconductor substrate due to ion collisions by solving the above-mentioned problems.

【発明の要点】 本発明は、イオン衝突による損傷がダイオード
を構成する半導体基板に生ずるとダイオードの逆
方向特性が劣化することを利用するもので、集積
回路の製造に用いられる半導体基板の一部にモニ
タ用ダイオードを形成し、そのダイオードの逆方
向特性を測定し、逆方向特性の劣化により半導体
基板の放射損傷を検知した場合はイオンを用いる
工程の条件を制御することにより、イオン衝突に
よる損傷を防止して上記の目的を達成する。
Summary of the Invention The present invention utilizes the fact that the reverse characteristic of a diode deteriorates when damage caused by ion bombardment occurs to the semiconductor substrate constituting the diode. A monitoring diode is formed in the semiconductor substrate, and the reverse characteristics of the diode are measured. If radiation damage to the semiconductor substrate is detected due to deterioration of the reverse characteristics, damage caused by ion collision can be detected by controlling the conditions of the process using ions. To achieve the above objectives by preventing

【発明の実施例】[Embodiments of the invention]

第1図は本発明の一実施例において、集積回路
の半導体基板内に形成されたモニタ用ダイオード
を示し、N形シリコン基板1に設けられたPウエ
ル2内にN層3が存在する。Pウエル2内にはま
たP+コンタクト層4がC字状に設けられている。
Pウエル2は、例えばCMOS構造Pウエルと、
N層3、P+層4はNチヤネルMOS、Pチヤネル
MOSのソースまたはドレイン領域と同じ拡散工
程で作成することができる。N層3、P+層4に
は酸化膜5の開口部においてAlよりなるカソー
ド電極6、アノード電極7が接触し、両電極はそ
れぞれカソード端子8、アノード端子9に結合さ
れている。集積回路の製造の際、カソード端子
8、アノード端子9間にカソード端子を正とする
電圧を印加してモニタダイオードの逆方向特性を
測定する。そして逆方向特性の劣化によりシリコ
ン基板に対する放射損傷が許容限度を超えている
ことが判れば、機能特性試験を行うことなくその
製造ロツトの集積回路を不良とすることができ
る。そして次の製造ロツトよりイオン注入あるい
はドライエツチングの作業条件の制御、例えばイ
オン加速電圧を低減することにより放射損傷の発
生しないようにすることができる。
FIG. 1 shows a monitoring diode formed in a semiconductor substrate of an integrated circuit in one embodiment of the present invention, in which an N layer 3 is present in a P well 2 provided in an N type silicon substrate 1. FIG. A P + contact layer 4 is also provided in the P well 2 in a C-shape.
The P-well 2 is, for example, a CMOS structure P-well,
N layer 3 and P + layer 4 are N channel MOS, P channel
It can be created using the same diffusion process as the source or drain region of a MOS. A cathode electrode 6 and an anode electrode 7 made of Al are in contact with the N layer 3 and the P + layer 4 at the openings of the oxide film 5, and both electrodes are connected to a cathode terminal 8 and an anode terminal 9, respectively. When manufacturing an integrated circuit, a voltage is applied between the cathode terminal 8 and the anode terminal 9 with the cathode terminal being positive, and the reverse characteristics of the monitor diode are measured. If it is determined that the radiation damage to the silicon substrate exceeds the permissible limit due to deterioration of the reverse characteristics, the integrated circuit in that manufacturing lot can be rejected without performing a functional characteristics test. From the next production lot, it is possible to prevent radiation damage from occurring by controlling the working conditions of ion implantation or dry etching, for example by reducing the ion accelerating voltage.

【発明の効果】【Effect of the invention】

本発明は、集積回路の半導体基板にモニタダイ
オードを設けてイオン注入やドライエツチング工
程での放射損傷のモニタリングをダイオードの逆
方向特性により行うもので、モニタ用試料を別に
つくる必要がなく、放射損傷が許容限度以下であ
れば同一半導体基板内に製造された集積回路はそ
のまま製品として用いることができるため、生産
管理上有利であり、信頼性高い集積回路の製造に
与える効果は極めて大きい。
The present invention provides a monitor diode on the semiconductor substrate of an integrated circuit, and monitors radiation damage during ion implantation and dry etching processes using the diode's reverse characteristics.There is no need to prepare a separate monitor sample, and radiation damage can be monitored. If it is below the allowable limit, integrated circuits manufactured on the same semiconductor substrate can be used as products as they are, which is advantageous in terms of production control, and has an extremely large effect on the manufacture of highly reliable integrated circuits.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるモニタダイ
オードを示し、aは表面酸化膜を除いて示した平
面図、bは断面図である。 1:シリコン基板、2:Pウエル層、5:酸化
膜、6:カソード電極、7:アノード電極、8:
カソード端子、9:アノード端子。
FIG. 1 shows a monitor diode in one embodiment of the present invention, in which a is a plan view with the surface oxide film removed, and b is a cross-sectional view. 1: Silicon substrate, 2: P well layer, 5: Oxide film, 6: Cathode electrode, 7: Anode electrode, 8:
Cathode terminal, 9: Anode terminal.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板にイオンを衝突させる工程を含む
半導体集積回路の製造方法において、半導体基板
にモニタ用ダイオードを形成し、該ダイオードの
逆方向特性を測定してイオンの衝突による半導体
基板の損傷を検知することを特徴とする半導体集
積回路の製造方法。
1. In a method for manufacturing a semiconductor integrated circuit that includes a step of bombarding a semiconductor substrate with ions, a monitoring diode is formed on the semiconductor substrate, and the reverse characteristics of the diode are measured to detect damage to the semiconductor substrate due to ion bombardment. A method for manufacturing a semiconductor integrated circuit, characterized by:
JP25813685A 1985-11-18 1985-11-18 Manufacture of semiconductor integrated circuit Granted JPS62117337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25813685A JPS62117337A (en) 1985-11-18 1985-11-18 Manufacture of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25813685A JPS62117337A (en) 1985-11-18 1985-11-18 Manufacture of semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS62117337A JPS62117337A (en) 1987-05-28
JPH0528497B2 true JPH0528497B2 (en) 1993-04-26

Family

ID=17316013

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25813685A Granted JPS62117337A (en) 1985-11-18 1985-11-18 Manufacture of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS62117337A (en)

Also Published As

Publication number Publication date
JPS62117337A (en) 1987-05-28

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