JPH0528526B2 - - Google Patents
Info
- Publication number
- JPH0528526B2 JPH0528526B2 JP60081128A JP8112885A JPH0528526B2 JP H0528526 B2 JPH0528526 B2 JP H0528526B2 JP 60081128 A JP60081128 A JP 60081128A JP 8112885 A JP8112885 A JP 8112885A JP H0528526 B2 JPH0528526 B2 JP H0528526B2
- Authority
- JP
- Japan
- Prior art keywords
- signal
- alc
- circuit
- power
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Control Of Amplification And Gain Control (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はALC回路に係わり、送信機出力を入
力して分配増幅後合成するハイブリツド構成の電
力増幅回路から前段の送信機にALC信号を送出
するALC回路に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an ALC circuit, in which an ALC signal is sent to a previous-stage transmitter from a hybrid configuration power amplifier circuit that inputs a transmitter output, divides and amplifies it, and then synthesizes it. Regarding the ALC circuit.
第１図に示す前段の送信機２の出力を後段のリ
ニヤアンプ１で増幅して大電力を得てアンテナ回
路から送信するにはリニヤアンプ１に設けた電力
増幅器A1〜Aoが適切なダイナミツクレンジで動
作するようにリニヤアンプ１に設けたALC回路
５から出力されるALC信号をALC端子１ｃを介
して、前段の送信機２のALC端子２ａへ送出す
る。ALC端子２ａのALC信号により送信機２か
らリニヤアンプ１へ送出されていた不適切に大き
な高周波信号は適切なレベルの高周波信号に補正
される。図中符号３は第１のハイブリツド回路で
構成される信号電力分配器、４は第２のハイブリ
ツド回路で構成される信号電力合成器である。増
幅された高周波信号電力は端子１ｂからアンテナ
回路（図示しない）を介して送信される。
In order to amplify the output of the transmitter 2 at the front stage shown in Fig. 1 by the linear amplifier 1 at the rear stage to obtain a large amount of power and transmit it from the antenna circuit, the power amplifiers A 1 to A o provided in the linear amplifier 1 have appropriate dynamics. The ALC signal output from the ALC circuit 5 provided in the linear amplifier 1 to operate in the range is sent to the ALC terminal 2a of the transmitter 2 at the previous stage via the ALC terminal 1c. The inappropriately large high frequency signal sent from the transmitter 2 to the linear amplifier 1 is corrected to a high frequency signal of an appropriate level by the ALC signal at the ALC terminal 2a. In the figure, reference numeral 3 denotes a signal power divider composed of a first hybrid circuit, and numeral 4 denotes a signal power combiner composed of a second hybrid circuit. The amplified high frequency signal power is transmitted from the terminal 1b via an antenna circuit (not shown).
上記のような従来のALC回路では電力増幅器
A1〜Aoが持つそれぞれの動作曲線相互の不一致
に対するレスポンスが不十分であり、場合によつ
ては他の正常な電力増幅器A1〜Aoおよび信号電
力分配器３、信号電力合成器４等の周辺回路の回
路素子を損傷する恐れがある。 In conventional ALC circuits like the one above, the power amplifier
The response to the mismatch between the respective operating curves of A 1 to A o is insufficient, and in some cases, other normal power amplifiers A 1 to A o , signal power divider 3, and signal power combiner 4 There is a risk of damaging circuit elements in peripheral circuits such as
本発明は上述した点に鑑みなされたものでハイ
ブリツド回路を用いた信号電力分配器および信号
電力合成器に係わる電力増幅器を適切に制御でき
るALC回路の提供を目的とする。
The present invention has been made in view of the above points, and an object of the present invention is to provide an ALC circuit that can appropriately control a power amplifier related to a signal power divider and a signal power combiner using a hybrid circuit.
本発明には信号電力分配器へ入力される高周波
信号を検波して第１信号を出力する第１の検波器
および信号電力合成器で合成された高周波信号電
力を検波して第２信号を出力する第２の検波器が
設けてある。また、第２信号を第１信号のレベル
まで減衰する減衰手段を設ける。第１信号と減衰
手段で減衰した第２信号とを差動増幅器の２つの
入力端子に入力する。この差動増幅器の出力を
ALC信号として前段の送信機にフイードバツク
させるよう構成してある。
The present invention includes a first detector that detects a high frequency signal input to a signal power divider and outputs a first signal, and a signal power combiner that detects the combined high frequency signal power and outputs a second signal. A second detector is provided to Further, attenuation means is provided for attenuating the second signal to the level of the first signal. The first signal and the second signal attenuated by the attenuation means are input to two input terminals of the differential amplifier. The output of this differential amplifier is
It is configured to feed back to the previous stage transmitter as an ALC signal.
第２図は本発明の一実施例のALC回路図であ
り、図面に基づいて詳細に説明する。図中、第１
図と同一符号は同一構成であり、説明は省略す
る。６は第１の検波器、７は第２の検波器であ
る。８は第２の検波器７の出力を減衰する減衰
器、９は第１の検波器６の出力と減衰器８の出力
を入力する差動増幅器である。
FIG. 2 is an ALC circuit diagram of an embodiment of the present invention, and will be explained in detail based on the drawing. In the figure, the first
The same reference numerals as those in the drawings indicate the same configurations, and the explanation will be omitted. 6 is a first detector, and 7 is a second detector. 8 is an attenuator that attenuates the output of the second wave detector 7, and 9 is a differential amplifier that inputs the output of the first wave detector 6 and the output of the attenuator 8.
第１の検波器６は入力側をリニヤアンプ１の端
子１ａと接続しており、前段の送信機２から出力
される高周波信号電力を第１の検波器６で検波し
て第１信号として差動増幅器９の一方の入力側へ
送出する。第２の検波器７の入力側は端子１ｂと
接続され、信号電力合成器４で合成された高周波
信号電力を検波する。検波された信号は減衰器８
で減衰し第２信号として差動増幅器９の他方の端
子へ入力される。減衰器８は第１信号と減衰され
た第２信号が総べての動作域で常に同一となるよ
う構成する。差動増幅器９は一方の入力側の第１
信号と他方の入力側の第２信号との間でレベル差
が生じた時にALC信号を出力してALC端子１ｃ
を経由して前段の送信機２の２ａ端子へ負帰還さ
せる。 The input side of the first detector 6 is connected to the terminal 1a of the linear amplifier 1, and the first detector 6 detects the high frequency signal power output from the transmitter 2 in the previous stage and outputs a differential signal as the first signal. It is sent to one input side of amplifier 9. The input side of the second wave detector 7 is connected to the terminal 1b, and detects the high frequency signal power combined by the signal power combiner 4. The detected signal is sent to an attenuator 8
The signal is attenuated and inputted to the other terminal of the differential amplifier 9 as a second signal. The attenuator 8 is configured so that the first signal and the attenuated second signal are always the same over the entire operating range. The differential amplifier 9 has a first
When a level difference occurs between the signal and the second signal on the other input side, the ALC signal is output and the ALC terminal 1c is output.
Negative feedback is made to the 2a terminal of the transmitter 2 at the previous stage via the .
ここで、電力増幅器A1〜Aoの動作曲線が同一
のとき、入力された高周波信号電力P1と電力増
幅回路で増幅して合成された高周波信号電力P2
が比例関係にある０〜E1、０〜E2のレベルで動
作していると仮定する。この場合は高周波信号電
力P1を検波した第１信号と、高周波信号電力P2
を検波して減衰させた第２信号の差が０の直線上
にある。入力された高周波信号電力P10〜E1のE1
レベルより大きいE1′になつたとき、高周波信号
電力P2がサチレートして０〜E2の延長上にあつ
て比例関係である大きなE2′レベルに達しないと
きは第１信号D1と高周波信号電力P2を検波して
減衰させた第２信号D2の差が０の直線は第１信
号D1の０〜E1レベル範囲を超えると折線となる。
即ちこの折線部分は差が０ではない直線である。
このため第２信号D2が０〜E1レベル以内になる
よう入力された高周波信号電力P1を０〜E1レベ
ルまで降下するフイードバツクループが形成され
る。 Here, when the operating curves of power amplifiers A 1 to A o are the same, the input high frequency signal power P 1 and the high frequency signal power P 2 amplified and synthesized by the power amplifier circuit
Assume that the signals are operating at levels of 0 to E 1 and 0 to E 2 , which are in a proportional relationship. In this case, the first signal obtained by detecting the high frequency signal power P 1 and the high frequency signal power P 2
The difference between the detected and attenuated second signals lies on a straight line of 0. Input high frequency signal power P 1 0 ~ E 1 of E 1
When the high-frequency signal power P 2 saturates and does not reach the large E 2 ' level, which is an extension of 0 to E 2 and has a proportional relationship, the first signal D 1 and A straight line with a difference of 0 in the second signal D 2 obtained by detecting and attenuating the high-frequency signal power P 2 becomes a broken line when it exceeds the 0 to E 1 level range of the first signal D 1 .
That is, this broken line portion is a straight line in which the difference is not zero.
Therefore, a feedback loop is formed that lowers the input high frequency signal power P1 to the 0 to E1 level so that the second signal D2 falls within the 0 to E1 level.
又、電力増幅器A1〜Aoの１つが故障とすると
高周波信号電力P1とハイブリツド構成の電力増
幅回路の出力の高周波信号電力P2との比例関係
が０〜E1レベルり低い０〜E1″レベルに対応した
０〜E2″レベルに限られるので高周波信号電力P1
は０〜E1″レベルとなるように制御される。高周
波信号電力P1を更に低くしても第１信号D1と第
２信号D2の差が０とならないときは高周波信号
電力P1は限りなく０に近ずく。 Furthermore, if one of the power amplifiers A 1 to A o fails, the proportional relationship between the high frequency signal power P 1 and the high frequency signal power P 2 of the output of the hybrid power amplifier circuit is 0 to E , which is lower than the 0 to E level. 1 ″ level corresponding to 0~E 2 ″ level, so the high frequency signal power P 1
is controlled to be at a level of 0 to E 1 ''.If the difference between the first signal D 1 and the second signal D 2 does not become 0 even if the high frequency signal power P 1 is further lowered, the high frequency signal power P 1 is extremely close to 0.
本発明は以上詳述したようにハイブリツド構成
の電力増幅回路に入力される高周波信号電力と出
力側高周波信号とが比例関係にある部分でのみ動
作するようになつているから並列運転される第
１、第２、……、第ｎの電力増幅器の一つが故障
を起こしても直ちにALCの動作点を変更して比
例する迄ALC動作を行う。このためハイブリツ
ド回路等の関連回路部品の損傷を未然に防止でき
る効果がある。
As described in detail above, the present invention operates only in the portion where the high frequency signal power input to the hybrid power amplifier circuit and the output side high frequency signal are in a proportional relationship. Even if one of the , second, . This has the effect of preventing damage to related circuit components such as hybrid circuits.
第１図は従来のALC回路に係わるブロツク図、
第２図は本発明になるALC回路のブロツク図で
ある。
１……リニヤアンプ、１ｃ……ALC出力端子、
２……送信機、２ａ……ALC入力端子、３……
信号電力分配器、４……信号電力合成器、５……
ALC回路、６……第１の検波器、７……第２の
検波器、８……減衰器、９……差動増幅器、A1
〜Ao……電力増幅器。
Figure 1 is a block diagram of a conventional ALC circuit.
FIG. 2 is a block diagram of an ALC circuit according to the present invention. 1...Linear amplifier, 1c...ALC output terminal,
2...Transmitter, 2a...ALC input terminal, 3...
Signal power divider, 4...Signal power combiner, 5...
ALC circuit, 6...First detector, 7...Second detector, 8...Attenuator, 9...Differential amplifier, A 1
~A o ...Power amplifier.
Claims (1)
て、複数の回路に分配して増幅した信号を合成し
て出力するハイブリツド構成の電力増幅回路は、
入力側の信号を分岐して第１信号を出力させる第
１検波器と、出力側の信号を分岐して第１信号と
同じレベルの第２信号を出力させる第２検波器と
減衰器とを直列に接続した回路と、第１信号及び
第２信号を入力する差動増幅器とからなるALC
回路を備えて、前記差動増幅器の出力をALC信
号として前記送信機に負帰還させるよう構成し
て、第１信号に対して第２信号の増幅度が飽和す
るか、前記電力増幅回路の異常により第１信号と
第２信号にレベル差を生じた時にALC信号を出
力して送信電力の増幅度が一定になるALC制御
を行うことを特徴とするALC回路。1 A power amplifier circuit with a hybrid configuration that inputs the output of a transmitter with an ALC control function, and synthesizes and outputs the amplified signal by distributing it to multiple circuits,
A first detector that branches the input side signal and outputs the first signal, and a second detector and attenuator that branches the output side signal and outputs the second signal having the same level as the first signal. ALC consists of a series-connected circuit and a differential amplifier that inputs the first and second signals.
the output of the differential amplifier is configured to provide negative feedback to the transmitter as an ALC signal, and detects whether the amplification degree of the second signal is saturated with respect to the first signal or there is an abnormality in the power amplifier circuit. An ALC circuit characterized in that when a level difference occurs between a first signal and a second signal, the ALC circuit outputs an ALC signal and performs ALC control such that the amplification degree of transmission power is constant.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8112885A JPS61239708A (en) | 1985-04-16 | 1985-04-16 | Alc circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8112885A JPS61239708A (en) | 1985-04-16 | 1985-04-16 | Alc circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61239708A JPS61239708A (en) | 1986-10-25 |
| JPH0528526B2 true JPH0528526B2 (en) | 1993-04-26 |
Family
ID=13737753
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8112885A Granted JPS61239708A (en) | 1985-04-16 | 1985-04-16 | Alc circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61239708A (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52136546A (en) * | 1976-05-11 | 1977-11-15 | Nec Corp | Automatic power control system |
| JPS5828924B2 (en) * | 1976-12-08 | 1983-06-18 | 松下電器産業株式会社 | automatic gain control device |
-
1985
- 1985-04-16 JP JP8112885A patent/JPS61239708A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61239708A (en) | 1986-10-25 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |