JPH0528916B2 - - Google Patents
Info
- Publication number
- JPH0528916B2 JPH0528916B2 JP6510286A JP6510286A JPH0528916B2 JP H0528916 B2 JPH0528916 B2 JP H0528916B2 JP 6510286 A JP6510286 A JP 6510286A JP 6510286 A JP6510286 A JP 6510286A JP H0528916 B2 JPH0528916 B2 JP H0528916B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- waveguide layer
- current confinement
- active waveguide
- external
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010410 layer Substances 0.000 claims description 126
- 239000011241 protective layer Substances 0.000 claims description 21
- 238000005253 cladding Methods 0.000 claims description 15
- 238000004519 manufacturing process Methods 0.000 claims description 15
- 239000004065 semiconductor Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 description 9
- 239000002184 metal Substances 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/12—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region the resonator having a periodic structure, e.g. in distributed feedback [DFB] lasers
- H01S5/125—Distributed Bragg reflector [DBR] lasers
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Semiconductor Lasers (AREA)
Description
【発明の詳細な説明】
「産業上の利用分野」
この発明は、光通信等に用いられる分布反射型
半導体レーザの製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a method of manufacturing a distributed reflection semiconductor laser used in optical communications and the like.
「従来の技術」
長手方向に連続形成されている外部導波路層中
に活性導波路層を埋め込み、さらに、活性導波路
層と外部導波路層との間の電界分布の整合をと
り、これにより、結合部でのレーザ光の反射を極
めて低減させ、なおかつ、注入電流が活性導波路
層に集中的に供給されるように電流狭窄層を設け
た分布反射型半導体レーザが開発され効果をあげ
ている。"Prior art" An active waveguide layer is embedded in an external waveguide layer formed continuously in the longitudinal direction, and the electric field distribution between the active waveguide layer and the external waveguide layer is matched. A distributed reflection semiconductor laser has been developed and has proven effective, with a current confinement layer that greatly reduces the reflection of laser light at the coupling part and also provides a current confinement layer so that the injected current is concentratedly supplied to the active waveguide layer. There is.
第２図は、上記構成による分布反射型半導体レ
ーザの構成を示す断面斜視図である。 FIG. 2 is a cross-sectional perspective view showing the structure of the distributed reflection type semiconductor laser having the above structure.
図において、１はｐ−InP基板、２はｐ−InP
バツフア層、３はλg＝1.55μmのInGaAsP活性導
波路層、４はλg＝1.0〜1.2μmのｎ−InGaAsP（ま
たはｎ−InP）保護層、５はλg＝1.3〜1.4μmのｎ
−InGaAsP外部導波路層、６はｎ−InPクラツド
層、７はSiO2絶縁層、８は金属電極、９は金属
電極８用の窓部、１０は分布クラツド反射器（回
折格子）である。また、１１〜１３は各々埋込層
を構成するｎ−InP層、ｐ−InP層およびｎ−
InGaAsP層であり、２０，２０はＰ−InPによつ
て形成されている電流狭窄層である。 In the figure, 1 is a p-InP substrate, 2 is a p-InP substrate
Buffer layer, 3 is an InGaAsP active waveguide layer with λg = 1.55 μm, 4 is an n-InGaAsP (or n-InP) protective layer with λg = 1.0 to 1.2 μm, and 5 is an n-type layer with λg = 1.3 to 1.4 μm.
-InGaAsP external waveguide layer, 6 is an n-InP cladding layer, 7 is a SiO 2 insulating layer, 8 is a metal electrode, 9 is a window for the metal electrode 8, and 10 is a distributed cladding reflector (diffraction grating). Further, 11 to 13 are an n-InP layer, a p-InP layer, and an n-InP layer constituting a buried layer, respectively.
It is an InGaAsP layer, and 20 and 20 are current confinement layers formed of P-InP.
ここで、上記構成において、
ns：ｐ−InP基板１およびｎ−InPクラツ
ド層６の屈折率
nact：活性導波路層３の屈折率
ncov：保護層４の屈折率
next：外部導波路層５の屈折率
tact：活性導波路層３の厚さ
tcov：保護層４の厚さ
text：外部導波路層５の厚さ
とした場合に、
nact＞next＞ncov≧ns ……(1)
となるようにし、かつ、この条件のもとで各層の
物質組成および厚さtact、tcov、textを適切に設
定することにより、伝播定数および電界分布の整
合を得ることが可能となる。そして、実験結果に
よれば、活性導波路層３と外部導波路層５との間
の結合効率を90％以上、100％に近い値とするこ
とができる。 Here, in the above configuration, ns: refractive index of p-InP substrate 1 and n-InP cladding layer 6 nact: refractive index of active waveguide layer 3 ncov: refractive index of protective layer 4 next: refractive index of outer waveguide layer 5 Refractive index tact: Thickness of active waveguide layer 3 tcov: Thickness of protective layer 4 text: Thickness of outer waveguide layer 5, nact>next>ncov≧ns...(1) , and by appropriately setting the material composition and thicknesses tact, tcov, and text of each layer under this condition, it becomes possible to match the propagation constant and electric field distribution. According to experimental results, the coupling efficiency between the active waveguide layer 3 and the external waveguide layer 5 can be set to a value of 90% or more and close to 100%.
また、電流狭窄層２０があるために、活性導波
路層３以外の領域における基板１と金属電極８と
の間には、pnpnサイリスタ構造が形成され、こ
の部分に流れる電流が阻止される。すなわち、リ
ーク電流が発生せず、注入電流が活性導波路層に
集中して流れ、極めて効率の良い発振が行なわれ
る。 Further, because of the current confinement layer 20, a pnpn thyristor structure is formed between the substrate 1 and the metal electrode 8 in the region other than the active waveguide layer 3, and current flowing in this region is blocked. That is, no leakage current is generated, the injection current flows concentratedly in the active waveguide layer, and extremely efficient oscillation is performed.
このように、第２図に示す構成によれば、活性
導波路層３と外部導波路層５との間の結合を極め
て良好に行うことができるから、反射や散乱等の
発生をほとんどなくすことができ、これによつ
て、高効率で高安定な単一モードのレーザ発振を
行うことができるとともに、注入電流が集中的に
活性導波路層に供給されるから、高効率の発振を
行うことができる。 As described above, according to the configuration shown in FIG. 2, the coupling between the active waveguide layer 3 and the external waveguide layer 5 can be achieved extremely well, so that the occurrence of reflection, scattering, etc. can be almost eliminated. As a result, highly efficient and highly stable single mode laser oscillation can be performed, and since the injected current is intensively supplied to the active waveguide layer, highly efficient oscillation can be performed. I can do it.
なお、第２図に示す構成において各層の導電性
（ｐ型とｎ型）を反転させても、全く同様の効果
が得られる。ただし、この場合にはキヤツプ層と
拡散領域とが必要になる。 Note that even if the conductivity (p-type and n-type) of each layer is reversed in the configuration shown in FIG. 2, exactly the same effect can be obtained. However, in this case a cap layer and a diffusion region are required.
次に、第２図に示す分布反射型半導体レーザの
製造方法について、第Ｂ図を参照して説明する。 Next, a method for manufacturing the distributed reflection type semiconductor laser shown in FIG. 2 will be explained with reference to FIG. B.
まず、第３図イに示すように、一回目の成長工
程としてバツフア層２上に活性導波路層３と保護
層４を順次エピタキシヤル成長によつて形成し、
次いで、レーザ光軸方向中央部以外の部分をバツ
フア層に至るまでエツチングして分布ブラツグ反
射器１０，１０を作成し、その後に同図ロに示す
ように外部導波路層５を成長させる（２回目の成
長工程）。そして、活性導波路層３の上方に対応
する外部導波路層５の上面にSiO2絶縁膜を形成
し、その後に、３回目の成長工程として電流狭窄
層２０をエピタキシヤル成長させる（第３図ハ参
照）。次に、SiO2絶縁膜を除去した後に４回目の
成長工程として、同図ニに示すようにｎ−InPク
ラツド層６を成長させると成形が完了し、その後
は通常の方法によつて低電流駆動及び横モード安
定のための埋込成長を行い、さらに絶縁層７、金
属電極８を形成することによつて、一連の製造工
程が終了する。 First, as shown in FIG. 3A, as a first growth step, an active waveguide layer 3 and a protective layer 4 are sequentially formed on the buffer layer 2 by epitaxial growth.
Next, the portions other than the central portion in the direction of the laser optical axis are etched down to the buffer layer to create distributed blur reflectors 10, 10, and then the external waveguide layer 5 is grown as shown in FIG. second growth process). Then, an SiO 2 insulating film is formed on the upper surface of the external waveguide layer 5 corresponding to the upper part of the active waveguide layer 3, and then, as a third growth step, a current confinement layer 20 is epitaxially grown (Fig. 3). (see c). Next, after removing the SiO 2 insulating film, as a fourth growth step, an n-InP cladding layer 6 is grown as shown in Fig. A series of manufacturing steps is completed by performing buried growth for drive and transverse mode stability, and further forming an insulating layer 7 and a metal electrode 8.
「発明が解決しようとする問題点」
ところで、上述した従来の半導体レーザの製造
方法においては、第３図イ，ロ，ハ，ニに示す４
回のエピタキシヤル成長工程（埋込成長工程を含
むと５回）があるが、この成長工程は少ないほど
作業効率がよい。また、１つの成長工程から次の
成長工程へ移る際には、フオトリソグラフイや選
択エツチングを行うために、素子を外部に出す必
要があるが、素子は外部雰囲気中において悪影響
を受けることが多いため、素子の取り出し回数が
多いほど歩どまりは悪くなる。"Problems to be Solved by the Invention" By the way, in the conventional semiconductor laser manufacturing method described above, the problems 4 shown in FIG.
There are three epitaxial growth steps (five times including the buried growth step), and the fewer these growth steps, the better the work efficiency. Furthermore, when moving from one growth process to the next, it is necessary to take the device outside to perform photolithography and selective etching, but the device is often adversely affected by the external atmosphere. Therefore, the greater the number of times the elements are taken out, the worse the yield becomes.
すなわち、成長工程数を減らして素子の取り出
し回数を減らした方が、歩どまりおよび作業効率
の点で有利となる。 That is, reducing the number of growth steps and the number of times elements are taken out is advantageous in terms of yield and work efficiency.
この発明は上述した事情に鑑みてなされたもの
で、エピタキシヤル成長工程数を少なくし得る分
布反射型半導体レーザの製造方法を提供すること
を目的としている。 The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a method for manufacturing a distributed reflection type semiconductor laser that can reduce the number of epitaxial growth steps.
「問題点を解決するための手段」
上記問題点を解決するために、活性導波路層お
よびこの活性導波路層上に形成される保護層を包
むようにして形成される外部導波路層と、この外
部導波路層上に形成されるクラツド層と、このク
ラツド層と前記外部導波路層との間の所定の領域
に設けられ前記外部導波路層とは逆導電性の電流
狭窄層とを有する分布反射型半導体レーザの製造
方法において、基板またはバツフア層上に前記活
性導波路層および前記保護層を順次成長させ、そ
の後にエツチングにより前記活性導波路層と前記
保護層の所定部分以外を除去するとともに所定部
分以外の前記基板またはバツフア層上に分布ブラ
ツグ反射器を形成し、次いで、分布ブラツグ反射
器および前記保護層上に前記外部導波路層と前記
電流狭窄層を順次成長させ、その後において前記
活性導波路層の上方に対応する部分の前記電流狭
窄層をエツチングにより除去するようにしてい
る。"Means for Solving the Problems" In order to solve the above problems, an external waveguide layer formed so as to surround an active waveguide layer and a protective layer formed on the active waveguide layer, Distributed reflection comprising a cladding layer formed on a waveguide layer, and a current confinement layer provided in a predetermined region between the cladding layer and the external waveguide layer and having conductivity opposite to that of the external waveguide layer. In a method for manufacturing a type semiconductor laser, the active waveguide layer and the protective layer are sequentially grown on a substrate or a buffer layer, and then the active waveguide layer and the protective layer are removed by etching other than predetermined portions, and a predetermined portion of the active waveguide layer and the protective layer are removed by etching. A distributed bragg reflector is formed on the substrate or the buffer layer other than the active guide layer, and then the external waveguide layer and the current confinement layer are sequentially grown on the distributed bragg reflector and the protective layer. The portion of the current confinement layer corresponding to the upper part of the waveguide layer is removed by etching.
「作用」
外部導波路層の成長と電流狭窄層の成長とが順
次連続して行なわれ、その後において、電流狭窄
層の所定部分のみが除去されるから、成長工程数
を少なくすることができる。"Operation" Since the growth of the external waveguide layer and the growth of the current confinement layer are performed successively and subsequently, only a predetermined portion of the current confinement layer is removed, the number of growth steps can be reduced.
「実施例」
以下、図面を参照してこの発明の実施例につい
て説明する。"Embodiments" Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第１図イ〜ハは各々この発明の一実施例である
製造工程を説明するための断面図である。 FIGS. 1A to 1C are cross-sectional views for explaining the manufacturing process of an embodiment of the present invention.
まず、第１図イに示すように、ｐ−InPバツフ
ア層２上にInGaAsP活性導波路層３およびｎ−
InP保護層４を順次エピタキシヤル成長させる。
この成長工程が第１回目の成長工程である。次
に、フオトリソグラフイと、選択エツチングによ
り、活性導波路層３と保護層４の中央部以外を除
去するとともに、分布ブラツグ反射器（回折格
子）１０を形成する。ここまでは、従来方法と同
様である。そして、第２回目の成長工程として、
第１図ロに示すように、分布ブラツグ反射器１０
および保護層４の上面にｎ−InGaAsP外部導波
路層５を成長させ、さらに、外部導波路層５の上
面全面にｐ−InP電流狭窄層２０を成長させる。
次に、電流狭窄層２０のうち、活性導波路層３の
上方に対応する領域部分を、フオトリソグラフイ
により除去し、その後において、第３回目の成長
工程として第１図ハに示すように、ｎ−InPクラ
ツド層６を成長させる。さらに、絶縁膜７、金属
電極８を形成すれば、一連の製造工程が終了す
る。すなわち、この実施例によれば、埋込成長も
含めて合計４回の成長工程で素子の形成が完了す
る。 First, as shown in FIG. 1A, an InGaAsP active waveguide layer 3 and an n-
InP protective layer 4 is epitaxially grown in sequence.
This growth step is the first growth step. Next, by photolithography and selective etching, the active waveguide layer 3 and the protective layer 4 are removed except for the central portion, and a distributed bragged reflector (diffraction grating) 10 is formed. The process up to this point is the same as the conventional method. Then, as the second growth process,
As shown in FIG.
Then, an n-InGaAsP external waveguide layer 5 is grown on the top surface of the protective layer 4, and a p-InP current confinement layer 20 is further grown on the entire top surface of the external waveguide layer 5.
Next, a region of the current confinement layer 20 corresponding to the upper part of the active waveguide layer 3 is removed by photolithography, and then, as a third growth step, as shown in FIG. Grow n-InP cladding layer 6. Further, by forming the insulating film 7 and the metal electrode 8, the series of manufacturing steps is completed. That is, according to this embodiment, the formation of the element is completed in a total of four growth steps including the buried growth.
なお、第１図ロに示す２回目の成長時におい
て、ｐ−InP電流狭窄層２０の上面に同図ニに示
すように格子整合させたInGaAsP4元層３０を成
長させ、この層によつて電流狭窄層２０を保護す
るようにし、成長炉から取り出し後、まず、層３
０を選択エツチングにより取り除き、次にフオト
リソグラフイ及び選択エツチングで活性導波路層
３の上方に対応する電流狭窄層２０を除去しても
よい。すなわち、電流狭窄層２０を構成している
ｐ−InPは、外部雰囲気中の熱によつてＰ成分が
飛んでしまうことがあるが、層３０があるとこれ
が防止されるため、ガスエツチのないきれいなｐ
−InP電流狭窄層の表面を露出させることができ
る。 In addition, during the second growth shown in FIG. After removing the constriction layer 20 from the growth furnace, the layer 3 is first removed.
0 may be removed by selective etching, and then the current confinement layer 20 corresponding to the upper part of the active waveguide layer 3 may be removed by photolithography and selective etching. In other words, the P component of the p-InP constituting the current confinement layer 20 may be blown away by the heat in the external atmosphere, but the layer 30 prevents this, so it is clean and free of gas etch. p
-The surface of the InP current confinement layer can be exposed.
また、この実施例における各層の導電性（ｐ，
ｎ）を反対にしても、まつたく同様の効果を得る
ことができ、さらに、バツフア層２を設けず、基
板１の上に活性導波路層３、分布ブラツグ反射器
１０を設ける場合においても、全く同様の製造工
程とすることができる。 Furthermore, the conductivity (p,
Even if n) is reversed, the same effect can be obtained. Furthermore, even when the buffer layer 2 is not provided and the active waveguide layer 3 and the distributed bragg reflector 10 are provided on the substrate 1, Exactly the same manufacturing process can be used.
「発明の効果」
以上説明したように、この発明によれば、活性
導波路層およびこの活性導波路層上に形成される
保護層を包むようにして形成される外部導波路層
と、この外部導波路層上に形成されるクラツド層
と、このクラツド層と前記外部導波路層との間の
所定の領域に設けられ前記外部導波路層とは逆導
電性の電流狭窄層とを有する分布反射型半導体レ
ーザの製造方法において、基板またはバツフア層
上に前記活性導波路層および前記保護層を順次成
長させ、その後に選択エツチングにより前記活性
導波路層と前記保護層の所定部分以外を除去する
とともに、所定部分以外の前記基板またはバツフ
ア層上に分布ブラツグ反射器を形成し、次いで、
前記分布ブラツグ反射器および前記保護層上に前
記外部導波路層と前記電流狭窄層を順次成長さ
せ、その後において前記活性導波路層の上方に対
応する部分の前記電流狭窄層をエツチングにより
除去するようにしたので、エピタキシヤル成長工
程を従来の方法に比べて１回少なくし得る利点が
得られる。"Effects of the Invention" As explained above, according to the present invention, there is provided an external waveguide layer formed so as to surround an active waveguide layer and a protective layer formed on the active waveguide layer, A distributed reflection type semiconductor having a cladding layer formed on the cladding layer, and a current confinement layer provided in a predetermined region between the cladding layer and the external waveguide layer and having a conductivity opposite to that of the external waveguide layer. In a method for manufacturing a laser, the active waveguide layer and the protective layer are sequentially grown on a substrate or a buffer layer, and then selective etching is performed to remove the active waveguide layer and the protective layer other than a predetermined portion. forming a distributed Bragg reflector on the substrate or buffer layer other than the portion;
The external waveguide layer and the current confinement layer are sequentially grown on the distributed blur reflector and the protective layer, and then the current confinement layer in a portion corresponding to the upper part of the active waveguide layer is removed by etching. This has the advantage that the number of epitaxial growth steps can be reduced by one compared to the conventional method.
第１図イ〜ニは各々この発明の一実施例を適用
した製造工程を説明するための断面図、第２図は
電流狭窄層を設けた分布反射型半導体レーザの構
成を示す断面斜視図、第３図イ〜ニは各々従来の
製造方法における製造工程を説明するための断面
図である。
１……基板、２……バツフア層、３……活性導
波路層、４……保護層、５……外部導波路層、６
……クラツド層、１０……分布ブラツグ反射器、
２０……電流狭窄層。
1A to 1D are cross-sectional views for explaining the manufacturing process to which an embodiment of the present invention is applied, and FIG. 2 is a cross-sectional perspective view showing the configuration of a distributed reflection semiconductor laser provided with a current confinement layer. FIGS. 3A to 3D are cross-sectional views for explaining the manufacturing steps in the conventional manufacturing method. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Buffer layer, 3... Active waveguide layer, 4... Protective layer, 5... External waveguide layer, 6
... Cladding layer, 10 ... Distributed Bragg reflector,
20...Current confinement layer.
Claims (1)
成される保護層を包むようにして形成される外部
導波路層と、この外部導波路層上に形成されるク
ラツド層と、このクラツド層と前記外部導波路層
との間の所定の領域に設けられ前記外部導波路層
とは逆導電性の電流狭窄層とを有する分布反射型
半導体レーザの製造方法において、基板または前
記基板上のバツフア層上に前記活性導波路層およ
び前記保護層を順次成長させ、その後に前記活性
導波路層と前記保護層の所定部分以外を除去する
とともに所定部分以外の前記基板またはバツフア
層上に前記分布ブラツグ反射器を形成し、次い
で、前記分布ブラツグ反射器および前記保護層上
に前記外部導波路層と前記電流狭窄層を順次成長
させ、その後において前記活性導波路層の上方に
対応する部分の前記電流狭窄層を除去した後にク
ラツド層を成長させることを特徴とする分布反射
型半導体レーザの製造方法。1 an external waveguide layer formed to enclose an active waveguide layer and a protective layer formed on the active waveguide layer; a cladding layer formed on the external waveguide layer; and a cladding layer and the external waveguide layer. In a method for manufacturing a distributed reflection semiconductor laser having a current confinement layer provided in a predetermined region between a waveguide layer and a current confinement layer having a conductivity opposite to that of the external waveguide layer, The active waveguide layer and the protective layer are sequentially grown, and then the active waveguide layer and the protective layer are removed except for predetermined portions, and the distributed Bragg reflector is formed on the substrate or buffer layer other than the predetermined portions. and then sequentially growing the external waveguide layer and the current confinement layer on the distributed Bragg reflector and the protective layer, and then growing the current confinement layer in a portion corresponding to above the active waveguide layer. A method of manufacturing a distributed reflection type semiconductor laser, which comprises growing a cladding layer after removing the cladding layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6510286A JPS6323382A (en) | 1986-03-24 | 1986-03-24 | Manufacture of distributed-reflection type semiconductor laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6510286A JPS6323382A (en) | 1986-03-24 | 1986-03-24 | Manufacture of distributed-reflection type semiconductor laser |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6323382A JPS6323382A (en) | 1988-01-30 |
| JPH0528916B2 true JPH0528916B2 (en) | 1993-04-27 |
Family
ID=13277205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6510286A Granted JPS6323382A (en) | 1986-03-24 | 1986-03-24 | Manufacture of distributed-reflection type semiconductor laser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6323382A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5163355B2 (en) * | 2008-08-08 | 2013-03-13 | 富士通株式会社 | Semiconductor laser device |
| WO2023248412A1 (en) * | 2022-06-23 | 2023-12-28 | 日本電信電話株式会社 | Wavelength-variable laser, wavelength-variable laser module, and method for producing layered structure of wavelength-variable laser |
-
1986
- 1986-03-24 JP JP6510286A patent/JPS6323382A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6323382A (en) | 1988-01-30 |
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