JPH0529138B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to MOS integrated circuit devices, and in particular to improving the structure of bonding pads on semiconductor chips that are connected to lead terminals by thin metal wires.
Regarding MOS integrated circuit devices.

[Conventional technology]

Conventionally, in this type of MOS integrated circuit device,
In response to the situation where the metal conductor that becomes the bonding pad spreads due to the pressure applied when bonding a thin metal wire to the bonding pad, the distance between the metal conductor that becomes the bonding pad and the metal conductor that becomes the wiring is adjusted. Generally, it is set with sufficient margin.

What is shown in FIGS. 3 and 4 is the conventional
FIG. 2 is a structural plan view and a structural cross-sectional view showing an example of the relationship between a metal conductor serving as a bonding pad and a metal conductor serving as a wiring in a MOS integrated circuit device.
FIG. 4 is a cross-sectional view of the structure taken along line C-D in the structural plan view of FIG. is provided. The distance Y between the metal conductor 9 that will become the bonding pad and the metal conductor 8 that will become the wiring is determined by the pressure when bonding the thin metal wires.
The distance is set at a sufficient distance so that the metal conductor 8, which becomes the wiring, will not be short-circuited even if it spreads.

[Problem that the invention seeks to solve]

In the structure of the bonding pad in the conventional MOS integrated circuit device described above, a thin metal wire is used as the arrangement relationship between the metal conductor that becomes the bonding pad and the metal conductor that becomes the wiring provided on the oxide film of the semiconductor substrate. In consideration of the spread of the metal conductor that will become the bonding pad due to the pressure during bonding, it is necessary to place the metal conductor that will become the wiring at a certain distance. For this reason, there is a lot of waste in the utilization of area on the semiconductor substrate, which has a large effect on the expansion of the area of the entire MOS integrated circuit device, and has the disadvantage that it cannot cope with the reduction in chip size to a smaller area. There is.

[Means for solving problems]

In the MOS integrated circuit device of the present invention, a predetermined buried layer is provided in a region corresponding to the arrangement position of a metal conductor serving as a bonding pad, and an oxide film is removed corresponding to the region, and the oxide film is removed. [Embodiment] Next, the present invention will be described with reference to the drawings, comprising a semiconductor substrate on which a step is formed, and a metal conductor that becomes the bonding pad disposed on the buried layer. explain.

1 and 2 are a partial structural plan view and a structural cross-sectional view, respectively, of an embodiment of the present invention. The structural cross-sectional view in FIG. 2 is a structural cross-sectional view taken along line A-B of the structural plan view in FIG.
A buried layer 2 is provided in a region corresponding to the location of the metal 4 that will become the bonding pad. As shown in FIG. 2, the oxide film 3 on the semiconductor substrate 1 is removed through a contact process over a predetermined area corresponding to the placement position of the metal conductor 4 that will become the bonding pad, and the oxide film 3 is removed from the contact process. A stepped structure is formed. A metal conductor 4 serving as a bonding pad is placed on the buried layer 2 so as to be housed within the stepped structure of the oxide film 3.
On the other hand, the metal conductor 5 serving as the wiring is arranged on the oxide film 3 as in the conventional case. Therefore, even if the metal conductor 4 that becomes the bonding pad spreads due to the pressure when bonding thin metal wires, the oxide film 3
Because of the wall caused by the step difference, there is no possibility of short circuiting to the metal conductor 5 that becomes the wiring. Therefore, the distance X between the metal conductor 4 serving as the bonding pad and the metal conductor 5 serving as the wiring in FIG. 2 is shortened to the maximum compared to the distance Y in the conventional example shown in FIG. becomes possible.

〔Effect of the invention〕

As explained above, the present invention eliminates wasted area on the semiconductor substrate by providing a predetermined step structure between the metal conductor of the bonding pad and the metal conductor of the wiring, thereby contributing to reduction in semiconductor chip size. This has the effect of being able to contribute.

[Brief explanation of the drawing]

1 and 2 are a partial structural plan view and a structural cross-sectional view, respectively, of an embodiment of the present invention, and FIG. 3 and 4 are partial structural plan views, respectively, of a conventional MOS integrated circuit device. FIG. 3 is a diagram and a structural cross-sectional view. In the figure, 1, 6...semiconductor substrate, 2... buried layer, 3, 7... oxide film, 4, 9... metal conductor that will become a bonding pad, 5, 8... metal conductor that will become wiring.

[Claims]

1. A two-layer gate structure in which a field oxide film and a doped polysilicon film are formed as a first gate on a silicon substrate, and a second gate is installed on a silicon dioxide film formed to cover the doped polysilicon film. In the semiconductor device, the second gate includes a phosphorus-doped polysilicon film and a molybdenum silicide film, which are sequentially provided on the silicon dioxide film, and a PSG film or a BPSG film is placed on the molybdenum silicide film. A semiconductor device characterized in that the PSG film or BPSG film is installed, and only a portion corresponding to a bonding pad portion of the PSG film or BPSG film is opened by etching, and an aluminum film or an aluminum/silicon film is provided in that portion. .