JPH0543205B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a gain control amplifier, and particularly to a novel configuration thereof.

[Conventional technology]

FIG. 3 shows a conventional gain control amplifier. In the figure, 1 and 2 are differential input terminals, 3, 4, 12 to 17, 20, and 21 are transistors, 5, 6, 25, and 26 are resistors, 7 is a constant current source, and 23 is a variable current source. Above input terminal 1,
2 are NPN transistors 3, 12 and 4, respectively.
The transistors 3 and 4 and the transistors 12 and 13 constitute two differential circuits. Resistors 5 and 6 are connected to the emitters of transistors 3 and 4, respectively.
The other ends of 6 are commonly connected and connected to a constant current source 7. Further, the emitters of the transistors 12 and 13 are commonly connected and further connected to a variable current source 23 for gain control. Further, the collectors of the transistors 3 and 12 are commonly connected and connected to a first current ramie 18, and the collectors of the other transistors 4 and 13 are commonly connected and connected to a current mirror 19.

The first current mirror 18 is composed of PNP transistors 14 and 15, and the collector of the transistor 14 is connected to the second current mirror 22. The second current mirror 22 consists of NPN transistors 20 and 21, and the transistor 21
The collector is connected to the collector of the PNP transistor 17 constituting the other first current mirror 19, and serves as an output terminal 27. Between the power supply 29 and the output terminal 27 and between the output terminal 27 and
The resistors 25 and 26 inserted between the GND 30 are used to provide the operating potential of the output terminal, and in this conventional example, it is set to (1/2) Vcc when there is no signal.

Next, the operation will be explained. Now input terminals 1 and 2
Consider the case where a voltage Vi is applied between.
Assuming that the bias current value of constant current source 7 is IA, and the gain control current value of variable current source 23 is IB,
The current values flowing through transistors 3, 4, 12, and 13 are (IA/2−I ₁ ), (IA/2+I ₁ ), respectively.
(IB/2-I ₂ ) and (IB/2+I ₂ ). Here I ₁ ,
I ₂ is the signal current generated when a voltage of Vi is applied between input terminals 1 and 2, and when Vi = 0, I ₁ = I ₂ =
It is 0.

Next, the currents flowing through the two first current mirrors 18 and 19 are respectively (IA+IB)/2−Io and (IA
+IB)/2+Io. The relationship Io = I ₁ + I ₂ holds true. Also, the current flowing out from the collector of the transistor 14 of the current mirror 18 (IA+IB)/
2-Io passes through the second current mirror 22 to the collector of the transistor 21 (IA+IB)/2-
A current of Io flows. On the other hand, since the current flowing through the current mirror 19 is (IA+IB)/2+Io, the output current flowing to the output terminal 27 is 2Io. Here, if the values of the differential resistances 5 and 6 at the input section are r, and the values of the resistances 25 and 26 at the output section are R, then the input voltage
The relationship of each signal current to Vi is shown as Vi=kT/q1n (IA/2+I ₁ /IA/2-I ₁ )+2rI ₁ , Vi=kT/q1n (IB/2+I ₁ /IB/2-I ₁ ). On the other hand, the output terminal 27 has (1/2) Vcc as the center, and the output voltage Vo becomes Vo=RIo, and Vo=R(I ₁ +I ₂ ).

Now considering the time when IB=0, at Vi=kT/q1n (IA/2+I ₁ /IA/2-I ₁ )+2rI ₁ , kT/q1n (IA/2+I ₁ /IA/2-I ₁ )<< If r is set large so that 2rI ₁ , Vi≒2rI ₁ . accordingly
Vo=RI ₁ = (R/2r)Vi, so the gain is R/2r
It is expressed as On the other hand, if we consider the case where IA is increased and IA<<IB, it is expressed as Vo=RI ₂ , Vi=kT/q1n (IB/2+I ₁ /IB/2-I ₁ ), and the value of IB is By changing this, the gain of this amplifier can be changed.

[Problem that the invention seeks to solve]

Since the conventional gain control amplifier is configured as described above, it has the disadvantage that calculation of the gain setting value for the gain control current is complicated, and the gain fluctuates with respect to the input voltage.

Therefore, when signal processing is performed in parallel using a plurality of gain control amplifiers, there is a problem that linearity cannot be obtained between each signal system.

This invention was made in order to solve the above-mentioned problems, and it is possible to simply calculate the gain setting value for the gain control current, and also to provide gain control with good linearity without gain fluctuations with respect to the gain control current. The purpose is to obtain an amplifier.

[Means for solving problems]

The gain control amplifier according to this invention includes:
a first differential transistor whose base is connected to the first input terminal; a second differential transistor whose base is connected to the second input terminal; and one end connected to the emitter of the first differential transistor. a first resistor, a second resistor whose one end is connected to the emitter of the second differential transistor, and whose other end is connected to the other end of the first transistor; a first diode having a constant current source connected thereto, a first diode as a load connected to the collector of the first differential transistor, and a second diode as a load connected to the collector of the second differential transistor; a differential amplifier circuit, a third differential transistor whose base is connected to the collector of the first differential transistor, whose base is connected to the collector of the second differential transistor, and whose emitter is connected to the third differential transistor. a fourth differential transistor connected to the emitters of the third and fourth differential transistors, a variable current source connected to the emitters of the third and fourth differential transistors, and a first current mirror connected to the collector of the third differential transistor. circuit, a second current mirror circuit connected to the collector of the fourth differential transistor and having an output node connected to the output terminal of the gain cotonroll amplifier;
is connected to the output node of the current mirror circuit of
There is a circuit configured by two differential amplifier circuits, a second differential amplifier circuit having a third current mirror circuit whose output node is connected to the output terminal of the gain control amplifier.

[Effect]

In this invention, the first differential amplifier circuit includes:
The input voltage is converted into a current, further converted into a logarithmically compressed voltage by a diode, and transmitted to the second differential amplifier circuit. Since this voltage is also a voltage obtained by logarithmically compressing the current flowing through the first current mirror of the second differential amplifier circuit, in the second differential amplifier circuit,
By changing the bias current, the gain is changed to output a linear output current.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows the operating principle of a gain control amplifier according to one embodiment of the present invention and an example of a circuit applied to DC amplification, and FIG. 2 shows another embodiment in which the present invention is applied to AC amplification. In the figure, 1,
2 is a differential input terminal, 3, 4, 12 to 17, 20,
21 is a transistor, 8 and 9 are diodes, 5,
6 and 26 are resistors, 7 is a bias current source (constant current source), 23 is a gain control current source (variable current source), and 24 is a reference voltage source.

The differential input terminals 1 and 2 are connected to the bases of NPN transistors 3 and 4, respectively, and the transistors 3 and 4, the diodes 8 and 9, and the resistors 5 and 4.
6 constitutes a first differential amplifier circuit 100. Resistors 5 and 6 are connected to the emitters of transistors 3 and 4, respectively.
The other ends are connected to each other and to a constant current source 7 for bias. In addition, the collectors of transistors 3 and 4 are connected to diodes 8 and 4, respectively.
9 to the power supply 29, and the second
It is connected to the bases of NPN transistors 12 and 13 forming a differential amplifier circuit 110.

This second differential amplifier circuit 110 includes second current mirrors 18 and 19, and a third current mirror 2.
2. It is composed of a gain control current source 23 and NPN transistors 12 and 13, and the emitters of these transistors 12 and 13 are commonly connected and also connected to a gain setting current source 23. Further, the collectors of the transistors 12 and 13 are connected to second current mirrors 18 and 19, respectively. The current mirror 18 is composed of PNP transistors 14 and 15, and the collector of the transistor 14 is connected to the third current mirror 22. This current mirror 22
is composed of NPN transistors 20 and 21, and the collector of the transistor 21 and the PNP transistor 1 that constitutes the second current mirror 19
7 and the inverting terminal of the operational amplifier 25 and the feedback resistor 26 . Note that this connection point is assumed to be 28.

A reference voltage source 2 is connected to the non-inverting terminal of the operational amplifier 25.
4 is connected, and a feedback resistor 26 is connected between the output terminal and the inverting terminal of the operational amplifier 25, forming a current-voltage conversion circuit 120.

FIG. 2 shows an application of this amplifier as an AC signal amplification circuit, in which the same reference numerals as in FIG. 1 indicate the same or corresponding parts. 31 and 32 are input
DC cut capacitors 33 and 34 are bias resistors of the first differential amplifier circuit 100, and 35 and 3
6, 37, 38 are the first and second current mirrors 1
Resistors 39 and 40 inserted between the emitters 8 and 19 and the power supply 29 are resistors for correcting offset. Also, 41 and 42 are resistors for providing the DC operating point of the output 28 of this amplifier, and 43
is a capacitor for separating the input of the current-voltage conversion circuit 120 in a DC manner.

Next, the operation will be explained.

In Figure 1, the voltage between input terminals 1 and 2 is
Consider the case where Vi is applied and the output of the operational amplifier 25 is displaced by Vo with respect to the reference voltage Vs of the reference voltage source 24. Here, the bias current value of the constant current source 7 is IA, and the first differential transistor 3,
The current flowing through 4 is (IA/2-Ii), respectively.
(IA/2+Ii). Further, the gain control current value of the variable current source 23 is IB, and the currents flowing through the second differential transistors 12 and 13 are (IB/2+Io) and (IB/2-Io), respectively. Also the first
Let r be the values of the resistors 5 and 6 of the differential amplifier circuit 100,
Let R be the value of the feedback resistor 26 of the current-voltage conversion circuit 120. Here, the input voltage and the first differential amplifier circuit 10
The relationship with the current flowing through 0 is expressed as Vi=kT/q1n(IA/2+Ii/IA/2-Ii)+2rIi.

Here, if the values r of the resistances 5 and 6 are set sufficiently large so that kT/q1n(IA/2+Ii/IA/2-Ii)<<2rIi, it can be considered that Vi≈2rIi.

Next, the input terminals 10 and 11 of the second differential amplifier circuit
From the figure, the potential difference between
).

Also, from the current of the second differential amplifier circuit 110, V(10)-V(11)=kT/q1n(IB/2+Io/IB/2-Io
) is also indicated.

Therefore, the relational expression Io=(IB/IA)Ii is established.
Furthermore, the current flowing to the output point 28 of this amplifier is the collector current of the transistor 17 and the transistor 2.
1, and a current of 2Io flows from the current-voltage conversion circuit 120. Therefore, the reference voltage at the output 27 of the current-voltage conversion circuit 120
The displacement amount Vo with respect to Vs can be expressed as Vo=2RIo. Here, by rearranging these equations, it can be expressed as Vo≈R/r IB/IA·Vi.

This shows that the gain changes linearly as IB changes, and that linearity exists regardless of the magnitude of the input voltage.

FIG. 2 shows another embodiment to which the gain control amplifier described above is applied, and constitutes an AC amplifier circuit. In this circuit, the current output point 28
Resistors 41 and 42 are connected to the power supply 29 side and the GND 30 side to provide a DC operating point potential. Here, if the impedance of the load is high, the current-voltage conversion amplifier in the subsequent stage may be omitted and the connection point 28 may be used as the voltage output terminal. In other words, the current-voltage conversion amplifier plays the role of a buffer that lowers the output impedance.

Also, resistors 35, 36 inserted between the emitter of the current mirror and the power supply 29 or GND 30,
37, 38, 39, and 40 are offset due to pairing errors in the differential section and current mirror used in this circuit, especially when increasing the gain.
This is to prevent the offset current from flowing into the resistors 41 and 42 that provide the DC operating point of the output when IB of the gain setting current 23 is increased, and the potential at the operating point 28 from shifting significantly. Further, since the output point 28 and the current-voltage conversion circuit are separated in terms of DC by the capacitor 43, the output 27 of the current-voltage conversion amplifier operates around the potential Vs of the reference voltage source 24, regardless of the offset. As a result,
Even if the value R of the resistor 26 that sets the gain of the current-voltage conversion circuit is increased, the output will not be saturated due to offset, and the gain can be set freely.

In the above embodiment, an example was shown in which the first and second differential amplifier circuits were configured using NPN transistors, but they may also be configured using a differential circuit using NPN transistors, similar to the above embodiment. It has the effect of

Further, in this embodiment, the case where the input section is of a differential type has been explained, but one input terminal may be fixed to a reference potential and used simply as a gain control amplifier.

Furthermore, in the above embodiment, only a single gain control amplifier is used, but multiple gain control amplifiers may be used to process multiple signals, and signals can be processed in parallel without impairing the linearity between each signal system. can be processed.

〔Effect of the invention〕

As described above, according to the gain control amplifier according to the present invention, the first differential transistor has its base connected to the first input terminal, and the second differential transistor has its base connected to the second input terminal. a first resistor having one end connected to the emitter of the first differential transistor; a first resistor having one end connected to the emitter of the second differential transistor and the other end connected to the other end of the first transistor; 2 resistors, a constant current source connected to the other ends of these first and second resistors, a first diode as a load connected to the collector of the first differential transistor, and a second differential transistor. a first differential amplifier circuit having a second diode as a load connected to its collector; a third differential transistor whose base is connected to the collector of the first differential transistor; and a second differential transistor. a fourth differential transistor whose base is connected to the collector of the transistor and whose emitter is connected to the emitter of the third differential transistor; a variable current source connected to the emitters of the third and fourth differential transistors; a first current mirror circuit connected to the collector of the third differential transistor, and a second current mirror circuit connected to the collector of the fourth differential transistor, and whose output node is connected to the output terminal of the gain control amplifier. , 1st
is connected to the output node of the current mirror circuit of
Gain calculation is easy because the circuit is configured with two differential amplifier circuits, the second differential amplifier circuit having the third current mirror circuit whose output node is connected to the output terminal of the gain control amplifier. Moreover, it has the effect of obtaining a product with good linearity.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the operating principle and a DC configuration example of a gain control amplifier according to an embodiment of the present invention, Fig. 2 is a diagram showing another embodiment of the invention, and Fig. 3 is a diagram showing a conventional gain control amplifier. It is a figure showing an example of an amplifier. In the figure, 100 is a first differential amplifier circuit;
10 is a second differential amplifier circuit, 120 is a current-voltage conversion circuit, 7 is a bias current source (constant current source), 23
is a gain control current source (variable current source), 3,
4 is the first differential transistor, 12 and 13 are the second
differential transistors, 18 and 19 are first and second current mirrors, 22 is a third current mirror,
24 is a reference voltage source, 25 is an operational amplifier (operational amplifier), and 26 is a resistor. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Claims] 1. A first differential transistor whose base is connected to a first input terminal, a second differential transistor whose base is connected to a second input terminal, and the first differential transistor described above. a first resistor having one end connected to the emitter of the second differential transistor; a second resistor having one end connected to the emitter of the second differential transistor and the other end connected to the other end of the first transistor; 1
and a constant current source connected to the other end of the second resistor.
A first differential amplifier circuit having a first diode as a load connected to the collector of the first differential transistor, and a second diode as a load connected to the collector of the second differential transistor. and a third differential transistor whose base is connected to the collector of the first differential transistor, whose base is connected to the collector of the second differential transistor, and whose emitter is connected to the emitter of the third differential transistor. a fourth differential transistor connected to;
A variable current source connected to the emitters of the third and fourth differential transistors, a first current mirror circuit connected to the collector of the third differential transistor, and a first current mirror circuit connected to the collector of the fourth differential transistor. a second current mirror circuit whose output node is connected to the output terminal of the present gain coton roll amplifier, and a second current mirror circuit whose output node is connected to the output node of the first current mirror circuit and whose output node is connected to the output terminal of the present gain control amplifier. connected third
and a second differential amplifier circuit having a current mirror circuit. 2. An output current proportional to the voltage difference between the first input terminal and the second input terminal is obtained at the output terminal of the gain control amplifier, and the gain is equal to the constant current of the first differential amplifier circuit. Claim 1, characterized in that the circuit constant is set by the ratio of the current flowing through the source and the current flowing through the variable current source of the second differential amplifier circuit. Gain control amplifier as described in section. 3 The output terminal of the gain control amplifier is connected to the other node of a current-voltage conversion circuit using an operational amplifier in which a reference voltage is input to one node and a feedback resistor is connected between the output node and the other input node. 3. The gain control amplifier according to claim 1, wherein an input terminal of the gain control amplifier is connected to the gain control amplifier. 4. The gain control amplifier according to claim 1, wherein a DC voltage is applied to the first input terminal and the second input terminal. 5. An alternating current signal is input to each of the first input terminal and the second input terminal via a capacitor, and a capacitor is connected to the gain control output terminal. The gain control amplifier according to the first or second item of the range. 6 An alternating current signal is input to each of the first input terminal and the second input terminal via a capacitor, and the gain control amplifier output terminal inputs a reference potential to one input node and outputs the output terminal. Claim 1, characterized in that the current-voltage conversion circuit is connected via a capacitor to the other input terminal of a current-voltage conversion circuit using an operational amplifier with a feedback resistor connected between the node and the other input node. Or the gain control amplifier described in Section 2.