JPH0544175B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular to a method for manufacturing a semiconductor device, in particular a method for manufacturing a semiconductor device. Without,
The present invention relates to a method of manufacturing a semiconductor device whose accuracy is preserved.

(b) Prior art and problems Patterning is performed repeatedly in the manufacturing process of semiconductor devices, and alignment marks are placed on the semiconductor substrate in advance to align the positions of these patterns. During patterning, the pattern formation position is controlled using alignment marks on the substrate as a reference.

Conventionally, for example, +,
Alternatively, a planar shape such as L is used, and concave or convex portions are formed on the surface of a silicon (Si) substrate or a silicon dioxide (SiO ₂ ) layer, or titanium (Ti), platinum (Pt), or chromium (Cr) is used. The alignment marks are formed by a method such as patterning a film such as the above.

The alignment marks formed in this way must maintain the required detection accuracy until the process such as patterning that requires them is completed.
However, the shape of the conventional alignment mark having the above-mentioned structure is often changed due to processing for manufacturing a semiconductor device. The first example is
This will be explained with reference to Figures a to c.

FIG. 1a shows a cross section of an alignment mark provided by a method of forming a recess near the surface of the Si substrate 1. As shown in FIG. This Si substrate 1 is coated with, for example, a thermal oxidation method.
If a SiO ₂ film is formed, the cross-sectional shape of the alignment mark will be blunted and reduced by the SiO ₂ film 2, as shown in FIG. 1b. after that
If the SiO ₂ film 2 is removed by etching, Figure 1c
As shown in Fig. 2, the cross-sectional shape of the recess becomes further blunted and its dimensions are enlarged.

Such a change in the shape of the alignment mark causes a decrease in alignment accuracy, and in particular, a blunted shape or an asymmetrical deformation has a large effect.

Now, in order to improve the operating speed and increase the degree of integration of semiconductor integrated circuit devices, miniaturization of patterns is being promoted, and the alignment accuracy during patterning is also decreasing, for example, in devices with dimensions of 1 μm or less. must be within ±0.5 μm. Furthermore, in order to overcome the limits of pattern accuracy due to the wave nature of light, the so-called EB direct exposure method, in which drawing is performed on a semiconductor substrate using an electron beam, is being introduced.

Detection of alignment marks in the EB direct exposure method is performed, for example, as follows. As shown in FIG. 2a, alignment marks are formed as recesses on the Si substrate 1 mounted on the stage of an electron beam exposure apparatus. If the vicinity of this mark is scanned with an electron beam, reflected electrons or secondary electrons will be detected as shown in Figure 2b.
As shown in the figure, the intensity increases at the end face of the recess and two peak values appear. The alignment reference line crosses the center position of these two peak values,
By scanning the electron beam in the two directions of the X-axis and Y-axis according to the planar shape of the alignment mark,
A reference point can be determined.

In detecting alignment marks in the EB direct exposure method using the methods described above, it is difficult to ensure the required accuracy if there are changes such as blunting of the cross-sectional shape of the marks as described above. There is a need for a method for forming alignment marks that can ignore changes in their shape during the semiconductor device manufacturing process.

(c) Purpose of the Invention The present invention provides a semiconductor device in which alignment marks arranged on a semiconductor substrate, particularly a silicon substrate, do not change their shape or the like during the manufacturing process of the semiconductor device and maintain a required detection accuracy. The purpose is to provide a manufacturing method for.

(d) Structure of the Invention The object of the present invention is to provide a recess or a protrusion in a semiconductor substrate, coat the recess or protrusion and the vicinity thereof with a film made of metal siliconitride, This is achieved by a method of manufacturing a semiconductor device in which pattern alignment is performed using the convex portions as alignment marks.

Note that the metal is preferably at least one of tungsten, tantalum, molybdenum, titanium, platinum, and rhodium.

That is, in the present invention, by providing a film made of metal silicide nitride, for example, WxSiy-Six'Ny', on the alignment mark and its vicinity, thermal oxidation and wet etching applied to the substrate during the semiconductor device manufacturing process can be avoided. Alternatively, it can be used as a mask against dry etching to prevent changes in the shape of the alignment mark and its vicinity, thereby maintaining position detection accuracy. Note that the metal needs to be selected depending on the etching method, particularly the etchant gas for dry etching.

(e) Embodiments of the Invention The present invention will be specifically explained below using embodiments with reference to the drawings.

Figures 3a to 3e are cross-sectional views showing embodiments of the present invention.

Refer to FIG. 3a. A mask 12 for forming alignment marks is formed on the surface of the Si substrate 11. The material forming the mask 12 may be resist or SiO ₂ .

Refer to FIGS. 3b and 3c. The Si substrate 11 is exposed to etchant gas such as CF ₄ ,
Etching is performed by a dry etching method using SF ₆ , CCl ₄ , BCl ₃ , PCl ₃ or the like to form alignment marks by grooves 13 . Mask 12 is then removed.

Refer to Figure 3 d. Film 1 made of metal nitride on the Si substrate 11 surface.
4 is deposited to a thickness of, for example, about 50 to 300 [nm].
In this example, the metal is tungsten (W), and the nitride film is deposited using the sputtering method, but other metals may be selected as described later, and the film forming method is Alternatively, a vapor deposition method, a chemical vapor deposition method, or the like may be used.

Patterning is performed to leave the film 14 in the groove 13 and its vicinity.

Refer to Fig. 3 e. The film 14 made of metal nitride is heated and
Mutual diffusion with the Si substrate 11 is performed to form a film 15 made of metal silicide nitride. This heat treatment is carried out in a non-oxidizing atmosphere such as nitrogen (N ₂ ) or in vacuum at a temperature of 800 to 1200 [°C] for a period of time.
This will last approximately 15 to 30 minutes.

The metal silicide nitride forming the coating 15 of the present embodiment described above has a composition of WxSiy-Six'Ny', and is a mask against oxidation of the alignment mark to which it is deposited and the Si substrate 11 in the vicinity thereof. It has both the effect of a mask against wet etching using various etchants and dry etching using CHF ₃ gas. Therefore _, in the step of oxidizing the surface of the Si _substrate 11, for example, as shown in FIG.
In the step of etching away layer 16, the fourth
As shown in Figure b, the area covered by the coating 15 remains unchanged. Further, even when a phosphosilicate glass or the like is deposited, the film 15 serves as an etching stop layer.

Although tungsten (W) is used as the metal in the embodiment described above, the effect of the mask in the present invention can be similarly obtained using other high-melting point metals. That is, when wet etching using an etchant commonly used in the manufacturing process of Si semiconductor devices is applied, for example, tantalum (Ta), platinum (Pt), rhodium (Rh), etc. can be used. When dry etching using _CF4 gas is applied, platinum (Pt) and rhodium (Rh) are suitable.
When dry etching using CHF ₃ gas is applied, molybdenum (Mo), titanium (Ti), tantalum, platinum and rhodium are suitable, for example.

(f) Effects of the invention As explained above, according to the manufacturing method of the present invention,
By using alignment marks whose shapes do not deteriorate throughout the manufacturing process of semiconductor devices, it is possible to reliably align the positions of even minute patterns with good accuracy.

[Brief explanation of the drawing]

1A to 1C are cross-sectional views showing examples of deformation of conventional alignment marks during the process; FIGS. 2A and 2B are views showing examples of alignment mark detection using an electron beam; and FIGS. 3A to 3E 4 is a sectional view showing an embodiment of the present invention, and FIGS. 4A and 4B are sectional views showing an example of the state during the manufacturing process of a semiconductor device according to the embodiment of the present invention. In the figure, 11 is a Si substrate, 13 is a groove, 14 is a film made of metal nitride, 15 is a film made of metal silicide nitride, and 16 is a SiO ₂ layer.

Claims (1)

[Scope of Claims] 1. A recess or a protrusion is provided on a semiconductor substrate, the recess or protrusion and the vicinity thereof are coated with a film made of metal silicide nitride, and the recess or protrusion is used as an alignment mark. 1. A method of manufacturing a semiconductor device, the method comprising: performing positional alignment of patterns. 2. Claim 1, wherein the metal is at least one of tungsten, tantalum, molybdenum, titanium, platinum, and rhodium.
A method for manufacturing a semiconductor device according to section 1.