JPH0546702B2 - - Google Patents
Info
- Publication number
- JPH0546702B2 JPH0546702B2 JP59101208A JP10120884A JPH0546702B2 JP H0546702 B2 JPH0546702 B2 JP H0546702B2 JP 59101208 A JP59101208 A JP 59101208A JP 10120884 A JP10120884 A JP 10120884A JP H0546702 B2 JPH0546702 B2 JP H0546702B2
- Authority
- JP
- Japan
- Prior art keywords
- base plate
- case
- semiconductor device
- hole
- reinforcing material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
- H10W76/12—Containers or parts thereof characterised by their shape
- H10W76/13—Containers comprising a conductive base serving as an interconnection
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は補強材付きのプラスチツク製ケースを
備えた半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor device having a plastic case with a reinforcing material.
従来、この種の半導体装置は第１図、第２図お
よび第３図に示すように構成されており、これを
同図に基づいて概略説明すると、１は整流用半導
体装置のプラスチツク製ケースで、取付孔２を形
成する鉄、黄銅製の補強材３が装填されている。
４は正極あるいは負極となる鉄、銅製のベース板
で、上部に前記ケース１が接着材５を介して接合
されている。なお、６はこのベース板４に形成さ
れる取付孔、また７は負極あるいは正極となる銅
製の端子、８はモールド材である。
Conventionally, this type of semiconductor device has been constructed as shown in FIGS. 1, 2, and 3. This will be briefly explained based on the figures. 1 is a plastic case of the rectifying semiconductor device. , reinforcing material 3 made of iron or brass forming the mounting hole 2 is loaded.
Reference numeral 4 denotes a base plate made of iron or copper that serves as a positive electrode or a negative electrode, and the case 1 is bonded to the upper part of the base plate through an adhesive 5. In addition, 6 is a mounting hole formed in this base plate 4, 7 is a copper terminal serving as a negative electrode or a positive electrode, and 8 is a molding material.
ところが、従来の半導体装置においては、ケー
ス１およびベース板４の取付孔２，６を形成する
にあたり両取付孔２，６の位置合わせがケース１
をベース板４に被冠することにより行われている
ため、半導体装置全体の外形が大型化するという
欠点があつた。また、ケース１がプラスチツク製
であるため、ケース１にそり等の変形が起き、両
取付孔２，６に位置ずれが生じるという欠点もあ
つた。 However, in conventional semiconductor devices, when forming the mounting holes 2 and 6 in the case 1 and the base plate 4, the mounting holes 2 and 6 are aligned in the case 1.
Since this is done by covering the base plate 4 with the base plate 4, there is a drawback that the overall external size of the semiconductor device becomes large. Further, since the case 1 is made of plastic, the case 1 is deformed such as warping, and the mounting holes 2 and 6 are misaligned.
本発明はこのような事情に鑑みなされたもの
で、ベース板の孔内に嵌入可能な延在部を補強材
に延設するというきわめて簡単な構成により、取
付孔を高精度に形成することができるだけでな
く、装置の小型化を計ることができる半導体装置
を提供するものである。以下、その構成等を図に
示す実施例によつて詳細に説明する。
The present invention has been developed in view of the above circumstances, and has an extremely simple structure in which an extension part that can be fitted into a hole in a base plate is extended to a reinforcing material, thereby making it possible to form a mounting hole with high precision. In addition, the present invention provides a semiconductor device that can be miniaturized. Hereinafter, the configuration and the like will be explained in detail by referring to embodiments shown in the drawings.
第４図および第５図は本発明に係る半導体装置
を示す平面図と正面図、第６図は第４図の−
断面図である。これらの図において第１図ないし
第３図と同一の部材については同一の符号を付
し、詳細な説明は省略する。同図において、１１
は前記ベース板４と略同一の平面形状を有するプ
ラスチツク製のケースで、取付孔１２を形成する
鉄、黄銅製の補強材１３が装填されている。そし
て、この補強材１３の一端には前記ベース板４に
設けられ補強材１３と同一線上に位置する孔１４
内に嵌入可能な延在部１３ａが延設されている。
なお、前記取付孔１２は前記孔１４内に開口して
いる。。
4 and 5 are a plan view and a front view showing a semiconductor device according to the present invention, and FIG. 6 is a -
FIG. In these figures, the same members as in FIGS. 1 to 3 are designated by the same reference numerals, and detailed explanations will be omitted. In the same figure, 11
is a plastic case having substantially the same planar shape as the base plate 4, and is filled with a reinforcing member 13 made of iron or brass that forms a mounting hole 12. At one end of this reinforcing material 13, a hole 14 provided in the base plate 4 and located on the same line as the reinforcing material 13 is provided.
An extension portion 13a that can be fitted into the inner portion is provided.
Note that the mounting hole 12 opens into the hole 14. .
このように構成された半導体装置においては、
補強材１３にベース板４の孔１４内に嵌入可能な
延在部１３ａが延設されているため、ベース板４
およびケース１１を貫通する取付孔１２を補強材
１３に確実に形成することができ、これにより、
ケース１１の平面形状を小さくすることができ
る。また、従来のようにケースの変形により取付
孔に位置ずれを生じることがない。 In the semiconductor device configured in this way,
Since the reinforcing member 13 is provided with an extension portion 13a that can be fitted into the hole 14 of the base plate 4, the base plate 4
And the mounting hole 12 penetrating the case 11 can be reliably formed in the reinforcing material 13.
The planar shape of the case 11 can be made smaller. Further, unlike the conventional case, the mounting hole does not become misaligned due to deformation of the case.
なお、本実施例においては、整流用半導体装置
について説明したが、本発明はこれに限定される
ものではなく、ケースならびにベース板に取付孔
を有する例えばトランジスタ、サイリスタ等のモ
ジユールおよびその他電力用半導体装置に適用可
能である。 Although the present embodiment describes a rectifying semiconductor device, the present invention is not limited thereto, and can be applied to modules such as transistors, thyristors, etc., which have mounting holes in the case and base plate, and other power semiconductor devices. Applicable to the device.
以上説明したように本発明によれば、ベース板
に補強材と同一軸線上に位置する孔を設けると共
に、この孔内に嵌入可能な延材部を補強材に延設
したので、補強材にケースおよびベース板の取付
孔を確実かつ高精度に形成することができる。し
たがつて、ケースの平面形状をベース板の平面形
状と同一に、あるいはそれより小さくすることが
でき、装置外形の小型化を計ることができる。ま
た、従来のようにケース変形による取付孔の位置
ずれが生じることはないという利点もある。
As explained above, according to the present invention, the base plate is provided with a hole located on the same axis as the reinforcing member, and the reinforcing member is provided with an extending portion that can be fitted into the hole, so that the reinforcing member Mounting holes in the case and base plate can be formed reliably and with high precision. Therefore, the planar shape of the case can be made the same as or smaller than the planar shape of the base plate, and the outer size of the device can be reduced in size. Another advantage is that the mounting hole does not become misaligned due to case deformation, unlike in the conventional case.
第１図および第２図は従来の半導体装置を示す
平面図と正面図、第３図は第１図の−断面
図、第４図および第５図は本発明に係る半導体装
置を示す平面図と正面図、第６図は第４図の−
断面図である。
４……ベース板、１１……ケース、１３……補
強材、１３ａ……延在部、１４……孔。
1 and 2 are a plan view and a front view showing a conventional semiconductor device, FIG. 3 is a cross-sectional view taken from FIG. 1, and FIGS. 4 and 5 are a plan view showing a semiconductor device according to the present invention. and front view, Figure 6 is - of Figure 4.
FIG. 4... Base plate, 11... Case, 13... Reinforcement material, 13a... Extension portion, 14... Hole.
Claims (1)
スチツク製のケースを備えた半導体装置におい
て、前記ベース板に前記補強材と同一軸線上に位
置する孔を設けると共に、この孔内に嵌入可能な
延在部を前記補強材に延設したことを特徴とする
半導体装置。1. In a semiconductor device equipped with a plastic case bonded to a base plate and loaded with a reinforcing material, the base plate is provided with a hole located on the same axis as the reinforcing material, and an extension that can be fitted into the hole is provided. 1. A semiconductor device, characterized in that a mounting portion extends to the reinforcing member.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59101208A JPS60244051A (en) | 1984-05-17 | 1984-05-17 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59101208A JPS60244051A (en) | 1984-05-17 | 1984-05-17 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60244051A JPS60244051A (en) | 1985-12-03 |
| JPH0546702B2 true JPH0546702B2 (en) | 1993-07-14 |
Family
ID=14294501
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59101208A Granted JPS60244051A (en) | 1984-05-17 | 1984-05-17 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60244051A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63208253A (en) * | 1987-02-25 | 1988-08-29 | Toshiba Corp | Semiconductor circuit device |
-
1984
- 1984-05-17 JP JP59101208A patent/JPS60244051A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60244051A (en) | 1985-12-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |