JPH0547840B2 - - Google Patents

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to a reverberation sound adding device for artificially adding reverberation to a music signal or the like, and is adapted to temporally control the frequency characteristics of the reverberation sound. [Prior Art] When artificially adding reverberation to music signals, etc., the most direct electronic method is to extract various types of reverberation from the direct sound in response to the impulse response in an acoustic space such as a virtual hall. This is a method of expressing signals as a superposition of signals with time delays. That is,
As shown in Figure 2, the impulse response of the virtual acoustic space is expressed by the delay time τ _i and the level relative to the direct sound.
Assuming _that it is a string of multiple reflected sounds consisting of g _i (i = 1, ₂ , ..., n), the input signal is By creating a reflected sound sequence for each sample, and superimposing the reflected sounds of each sample at the same time (the operation of multiplying the delayed signal by a gain and adding it in this way is called a convolution operation), A reverberant sound is created. As shown in Fig. 3, this superposition is carried out by inputting each sample value of the input signal to the shift register 1 having a multi-tap while sequentially shifting it at every sampling period τ ₀ , and at τ ₀ within one sampling period. Delayed signals x ₁ to x _o of each sample are outputted from each tap corresponding to τ ₁ to τ _o , respectively, and these are applied to amplifiers 2-1 to 2-n with gains g 1 to g ₁ , respectively.
g _o is given and added by the adder 3, and one sample of the reverberant signal is created as follows: X _put = _o 〓 ⁱ⁼¹ x _i ·g _i . Then, this operation is performed using the input signal sampling period τ ₀
By repeating each step, a series of reverberation signals is created. In addition to the method using the impulse response described above, there are various devices that artificially add reverberation. [Problems to be Solved by the Invention] Reverberation signals created by conventional reverberation adding devices do not take frequency characteristics into consideration, but in nature, the frequency characteristics of reverberation change over time. In other words, in the natural world, reverberation attenuates faster the higher the frequency component.
As time passes, it becomes only low-frequency components. Therefore, even in the above-mentioned reverberation addition, if the frequency characteristics of the reverberation signal to be created can be temporally controlled, a more natural reverberation sound can be created. In addition to such purposes, it would be convenient if the frequency characteristics of reverberant sound could be temporally controlled for purposes such as obtaining special effects. The present invention aims to solve the problems in the conventional techniques and provide a reverberation adding device that can temporally control the frequency characteristics of reverberant sound. [Means for Solving the Problems] The present invention provides a reverberation addition means for performing data calculation on input signal data based on predetermined coefficient data to create reverberation sound data of the input signal, and a reverberation addition means for creating reverberation sound data of the input signal; an input interruption detection means for detecting; a frequency characteristic control means for adding a filter characteristic to the input signal data immediately before the input signal data is interrupted, the reverberation sound data created from this input signal data, or the coefficient data; In accordance with the interruption of the input signal detected by the input interruption detection means, a temporal change is added to the coefficient data of the filter so that the band of the filter characteristic of the frequency characteristic control means is gradually narrowed toward lower frequencies. and filter characteristic variable means for executing control. [Operation] According to the present invention, reverberant sound in the natural world can be faithfully reproduced by temporally changing the filter characteristics so that the high frequency range of the reverberant signal attenuates quickly when the input signal is interrupted. . In addition, as another method to obtain similar reverberation sound,
It is also possible to divide the input signal into frequency bands, generate reverberant signals in separate circuits so that the reverberation time is short on the high frequency side, and the reverberant sound is long on the low frequency side, and then synthesize and output these signals. However, in this case, it is necessary to provide a reverberation adding means for each frequency band, and there is a problem that the scale of the apparatus becomes large. On the other hand, if the film characteristics are changed over time as in the present invention, there is no need to divide the film into frequency bands and provide reverberation adding means, so the scale of the apparatus can be reduced. [Embodiment] An embodiment in which the present invention is applied to a reverberation adding device that performs convolution operation using impulse responses as coefficient parameters to create reverberant sound of an input signal will be described. Here, the data before creating reverberation sound,
Or, a case will be described in which a filter characteristic is added to the data after creating reverberant sound or the coefficient parameters, and a temporal change is added to the filter characteristic. (Example 1) A first example of the present invention is shown in FIG. This is a method in which frequency characteristics are given to input data before creating a reverberant signal. In FIG. 1, a frequency characteristic control circuit 10 imparts filter characteristics to an input signal. This filter characteristic is temporally variably controlled by filter characteristic variable means 11. The output of the frequency characteristic control circuit 10 is input to the reverberation adding circuit 12. The reverberation addition circuit 12 creates a reverberation signal for each sample of the input signal based on the impulse response parameters (parameters related to delay time and level) stored in the coefficient memory 14, and adds them by convolution operation. A series of reverberant signals are created using the above-mentioned calculations shown in FIG. 3. By temporally variable control of the filter characteristics of the frequency characteristic control circuit 10, the reverberation addition circuit 12 outputs
A reverberation signal to which a filter characteristic that changes over time is added is output. (Example 2) A second example of the present invention is shown in FIG. This is a method in which filter characteristics are given to data after creating a reverberant signal. In FIG. 4, the input signal is input to the reverberation adding circuit 12.
is input. The reverberation addition circuit 12 creates a reverberation signal for each sample of the input signal based on the impulse response coefficient parameters stored in the coefficient memory 14, and adds these signals by convolution to create a series of reverberation signals. create. The reverberation signal output from the reverberation addition circuit 12 is given filter characteristics by the frequency characteristic control circuit 10 . This filter characteristic is variably controlled over time by a filter characteristic variable means. (Embodiment 3) A third embodiment of the present invention is shown in FIG. This is a method in which filter characteristics are given to the coefficient parameters of an impulse response for creating a reverberant signal. In FIG. 5, the impulse response coefficient parameters stored in the coefficient memory 14 are given filter characteristics by the frequency characteristic control circuit 10. In FIG. This filter characteristic is variably controlled over time by filter characteristic variable means 11. Reverberation addition circuit 12
creates a reverberation signal for each sample of the input signal based on the coefficient parameters given the filter characteristics, and adds these signals by convolution to create a series of reverberation signals. Since the impulse response pattern and the filter characteristics are of the same dimension, the impulse response pattern is transformed by passing it through the frequency characteristic control circuit 10, and the convolution operation is performed using this transformed impulse response. A reverberation signal with filter characteristics can be obtained. According to the embodiments shown in FIG. 1, FIG. 4, and FIG. 5, when the input signal is interrupted, the filter characteristic band of the frequency characteristic control circuit 10 is changed in the lower frequency direction in accordance with the attenuation of the reverberant signal. By narrowing it down to
It can attenuate high frequencies quickly and faithfully reproduce reverberant sounds in the natural world. (Configuration example of frequency characteristic control circuit 10) Frequency characteristic control circuit 10 in each of the above embodiments
An example of the configuration is shown in FIG. This is a system in which two systems of filter circuits with different frequency characteristics are provided, and by crossfading these, the frequency characteristics are gradually switched. In FIG. 6, the input signal is branched into two systems A and B and input to filters 16 and 18, respectively. The frequency characteristics of filters 16 and 18 are set independently. The outputs of the filters 16 and 18 are used as crossfade coefficients x and y by multipliers 20 and 22.
are respectively multiplied, added by an adder 24, and output. The coefficients x and y are set such that, for example, as shown in FIG. 7, while the coefficient x changes from 0 to 1, the coefficient y changes from 1 to 0. Therefore, at first, only the characteristics of the filter 16 are effective, but as time passes, the characteristics of the filter 16 gradually weaken and the characteristics of the filter 18 begin to take effect, and eventually only the characteristics of the filter 18 become effective. In this way, the frequency characteristics can be switched continuously. For example, if filters 16 and 18 are both low-pass filters, and the cutoff frequency of filter 16 is set to a high frequency ₁ , and the cutoff frequency of filter 16 is set to a low frequency ₂ , the cutoff frequency will change from ₁ to _2.
A frequency characteristic that gradually changes is obtained. Moreover, if such switching is performed continuously, it is possible to change the frequency characteristics over a wide range. FIG. 8 shows an example of this, in which the filter characteristics are alternately switched when the input is interrupted and the reverberant signal gradually attenuates. Here, as a filter characteristic, for example, the 9th
The characteristics shown by a to i are used in the figure. The coefficients x and y are
As shown in Figure 8, the relationship between 1 and 0 is continuous and periodic, and x and y are mutually inverted (x+
y=1) and changes. The filter characteristics are
As shown in FIG. 8, one filter characteristic is used continuously while the coefficient changes from 0 to 1 to 0, and when the coefficient attenuates to 0, the filter characteristic is switched to the next filter characteristic. In other words, in the example of FIG. 8, when the input is sustained, x = 1, y = 0, and the characteristics of the filter 16 on the A system side are utilized to set the characteristics of a, which has the highest cutoff frequency. has been done. When the input is interrupted, the filter characteristic of the A system remains a, and the value of the coefficient x gradually decreases from 1 to 0, and the filter characteristic of the B system is set to b, which has a lower cutoff frequency than a. As a result, the value of the coefficient y gradually increases from 0 to 1. When the coefficient x becomes 0, the filter characteristic on the A system side is switched to c, which has a lower cutoff frequency than b. In this way, A lineage,
By sequentially switching to a filter characteristic with a lower cutoff frequency in order of a, b, c, d, ..., i each time the values of coefficients x and y become 0 alternately in the B system, the high frequency components of the reverberant signal become faster. It is possible to faithfully reproduce the characteristics of reverberant sound in the natural world, which is attenuated and low-frequency components remain for a long time. By the way, the filters 16 and 18 in FIG.
It can be configured with digital filters such as FIR (finite impulse response: acyclic filter) and IIR (infinite impulse response: cyclic filter). An example of a configuration using a secondary IIR type filter is shown in FIG. This is done by adding a multiplier 26 to the input signal.
The input signal is delayed by one sampling period τ ₀ by the delay element 27 and given _{the coefficient A 1 by} the multiplier 28, and the input signal is The signal delayed by 2τ ₀ and given a coefficient A ₂ by the multiplier 30 is added to the adder 3.
1, the output of the adder 31 is delayed by a period τ ₀ by the delay element 32, and the multiplier 33 adds a coefficient B ₁ , and the output of the adder 31 is added to the signal by the delay elements 32, 34.
A signal delayed by a period of 2τ ₀ and given a coefficient B ₂ by a multiplier 35 is fed back to the adder 31. In this circuit, the transfer coefficient between input and output is
As H _(Z) , H _(Z) = output/input = A ₀ +A ₁ Z ^-1 +A ₂ Z ^-2 /1-B ₁ Z ^-1 -B ₂ Z
^-2 is obtained. Filter characteristics can be arbitrarily set by the values of coefficients A ₀ , A ₁ , A ₂ , B ₁ , and B ₂ . FIG. 11 shows an example of the configuration of the frequency characteristic control circuit 10 shown in FIG. 6, in which the filters 16 and 18 are FIR type filters. For example, as shown in FIG. 12, the input signal x ₀ is delayed by one sampling period τ ₀ by the delay element 40, and the filter characteristics are expressed at each stage (here, 20 sample points are shown). ) to the delayed output of each multiplier ₄₂ ...
a ₂₀ is given, each a ₁ x ₀ to a ₂₀ x ₀ is accumulated in the adder 44 (that is, by convolution operation), and the input signal x ₀
This gives the characteristics of a low-pass filter to the filter. Filter characteristics are set by the values of coefficients a ₁ to a ₂₀ . And, especially in the circuit shown in Figure 11,
This is achieved through program control using RAM. Incidentally, each control signal used in the circuit of FIG. 11 is shown in FIG. 13. In FIG. 11, the filter characteristic parameter memory 46 stores coefficients a ₁ to a that determine the frequency characteristics for each filter characteristic to be set (for example, the characteristics a, b, ..., i in FIG. 9). _n , b ₁ ~
The values _of b _{n ,} .

[Table] The filter characteristic selection circuit 48 selects two filter characteristics from among the filter characteristics (a to i) stored in the filter characteristic parameter memory 46. The data memory 50 has m+1 addresses, and updates the samples of the input signal in order from the addresses where the oldest samples are stored, and writes new samples. As a result, data memory 5
0 always stores m+1 past samples from the current time. The counter 52 instructs the write address of the data memory 50, and is counted up by the clock C1 generated every sampling period τ ₀ of the input signal, and when the count reaches m, the count is repeated from 0 again. The counter 54 instructs the read address of the filter characteristic parameter memory 46 and the data memory 50, and has a sampling period τ ₀ of the input signal.
0 by clock C2 which occurs m+1 times during
Count up to ~m. The value of the counter 52 is subtracted from the value of the counter 54 by a subtracter 56, and added to the data memory 50 as an address. The data memory 50 is switched to the write mode by the clock C3 when the value of the counter 54 is 0, and is in the read mode when the count value is other than that. Therefore, in write mode, counter 5
The value of 2 is directly added to the data memory 50 as a write address, and the input sample is written to that address. After writing, the data memory 50 returns to the read mode, and the counter 54 is sequentially incremented by the clock C2. Then, the value of the counter 52 (the address of the latest data) is subtracted in the subtracter 56, and the samples one sample before, two samples before, . It is read out sequentially within ₀ . In addition, the filter characteristic parameter memory 46 is
Using the value of the counter 54 as an address, the coefficients (a ₁ to _{a n} , b ₁ to b _n ) are output in parallel and sequentially. The output data of the data memory 50 is guided to two systems A and B, and multipliers 58 and 60 add coefficients of the filter characteristics sequentially output from the filter characteristic parameter memory 46. Since the readout of the delay data and the readout of the filter characteristic coefficients are synchronized by the counter 54, the multipliers 58 and 60 provide coefficients corresponding to the delay data being read out. The output data of the multiplier 58 is sequentially accumulated by an accumulator consisting of an adder 62 and a register 64, and the total accumulated value of m data obtained within a period τ ₀ is stored in the register 66 by the clock C1. Latched. When the accumulated value is latched into register 66,
Register 64 is reset by the inverted signal of clock C1 in preparation for accumulation in the next sampling period. The output data of multiplier 60 is similarly processed. As a result, the registers 66 and 72 output data in which the filter characteristics selected by the filter characteristic selection circuit 48 are added to the input signals, and these data are given crossfade coefficients x and y in the multipliers 74 and 76, respectively. be done. The crossfade parameter memory 78 stores coefficients x and y (see FIG. 7), for example, values shown in Table 2 below at each address.

[Table] When the counter 80 is triggered by the trigger signal TRG, one sampling period τ ₀ of the input signal
It is counted up by the clock C4, which has a much longer cycle than the clock C4. This count value is memory 7
8 as an address, and the coefficients x and y shown in Table 2 are read out sequentially. Multipliers 74, 76
The output data of is added by an adder 78 and outputted at the same sampling period τ ₀ as the input signal. In this way, the filter characteristics of the A system are sequentially switched to the filter characteristics of the B system. Note that when the A system is completely switched to the B system (that is, when the value of the counter 80 reaches 10), if the counter 80 stops counting,
The filter characteristics of the B system will continue to be utilized thereafter. In addition, when the A system is completely switched to the B system, by switching the A system to a different filter characteristic and switching the counter 80 to down-count, the B system's filter characteristic can be changed to the A system's new filter characteristic. It is possible to switch sequentially. Furthermore, when the value of the counter 80 falls to 0, switch the B system to another filter characteristic, and switch the counter 80 to up count, then switch from the A system's filter characteristic to the B system's new filter characteristic. I can go. In this way, switching of filter characteristics as shown in FIG. 8 is realized. (Configuration examples of the reverberation adding circuit 12 and coefficient memory 14 in FIGS. 1 and 4) The embodiment shown in FIG. 1 (which gives filter characteristics to the input signal before adding reverberation) and the embodiment shown in FIG. FIG. 14 shows a configuration example of the reverberation adding circuit 12 and the coefficient memory 14 applied to the reverberation adding circuit 12 (which gives filter characteristics to an input signal after adding reverberation). 14th
The circuit shown in the figure realizes the principle of adding reverberation shown in FIG. 3 through program control using RAM. Here, since there is a limit to the speed of the convolution operation that can be performed within one sampling period τ ₀ to create the reverberant signal, the second
Parameters of the impulse response in the figure (τ ₁ , g ₁ ) ~
Rather than using all of (τ _o , g _o ), a certain area is selected to perform the convolution operation. In other words, when the input signal is sustained,
The rear reverberation sound is masked and there is no auditory problem even if it is cut out, so the reverberation can be calculated by convolution using only the parameters (τ ₁ , g ₁ ) to (τ _i , g _i ) of the early reverberation sound. Create sounds. In addition, when the input signal is interrupted, the masking effect disappears, and if only the initial reverberation sound is used, the reverberation sound suddenly cuts off and feels unnatural, so the range of parameters to be used is (τ ₂ , g ₂ ) ~ ( τ _i+1 , g _i+1 ), and even (τ ₃ , g ₃
)
~(τ _i+2 , g _i+2 ), and the natural reverberation sound is obtained from the early stage through the middle stage to the late stage. Hereinafter, a convolution operation in which the area of parameters to be used is sequentially shifted to a lower level in this manner will be referred to as "adaptive" convolution. Incidentally, each control signal used in the circuit of FIG. 14 is shown in FIG. 15. In addition, clock C in Fig. 15
1 is the same as the clock C1 in FIG. 13 (a signal generated every sampling period τ ₀ ). In FIG. 14, the input signal is input to the pre-memory 82.
is stored once. The pre-memory 82 stores the input signal for a period of about several tens of milliseconds, which is necessary to detect whether the input signal continues or is interrupted in order to determine whether to shift to the adaptive mode. The counter 80 provides a write address to the prememory 82, and is incremented by the clock C1 every cycle _τ0 . The counter 86 provides a read address to the prememory 82, and is counted up by the clock C8 and reads out data at each address in the prememory 82 within a period τ ₀ . The value of counter 86 is reset at the beginning of period τ ₀ by clock C7. Prememory 82 is switched to write mode once at the beginning of period τ ₀ by clock C9. At this time, the counter 86 has been reset, the value of the counter 80 is output as is, and a new sample of the input signal is written to the address of the pre-memory 82 (the storage address of the oldest data) indicated by the value. At timings other than clock C9, the pre-memory 82 is in the read mode, and the value obtained by subtracting the value of the counter 86 from the value of the counter 80 is given as a read address by the subtracter 84, and the stored contents of the pre-memory 82 are read in one sampling period. They are read out sequentially within τ ₀ . The coefficient memory 14 stores impulse response coefficient parameters at each address as shown in Table 3 below.

[Table] Here, for convenience, the delay time data τ _i is stored in the form of how many sampling periods τ ₀ of the input signal it corresponds to. (It is also possible to store this in real time form, but in that case a separate interface configuration with the timing on the circuit is required.) The data memory 88 stores the input signal in order to create the reverberation signal. It stores samples. Counter 90 provides a write address to data memory 88, and is incremented by clock C1 every sampling period τ ₀ of the input signal. Subtractor 92 obtains the address of each delay time τ _i with respect to the current write address and provides it to data memory 88 as a read address. Data memory 88 is clocked by clock C5 at period τ ₀ .
Switch to write mode. At this time, since the delay time parameter is 0, the value of the counter 90 is output as is from the subtracter 92, and the address of the data memory 88 indicated by that value is stored in the pre-memory 88.
The output of 2 is written. At this time, since the next write address has been instructed to the pre-memory 82 by the counter 80, the data written to the data memory 88 is a sample of the input signal delayed by the capacity of the pre-memory 82. At timings other than clock C5, the data memory 88 is switched to the read mode, and each delay time parameter τ _i sequentially output from the coefficient memory 14 within the period τ _p determines τ _i based on the write address.
The data at each delay time is sequentially read out. Each delayed data x _i of the input signal sequentially read from the data memory 88 is multiplied by each level parameter g _i sequentially output from the coefficient memory 14 in a multiplier 94, and g _i · x _i are sequentially output. . The accumulator 96 accumulates the multiplied value from the multiplier 94 using an adder 98 and a register 100. As a result, the total accumulated value within the period τ _p is finally output from the accumulator 96. The contents of register 100 are the clock C after the accumulation of all multiplication values.
It is reset by 6. The zero detection circuit 104 (input interruption detection means)
It detects the level of the input signal, and the multiplier 106 squares the delay data sequentially read out from the pre-memory 82 within one sampling period τ ₀ .
The respective squared values are accumulated by an adder 108 and a register 110. Then, the total accumulated value within the period τ _p is calculated by clock C1.
is transferred to the register 112. In this way, the register 112 holds a value corresponding to the level of the input signal. Register 110 is clock C1
It is reset every sampling period τ ₀ by . The adaptive operation parameters are read out as follows. When the output of zero detection circuit 104 becomes zero, comparator 118 resets counters 120 and 122. The counter 120 sets the initial value of the adaptive operation parameter data, and is set to "1" when reset, and becomes the count value of the output of the coincidence detection circuit 124 when the reset is released. The counter 116 commands the read address and is reset by the clock C7 which is output once every period _τ0 , and the counter 116 is reset by the clock C7 which is output once every period τ0.
A value of 20 is read in, the clock C8 is counted up using that value as an initial value, and i read addresses used in the adaptive operation are outputted within a period τ _p . When the counter 120 is “1” (when the input signal continues)
The counter 116 is preset to "1", and
The coefficient memory 14 is sequentially designated from address 1 to address i. The counter 122 is reset and released by zero detection, and thereafter is counted up by the clock C1. This count value corresponds to the number of samples after the shift to the adaptive mode, and means the elapsed time t after the shift to the adaptive mode (the elapsed time after the input signal is interrupted). The coincidence detection circuit 124 compares each of the delay time parameters τ ₁ to τ _o for adaptive operation with the time t, and outputs a pulse every time there is a coincidence, which is counted by the counter 120 . In adaptive operation, this means that after the elapsed time t after the loss of the input signal (i.e., t
Since the parameter of the delay time (greater than t) is applied, the input signal data corresponding to the delay time before time t (less than t) is 0 due to the interruption of input, so this is folded. This is to find out how many parameters have passed since the input signal was interrupted (because it is meaningless even if the input signal is interrupted), and to determine which parameter should be applied to the convolution operation at the current point in time. With the value of counter 120 as the initial value, clock C5
The value of the counter 116 for counting is added to the coefficient memory 14 as a read address, and the corresponding parameter data is read out. Note that in FIG. 14, the timing controller 130 outputs control signals for operating each circuit. FIG. 15 shows an example of the operation of the circuit shown in FIG. 14. However, this indicates a state where adaptive operation has not yet been achieved. The sampling period τ _p starts with the clock C1, and the clock C1 is counted by the counters 80 and 90, and the write address is shifted by one.
Since the delay time parameter is initially 0, the values of the counters 80 and 90 are then directly added to the data memory 88 as address signals. Data memory 88 is written on clock C5. At this time, in the pre-memory 82, the counter 80
is commanding the next write address, and clock C
5 transfers the data at that address to the data memory 88. Thereafter, new data is entered into the prememory 82 by the clock C9. Adaptive operation parameters are sequentially read out from the coefficient memory 14 at the cycle of clock C8. In FIG. 15, since the adaptive operation has not yet been reached, the initial value of the counter 116 is 1 (the previous value is 0).
(reset state), and i adaptive operation parameters (τ ₁ , g ₁ ) to (τ _i to g _i ) are read from the beginning. When the adaptive operation is started, the initial value of the counter 116 changes sequentially to 2, 3, etc., and the parameters also shift sequentially accordingly. By accumulating each calculated value within one sampling period τ ₀ by this adaptive operation, a final accumulated value is obtained at the end of each period τ ₀ , which becomes a sample of one reverberation signal. This operation is then repeated for each sampling period τ ₀ to create a series of reverberant signals. The reverberation adding circuit 12 shown in FIG. 14 described above can be applied to the embodiments shown in FIGS. 1 and 4 in combination with the frequency characteristic control circuit 10 shown in FIG. 11. In this case, in the embodiment shown in FIG. 4, filter characteristics are added after reverberation is added to the input signal, so that when the input signal is interrupted, the reverberation signal is attenuated as shown in FIG. , it is possible to gradually change the filter characteristics. However, in the embodiment shown in FIG. 1, filter characteristics are added before adding reverberation, so when the input signal is interrupted, the reverberation that gradually attenuates on the input side of the frequency characteristic control circuit 10 as shown in the input signal shown in FIG. No signal was obtained and the first
The combination of the frequency characteristic control circuit 10 shown in FIG. 1 and the reverberation adding circuit 12 shown in FIG. 14 cannot gradually change the film characteristics as the reverberation signal attenuates. (Other configuration examples of the circuit shown in FIG. 1) Therefore, also in the embodiment shown in FIG. 1, the frequency characteristic control circuit 10 and the reverberation adding circuit make it possible to gradually change the filter characteristics as the reverberant signal is attenuated. Twelve configuration examples are shown in FIGS. 16 and 17, respectively. The frequency characteristic control circuit 10 shown in FIG. 16 is provided with a pre-memory 132 on the input side to temporarily store the input signal and then send it to the data memory 50. Based on the data stored in the pre-memory 132, a zero detection circuit 134 (input discontinuation detection means) to sustain the input signal/
When the interruption state is detected and the input signal is interrupted, writing to the data memory 50 is stopped, the data of the input signal immediately before the interruption is held in the data memory 50, and this is repeatedly read out and filtered by convolution operation. At this time, the filter characteristics are switched.
Further, the reverberation addition circuit 12 shown in FIG. 17 applies reverberation to the output from the frequency characteristic control circuit 10 whose filter characteristics change by applying an adaptive convolution operation. Details of the circuits shown in FIGS. 16 and 17 will be explained. In FIGS. 16 and 17, the same reference numerals are used for parts common to the circuits in FIGS. 11 and 14. In FIG. 16, prememory 132 uses the same address signal as data memory 50 to write and read input signals. Pre-memory 1
32 write clock C3' is the data memory 5.
This signal is generated a moment later than the 0 write clock C3. Therefore, pre-memory 132
While data is being read from the next write address, the data that has been read from the pre-memory 132 is written into the data memory 50 by the clock C3. The data delayed by the minute is written. Immediately after this, pre-memory 132 is written in by clock C3'. The zero detection circuit 134 is almost the same as that shown in FIG. 14, except that the clock C2 is used as the transfer clock for the register 140. The output of this zero detection circuit 134 is input to a comparator 144, and if it is smaller than a predetermined threshold level, it is determined that the input signal has been interrupted. As a result, new writing to the data memory 50 is stopped, the counter 52 stops counting, and the data of the input signal immediately before the interruption is held in the data memory 50, and this data is repeated every sampling period τ ₀ . The coefficients of the filter characteristics read out from the filter characteristic parameter memory 46 are assigned, and the filter characteristics are assigned by a convolution operation. At this time, the counter 80 is activated by using the output signal of the comparator 144 as the trigger signal TRG, and sequentially reads out the values of the crossfade coefficients x and y from the crossfade parameter memory 78 to obtain the frequency characteristics of the A system and the frequency of the B system. Crossfade between characteristics. Then, each time one of the systems is completely attenuated, the counter is switched up or down, and the filter characteristics of the attenuated system are switched. By doing so, the frequency characteristic control circuit 10 outputs a signal with the filter characteristics sequentially switched even after the input signal is interrupted. In the reverberation adding circuit 12 shown in FIG. 17, the data memory 88 stores the frequency characteristic control circuit 1 shown in FIG.
An output signal of 0 is input, and reverberation is added by convolution calculation. Comparator 14 in FIG.
4 detects a loss of input signal, counters 120 and 122 are reset and adaptive operation is performed. That is, the counter 122 calculates the elapsed time after shifting to the adaptive operation, and the match detection circuit 124 outputs a pulse every time the delay time parameters τ ₁ to _{τ o} match.
, the initial value of the counter 116 is sequentially increased, the readout address of the coefficient memory 14 is sequentially changed to a higher value, and the parameters of the impulse response used for adding reverberation are sequentially shifted from the early phase to the middle phase to the late phase. To go. Adaptive operation is thus performed. In this case, since the input signal is a signal in which the filter characteristics are sequentially changed from the frequency characteristic control circuit 10 in FIG. 16, the reverberation signal in which the filter characteristics are sequentially changed is inputted from the reverberation addition circuit 12 in FIG. Output. In this way, the first
In the illustrated embodiment as well, control as shown in FIG. 8 is realized. (Configuration example of the embodiment shown in FIG. 5) Next, a configuration example of the embodiment shown in FIG. 5 will be described. In the embodiment shown in FIG. 5, filter characteristics are added to the impulse response parameters themselves for adding reverberation, as described above. This is an attempt to obtain a reverberation signal with predetermined filter characteristics by passing an impulse response pattern through a filter and transforming it, and then performing a convolution operation using this transformed impulse response. . An example of the configuration of the embodiment shown in FIG. 5 is shown in FIG. 18. In FIG. 18, the input signal is temporarily stored in a pre-memory 150 for detection of its continuation/discontinuation state, and then transferred to a data memory 152. The coefficient memory 14 stores impulse response coefficient parameters for adding reverberation. Since impulse responses occur at discrete times as shown in FIG. 19, the coefficient memory 14 of the embodiments shown in FIGS. I expressed the impulse response and memorized it, but
(See Table 3). Here, in order to impart filter characteristics to the impulse response itself, the impulse response is treated as data arranged in time series, and the sampling period τ ₀
Memorize the level of each reflected sound. That is, portions where there is no reflected sound are also stored as level 0 reflected sounds. Table 4 below shows the contents stored in the coefficient memory 14 when the impulse response shown in FIG. 19 is used as an example.

【table】

〔Effect of the invention〕

As explained above, according to the present invention, the filter characteristics are changed over time so that the high frequency range of the reverberant signal is quickly attenuated when the input signal is interrupted. Can be reproduced. In addition, since the filter characteristics are changed over time so that the high range of the reverberant signal attenuates quickly, a reverberation adding means is provided for each frequency band to individually generate reverberant signals so that the high range attenuates quickly. The scale of the equipment can be smaller compared to the case where

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the present invention. FIG. 2 is a diagram showing an impulse response. FIG. 3 is a circuit diagram showing a circuit that adds reverberation by convolution using the impulse response of FIG. 2 as a parameter. FIG. 4 is a block diagram showing a second embodiment of the invention. Fifth
The figure is a block diagram showing a third embodiment of the invention. FIG. 6 is a circuit diagram showing an example of the frequency characteristic control circuit 10 of FIGS. 1, 4, and 5.
Figure 7 shows the crossfade coefficients x, y in Figure 6.
FIG. 2 is a diagram showing temporal changes in FIG. Figure 8 shows the 6th
This is a time chart showing a state in which filter characteristics are sequentially changed with respect to an attenuating reverberant signal using the frequency characteristic control circuit 10 shown in the figure. FIG. 9 is a diagram showing characteristics of each filter used in the operation of FIG. 8. FIG. 10 is a circuit diagram showing an example in which the filters 16 and 18 in FIG. 6 are configured as cyclic filters. FIG. 11 is a block diagram showing an example of the structure of the frequency characteristic control circuit 10 of FIG. 6, which is constructed using an acyclic filter.
FIG. 12 is a diagram showing the principle of an acyclic filter. FIG. 13 is a time chart showing the operation of the circuit of FIG. 11. FIG. 14 is a block diagram showing an example of the configuration of the reverberation adding circuit 12 in the embodiments of FIGS. 1 and 4. FIG. FIG. 15 is a time chart showing the operation of the circuit of FIG. 14. 1st
6 and 17 show a frequency characteristic control circuit 10 and a reverberation adding circuit 12 for realizing the filter characteristic switching operation of FIG. 8 in the embodiment of FIG.
FIG. FIG. 18 is a block diagram showing an example of the configuration of the embodiment shown in FIG. Figure 19 shows
19 is a diagram showing an example of impulse response parameters stored in the coefficient memory 14 in FIG. 18. FIG. FIG. 20 is a diagram showing the parameters of the impulse response to which filter characteristics are applied, which is output from the frequency characteristic control circuit 10 in FIG. 18. 10... Frequency characteristic control circuit (frequency characteristic control means), 11... Filter characteristic variable means, 12...
...Reverberation adding circuit (reverberation adding means), 14... Coefficient memory, 104, 134, 158... Zero detection circuit (input interruption detection means).

Claims (1)

[Scope of Claims] 1. Reverberation addition means that performs data calculation on input signal data based on predetermined coefficient data to create reverberation sound data of the input signal; and Input interruption detection means that detects interruption of input signal data. and a frequency characteristic control means for adding a filter characteristic to the input signal data immediately before the input signal data is interrupted, or the reverberant sound data created from this input signal data, or the coefficient data, and detected by the input interruption detection means. a filter characteristic that performs control to add a temporal change to the coefficient data of the filter so as to gradually narrow the band of the filter characteristic of the frequency characteristic control means toward a lower frequency band in accordance with the interruption of the input signal that is input to the filter; A reverberation adding device comprising variable means.