JPH0548077B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a motor speed control circuit with a lock protection function that cuts off current to the motor immediately before the motor locks to protect the motor and circuit elements.

[Background technology] In motor-applied equipment, if the motor locks due to an increase in load, an excessive current flows and the motor burns out.If a semiconductor element that controls the speed is connected in series with the motor, the semiconductor element may become damaged. It may get burnt out. Detection for locking the motor includes a method of detecting the current value using a minute resistance and a method of detecting a decrease in the number of revolutions. For equipment with low voltage and speed control, sensing the rotational speed is more advantageous. This is because a speed signal is processed for speed control, and this signal can also be used for lock detection. In this method, the control element connected in series with the motor is turned off when the rotational speed drops to a certain number before the speed completely locks. The disadvantage of this method is that it is necessary to prevent the lock protection circuit from operating and preventing the engine from starting when the engine speed is low at startup. It is conceivable to create a time delay using a capacitor or the like at startup to delay the start of the lock protection operation. With this method, in devices where the load or inertia changes during startup, there will be variations in the rotational speed after a certain period of time has elapsed, and a very large time delay must be created. Further, the delay time varies depending on variations in capacitance of the capacitor. As described above, when a load is applied immediately after startup and the lock state is reached, there is a possibility that the lock protection operation will not be performed.

[Object of the Invention] The present invention has been provided in view of the above-mentioned points, and provides a lock protection circuit that operates and stops startup even if the load at startup or the inertia of the load changes and startup takes time. It is an object of the present invention to provide a motor speed control circuit provided with a lock protection operation delay function that prevents lock protection from occurring.

[Disclosure of the Invention] An embodiment of the present invention will be described below with reference to the drawings. First, the overall circuit operation will be explained. FIG. 1 shows a block diagram of the speed control circuit, and FIG. 2 shows its time chart. The speed detection circuit 1 outputs a signal proportional to the rotation speed of the motor.
Frequency generator FG, operational amplifier OP ₁ , resistor
It consists of _RF , RS _{, etc.} The sample/reset pulse generation circuit 2 that generates timing pulses such as sample pulses and reset pulses is
It consists of a trapezoidal wave circuit 11 that generates a trapezoidal wave, a hysteresis comparator OP ₂ , a sample/reset pulse generator 2a consisting of an IC, etc.
A trapezoidal wave circuit 11 that inputs a trapezoidal wave to the reset pulse generator 2a is composed of a constant current source I ₁ , a capacitor _CR , and the like. A sawtooth wave generation circuit 3 that generates a sawtooth wave by the reset pulse of the sample/reset pulse generator 2a includes a constant current source I ₂ and a capacitor.
The sample- _and -hold circuit 4, which samples and holds the sawtooth wave voltage using the sample pulse from the sample/reset pulse generator 2a, is composed of buffers 4a, 4b, a capacitor _CH , and the like. The speed variable circuit 7 that sets an appropriate speed includes a resistor _Rx , a volume VR, and a buffer 7a.
The output thereof is input to the error amplifier 12 and compared with the output from the sample and hold circuit 4, and the difference is inverted and amplified. Further, the output of the error amplifier 12 is compared with the reference triangular wave from the reference triangular wave generation circuit 5 by a comparator 13, and when the output of the comparator 13 is at H level, the output circuit 8 is driven. Then, a power MOSFET that constitutes a switching circuit is connected to the output of output circuit 8.
14 is turned on to drive the motor M. In addition, the power source is battery B, and the voltage is from the booster circuit 1.
The voltage is increased at 0 and supplied to the motor M.
In addition, F-V converts the speed signal of motor M into F-V.
The conversion circuit is composed of a sawtooth wave generation circuit 3 and a sample hold circuit 4.

Next, the operation will be explained with reference to FIGS. 1 and 2.
Note that a to j in FIG. 2 indicate waveforms at points a to j in FIG. 1. A speed signal proportional to the rotational speed of the motor M is outputted by a frequency generator FG, and the outputted speed signal is amplified by R _F /R _S times by an operational amplifier _OP1 . The output of the operational amplifier OP ₁ as shown in FIG. 2a is input to a hysteresis comparator OP ₂ to obtain a square wave pulse with a frequency proportional to the rotational speed as shown in FIG. 2b. This square wave causes the trapezoidal wave circuit 11 of the sample/reset pulse generating circuit 2 to generate a trapezoidal wave as shown in FIG. 2c. The rise of this trapezoidal wave is compared with the reference voltages V ₁ , V ₂ , V ₃ from the reference voltage generation circuit 6 (Fig. 2 c), and the sample pulse (Fig. 2 e) and reset pulse (Fig. 2 d) are compared. determine the timing of occurrence. On the other hand, in the sawtooth wave generation circuit 3 _, the capacitor _CT is charged by the constant current source _I2 , and when the reset pulse is generated, as shown in FIG. Generates a sawtooth wave as shown. Sample hold circuit 4
Now, when a sample pulse occurs, the sawtooth wave voltage at that time is sampled and held by charging or discharging the hold capacitor C _H. Therefore, a DC signal proportional to the rotational speed as shown in FIG. 2g is outputted to the sample and hold circuit 4.

The error amplifier ₁₂ inverts and amplifies the difference _{between the} voltage _V The reference triangular wave of the reference triangular wave generating circuit 5 is compared with the comparator 13, and the result shown in FIG.
A square wave is obtained as shown in . This square wave is output through the output circuit 8 to obtain a gate voltage as shown in FIG.
The power supply to the DC motor M is controlled by PWM. The lock protection circuit 9 has the following functions. That is, when an overload is applied to the motor M, the rotation speed of the motor M decreases. Therefore, the output frequency of the frequency generator FG becomes smaller, and the output voltage of the sample and hold circuit 4 becomes higher. This voltage is detected by the voltage divided by the resistors R _L1 and R _L2 and the comparator 15, and when the rotation speed falls below a set value, the output pulse is cut off and the motor M is stopped.

Next, the delay circuit 21, which is the gist of the present invention, will be explained. As shown in FIG. 1, this delay circuit 21 is an output pulse detection circuit 21b consisting of NAND gates _G1 , _G2 , an inverter _G3 , a capacitor C1 _, etc.
The delay circuit 21, which constitutes a delay means, has the function of delaying the operation of the lock protection circuit 9 at the time of startup. The output of the output circuit 8 is input to one input terminal of the NAND gate _G1 , and the output of the flip-flop _21a is input to the non-inverting input terminal of the comparator 15 of the lock protection circuit 9 via the transistor Tr1. Note that FIG. 3a shows the rotational speed of the motor M, FIG. 3b shows the output waveform of the output circuit 8 (point j in FIG. 1), and FIG. 3c shows the timing pulse input to the flip-flop 21a. (point k in FIG. 1), and d in the same figure shows the lock protection operation (point l in FIG. 1).

Next, the operation at startup will be explained. The output of the output circuit 8 at startup has a waveform as shown in Figure 3b, which sets the speed at which the variable speed circuit 7 rotates when the power is turned on, but the motor M does not suddenly reach the set rotation speed, so the rotation speed changes. The output circuit 8 continues to drive the motor M until the number of rotations reaches the set rotation speed (the third
Figures a, b). When the rotation speed reaches the set rotation speed, the output circuit 8 becomes L level and stops driving the motor M. It has been increasing until now, and even if it stops driving, some overshoot will occur depending on the inertia and load conditions, and then control will shift to keep the rotation speed constant. The delay circuit 21 picks up the rising edge of power-on at time _t1 , resets the flip-flop 21a, and manipulates the lock protection signal to create a state in which the lock protection is not applied.
In other words, when the flip-flop 21a is reset, an H level signal is output from the output terminal of the flip-flop 21a as shown in FIG. 3d.
Lock protection circuit 9 with transistor Tr ₁ turned on
The non-inverting input of the comparator 15 is set to L level to prevent the lock protection from working.

The output pulse detection circuit ₂ detects the falling edge at time t2 when the output of the output circuit 8 changes from the H level to the L level.
1b is detected by the NAND gate _G1 , and as shown in FIG. 3c, one pulse is output to the set input of the flip-flop 21a to invert the flip-flop 21a. Then, the output of the flip-flop 21a becomes L level, the transistor _Tr1 is turned off, and the signal from the sample and hold circuit 4 is inputted to the comparator 15. Therefore, the protection function of the lock protection circuit 9 starts operating from time _t2 (FIG. 3d). When the rotation speed of the motor M decreases due to overload, the output of the comparator 15 causes the comparator 1 to
The output of No. 3 is cut off and the motor M is stopped.
In Fig. 3e, n indicates the F-V conversion voltage, that is, the sample and hold voltage, and m indicates the resistance R _L1 ,
It shows the lock protection start voltage divided by R _L2 , indicating that the lock protection operation occurred at time _t3 . Further, even if the next falling signal is input at the subsequent rising edge of the output of the output circuit 8, the flip-flop 21a is not inverted and the lock protection circuit 9 remains in the operating state. In this way, in order to create a delay time so that the lock protection circuit 9 does not operate at startup, a large capacitor as in the conventional case is not required, and the circuit can therefore be miniaturized. In the embodiment, a small capacitance capacitor _C1 is used in the output pulse detection circuit 21b, but a one shot multi circuit can be constructed by connecting a large number of switching elements. In this way, it is suitable for IC implementation and further miniaturization is possible.

〔Effect of the invention〕

The present invention provides a switching means for driving a motor, a speed detection means for detecting the rotation speed of the motor, a speed feedback calculation means for calculating the difference between the speed detected by the speed detection means and a set speed, and a speed feedback calculation means for calculating the difference between the speed detected by the speed detection means and a set speed. PWM calculation means for creating a PWM signal such that the difference calculated by the feedback means becomes 0;
The lock protection means is provided with an output means for supplying a driving output pulse to the switching means based on a PWM signal, a lock protection means, and a lock protection stop means, and the lock protection means inputs the speed detection signal of the speed detection means. an output pulse detection circuit that stops outputting a drive signal to the motor when the detected speed falls below a certain level, and the lock protection stop means detects a falling edge of the output pulse of the output means and outputs an operating pulse;
It consists of a holding circuit that is reset when the power is turned on and receives the above operation pulse to hold the operation signal to the lock protection means. Since the operation is stopped, the lock protection circuit's function stop release signal can be generated using the output pulse signal of the output circuit that is originally provided for motor drive, and the lock protection is only activated when the motor is started. It stops the function of the circuit, and does not require any special circuit to generate such a stop release signal. It has the advantage that a more economical circuit can be constructed by using it.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a time chart of the same, and FIG. 3 is a time chart of the same at startup. 8 is an output circuit, 9 is a lock protection circuit, 14 is a power MOSFET that constitutes a switching circuit, 2
1 is a delay circuit.

Claims (1)

[Claims] 1. A switching means for driving the motor, a speed detection means for detecting the rotational speed of the motor, a speed feedback calculation means for calculating the difference between the speed detected by the speed detection means and a set speed, and the speed feedback means PWM calculation means for creating a PWM signal such that the calculated difference is 0;
The lock protection means includes an output means for providing a driving output pulse to the switching means based on the PWM signal generated by the PWM calculation means, a lock protection means, and a lock protection stop means, and the lock protection means is configured to control the speed detection means. A speed detection signal is input, and when the detected speed becomes below a certain level, the drive signal output to the motor is stopped, and the lock protection stop means detects the falling edge of the output pulse of the output means and outputs an operating pulse. It consists of a detection circuit and a holding circuit that is reset when the power is turned on, obtains the operation pulse, and holds the operation signal to the lock protection means. A speed control circuit for a motor, characterized in that the operation of a lock protection means is stopped.