JPH0548993B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video shading correction method, and more particularly to a video shading correction method using digital calculation.

[Conventional technology]

Conventionally, this type of shading correction has been performed by performing analog gain control on the original image signal to be subjected to shading correction.
Although digital shading correction is also performed, A/D converted multivalued video data Ai
The number of bits a bit of the shading correction multiplier Bi, and the number c bits of the video data Ci after the shading correction are all equal, and a=b=c. Furthermore, the purpose is to correct unevenness in the sensitivity of the image sensor itself, slight sensitivity under uniform proofing, and unevenness in the light source.

[Problem that the invention seeks to solve]

The above-mentioned conventional analog type shading correction has the disadvantage that it is difficult to control the gain, and it is generally difficult to achieve accuracy. Also, in the digital shading correction method, a=b=c
Therefore, if the degree of shading is large, it may not be possible to correct it completely, or the value of the effective coefficient Bi for shading correction is often much smaller than 2 ^b -1, resulting in a loss of digits during shading correction, resulting in poor accuracy. The drawback is that it cannot be maintained.

For this reason, when using a video sensor on a factory line, etc., where there is large illuminance unevenness, or when a wide-angle lens is used and there is a large decrease in peripheral illuminance, sufficient shading correction is not performed, which is a problem. There is.

An object of the present invention is to eliminate the above-mentioned problems, and to use a shading correction multiplier whose number of bits is larger than the number of bits of input multi-level video data that has been A/D converted in digital shading correction, the correction width is An object of the present invention is to provide a video shading correction method that allows a large amount of correction.

[Means for solving problems]

The video shading correction method of the present invention is based on the original multilevel video data Ai for the i-th pixel.
a bit of , b of the shading correction multiplier Bi
Video data after bit and shading correction Cic
In bits, there is a relationship c≦a<b,
It is constructed by performing digit alignment that satisfies Ci=Ai·Bi/2 ^d and b-1≧d≧[a/2]. As a result, the correction magnification can be set from (2 ^b -1)/2 ^d to 0 in 1/2 ^d increments. d is set to a large value when the degree of shading is small and the correction is to be performed thinly, and d is set to a small value when the degree of shading is large and a high magnification is required.

Also, in Ci=Ai・Bi/2 ^d , Ci=≧2 ^c −1
In this case, it is possible to reduce errors caused by missing upper bits by adding an additional means to prevent overflow by setting Ci = 2 ^c -1.

Furthermore, in Ci=Ai・Bi/2 ^d , Ci=
By adding an additional means for rounding down to 0 to 1 as [(Ai·Bi+2 ^d -1)/2 ^d ], it is possible to reduce the error caused by the truncated lower bits.

Furthermore, by shifting the outputs of Ai and Bi, d can be changed and the correction magnification can be changed.

Here, [X] or [X] HA represents an integer arithmetic symbol that is the largest integer not greater than X or the smallest integer not less than X, respectively. For example, [5.0] = 5, [5.1] = 5, [-1.1] = -2, [5.1]
=
6 is shown.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention, showing a case where an additional mechanism for overflow protection and an additional mechanism for discarding zero are provided. In the figure, 16
_A0 to _{A15 16} -bit input of bit multiplier 3
8-bit multi-level video data Ai1 to A ₇ , A ₈ ~
_Set “0” to A ₁₅ , B ₀ to B ₁₅ of 16-bit input
B ₁₁ to 12-bit shading correction data Bi2
, "0" is input in B ₁₂ to _{B 15} . on the other hand,
_S0 of 32-bit output of _S0 to _S31 of 16-bit multiplier 3
~Do not use d-1 = 8 bits of S ₇ , and use S ₈ (=Sd)
is set as carrier 18 for 0 to 1, and S ₉ to S ₁₆
is used as 8-bit shaded correction intermediate data 5, and the 4 bits of _S17 to _S20 are input to the OR gate 9 as overflow 6 to create OR output 11, and _S21 to _S31 are not used. . Furthermore, the 8-bit shedding correction intermediate data 5 of _S9 to _S16 is input to the 8-bit inputs of _E0 to _E7 of the 8-bit adder 8, and the other 8-bit inputs _F0 to _F7 are Bittomo”
0", the carrier 18 of _S8 is input to the carrier input Cin and 0 is discarded and 1 input is performed to obtain the 8-bit addition output 13 of G ₀ to _{G 7.} This addition output 13 is input to the gate circuit 15. In the gate circuit 15, the logical sum output 11 of the OR gate 9 and the logical sum output 14 of the carrier 10 of the adder 8 is given as a control input via the OR gate 12, and the logical output 14 is "1", that is, In the event of an overflow, all C ₀ to _{C 7} of the gate output 16 become high impedance, and all are shut down by the receiving circuit.
1", that is, FF _H (=2 ^c -1). If no overflow occurs, the gate circuit 15 is opened and C ₀
=G ₀ , C ₁ =G ₁ . . .C ₇ =G ₇ , and the 8 bits from C ₀ to C ₇ become video data Ci after shading correction. Note that the overall synchronization clock 17 is input to the multiplier 3 and the adder 8. Further, in this embodiment, a=8, b=12, c=8, and d=9, so that a correction multiplier of up to about 8 times can be multiplied.

FIG. 2 is a block diagram of another embodiment of the invention.
This figure shows a case in which a correction magnification variable mechanism other than the overflow countermeasure addition mechanism and zero-to-one addition mechanism shown in FIG. 1 is provided. In the figure, S ₈ ~ in Figure 1
The output of S ₁₆ can be changed to S ₅ ~ _{S 13} , S ₆ ~ S ₁₄ , S ₇ ~ S ₁₅ , and 12 4
A multiplexer circuit 19 with one input and one output is provided. This multiplexer circuit 19 receives a 2-bit d control control signal for changing d.
19, you can choose from the four types mentioned above. As a result, when the level of the Ai input is low, the correction magnification can be increased by decreasing the value of d.

FIG. 3 is a functional block diagram when the shading correction device of FIG. 1 is used for correction of a one-dimensional CCD camera. Figure 3 shows a video control circuit 20, a one-dimensional CCD camera 21, an amplifier 23,
8-bit A/D converter 24, address generation circuit 27, shading correction multiplier data RAM 2
9 and a shading correction device 32.

First, the one-dimensional CCD camera 21 is driven by the clock 25 from the video control circuit 20.
The analog video output 22 from the one-dimensional CCD camera 21 is amplified by the amplifier 23, and this signal is converted into 8-bit A/D by the 8-bit A/D converter 24 at the timing of the clock 25 to generate 8-bit original video data 30. make. on the other hand,
For reading the shading correction multiplier data,
Timing output 26 from video control circuit 20 enters address generation circuit 27 to generate address 28. Shading correction multiplier data
By inputting the 12-bit shading correction multiplier data 31 from the RAM 29 into the shading correction device 32 at the same time as the clock 25, shading correction data 33 is created.

In this case, if the shading correction multiplier data of the i-th pixel is Bi, the average of the original multi-valued video data is i, and the average value of the target corrected video data level is A _V , then Bi=A _V・2d/Ai or Bi2 ^b Then, calculate Bi by Bi=2 ^b −1. Note that the calculation of i is performed by setting all Bis to 2, taking in Ci so that Ci=Ai, and setting the average value of Ci to i.

〔Effect of the invention〕

As explained above, in the present invention, by selecting the number of bits such that ca<b when performing shading correction, even when the degree of shading is severe as shown in FIG. 4a, shading correction can be performed over a wide range with sufficient accuracy. This has the advantage that video data that has been created can be obtained.

On the other hand, in the conventional method, as shown in FIG. 5B, a narrow step 34, that is, a digit drop occurs, and an insufficient correction 35 occurs.

By using the present invention, there is no need to pay much attention to uneven illumination at factories and other workplaces, and even when using a wide-angle lens to secure a large field of view at close range, it is possible to sufficiently compensate for the decrease in light intensity in the periphery. effective.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention, and FIG.
The figure is a block diagram of another embodiment of the present invention, Figure 3 is a functional block diagram of an application example of the present invention, Figure 4 is a correction curve by the shading correction of the present invention, and Figure 5 is a conventional complementary curve. be. 1...8-bit multilevel video data (Ai), 2...
...12-bit shedding correction data (Bi),
3...16-bit multiplier, 5...8-bit shedding correction intermediate data, 6...overflow, 8...
8-bit adder, 10...carrier, 13...
...8-bit addition output, 15...gate circuit, 16
...Output after 8-bit shedding correction (Ci),
18... Adder carry input, 19... 4 input 1 output multiplexer.

Claims (1)

[Claims] 1. For the i-th pixel, the number of bits of the A/D-converted multivalued video data A _i is a bit, the number of bits of the shading correction multiplier B _i is b bits, and the video data C after shading correction. When the number of bits of _i is c bits, a digit that satisfies the relationship c≦a≦b and also satisfies C _i =A _i・B _i /2 ^d , b-1≧d≧[a/2] A video shading correction method characterized by performing matching. 2. Claim 1, characterized in that in the above C _i =A _i ·B _i /2 ^d , when C _i ≧2 ^c −1, overflow processing is performed to convert C _i =2 ^c −1. Video shading correction method described in Section 1. 3 In the above C _i =A _i・B _i /2 ^d , C _i =[(A _i・
B _i /2 ^d -1)/2 ^d ], whereby the error caused by the lower bits that are truncated is reduced by rounding down to 0,
and the video shading correction method according to item 2. 4. Claims 1 and 2 are characterized in that in order to make the d variable, a multiplexer is provided to the outputs of the A _i and B _i to make the correction magnification variable.
3. A video shading correction method according to item 3.