JPH0548994B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a display device for a vehicle that stores a video signal to be superimposed that is associated with a sensor of a vehicle. The present invention relates to a display device for a vehicle that can store image signals of many types of images to be superimposed.

[Prior Art] In conventional display devices, when performing decomposition scanning with an imaging means such as a television camera that converts photo-to-electrical signals, a horizontal synchronization signal and a vertical synchronization signal are added to the video signal, and the display CRT transmits the signals. Assembly scanning is performed using a synchronization signal, and when the video signal obtained by the imaging means is assembled and scanned, video signals such as pattern display, graphic display, character display, etc. are sent out from an image storage circuit in which video signals are stored. The video signals are superimposed. The video signals sent out from the image storage circuit are superimposed with a synchronization signal independent of the imaging means when reading those display signals from the image storage circuit, and the synchronization signal of the image storage circuit is used as the synchronization signal of the video signal. Both video signals are mixed by synchronization pull-in so that they match. Note that the image memory of the image storage circuit used at this time stored video signals for each screen.

Furthermore, in the technique disclosed in Japanese Patent Application Laid-open No. 194691/1988, the imaging direction of the imaging means that is variably controlled vertically and horizontally is detected by a sensor that detects the orientation of the imaging means, and the synchronization signal is separated from the video signal of the imaging means. , a technique has been disclosed that uses the separated synchronization signal to variably display a marker indicating the imaging direction.

[Problems to be Solved by the Invention] Since the image memory of such an image storage circuit stores video signals for each screen, it is difficult to store video signals of many types of images to be superimposed. , an image memory with a relatively large storage capacity is required, resulting in high cost, and there are problems in miniaturization.

The technology for reducing the storage capacity for storing video signals to be superimposed was
There are techniques published in JP-A-165674 and JP-A-54-25630.

These publications disclose techniques for compressing and storing data to be displayed and reading and displaying it redundantly in order to save memory capacity. especially,
For devices such as vehicles where noise in a wide frequency range is expected to enter, it is necessary to avoid synchronization disturbances due to the intrusion of such noise, and to prevent the display screen from becoming difficult to see when displaying images. I can't.

In particular, the video signal is an analog signal,
When noise is superimposed between the video device and the display device that performs the display, the noise causes synchronization disturbance and makes the display screen difficult to see.

Therefore, when displaying blind spots etc. around the vehicle and superimposing detection information from various sensors such as distance information between the vehicle and obstacles and between the vehicle and people, it is necessary to use a wide frequency range. Even if there is noise intrusion, it is necessary to avoid synchronization disturbance caused by such noise and the display screen becoming difficult to see when displaying an image.

The present invention solves the conventional problems and provides a display device for a vehicle that does not require a proportional increase in memory capacity even if the number of types of images that can be stored in an image memory is increased, and is highly noise resistant. The purpose is to provide the following.

[Means for Solving the Problems] A display device for a vehicle according to the present invention includes an imaging means for converting an object to be photographed into a video signal, and a memory for storing an image of an object to be superimposed in correspondence with a sensor attached to a vehicle. an address counter for specifying the address of the image in the image memory; a latch circuit for holding the output of the image of the address counter in units of the number of pixels of a scanning line; Therefore, the output of the address counter held by the latch circuit is
Again, an address feedback circuit that loads the address counter, a parallel-to-serial conversion circuit that converts the data read from the image memory using the output of the address counter into a serial signal, and a parallel-to-serial conversion circuit that converts the video signal from the imaging means and the serial signal. - a common synchronization signal generation circuit that outputs a synchronization signal with the video signal from the direct conversion circuit;
a mixing circuit for mixing the video signal from the direct conversion circuit and superimposing an image signal to be superimposed on the video signal from the imaging means; and a display means for displaying the composite video signal output from the mixing circuit. Consisting of

[Function] In the present invention, the address counter that specifies the address of the image memory that stores the video signal to be superimposed is a latch circuit configured to hold data in units of the number of pixels of a scanning line. With a latch circuit that holds the output in units of the number of pixels of a scanning line, when the same image data is read out from the image memory in consecutive scanning line units, by repeatedly specifying the address of the address counter, It is possible to omit repeatedly storing the same image data in units of scanning lines in the image memory, and it is possible to store video signals of many types of images to be superimposed with a limited memory capacity. In particular, the ignition circuit, flasher, wiper, horn, etc. of a vehicle can cause
Even if noise in a wide frequency range up to the UHF band occurs in the video signal from the imaging device, the synchronization signal generation circuit outputs a synchronization signal between the video signal from the imaging device and the video signal to be superimposed. Therefore, synchronization disturbance does not occur, and the latch circuit holds the video signal to be superimposed in units of pixels of the scanning line, so the image to be superimposed can be addressed by the latch circuit. It is possible to remove the influence of noise that enters during the operation. In addition, since the synchronization signal generation circuit outputs a synchronization signal between the video signal from the imaging means and the video signal to be superimposed, it is difficult for the data of each scanning line to be disturbed due to the influence of noise. Disturbances due to the influence of noise are limited to disturbances in pixel units.

[Embodiment] FIG. 1 is an overall configuration diagram showing an embodiment of a vehicle display device using the vehicle display device of the present invention.

The imaging camera 1 includes an imaging tube that is scanned by an imaging drive circuit 8, or an imaging means that converts an imaging target into a video signal, such as a solid-state image conversion element such as a MOS image sensor or a CCD image sensor, an optical lens 1a, and an optical lens 1a that adjusts the amount of light. It is equipped with an aperture opening setting means 7 for controlling the camera, and is an imaging camera known as a television camera. The amplifier circuit 2 is for amplifying the video output that is the output of the imaging camera 1.

The waveform shaping circuit 3 is a circuit that removes high frequency components and the like of the video signal that has been photo-electrically converted by the imaging camera 1 and amplified by the amplifier circuit 2, and shapes the waveform to a video signal level for each pixel. The output of the waveform shaping circuit 3 is guided to a nonlinear amplification circuit 4, where the output of the waveform shaping circuit 3 is inputted to a nonlinear amplification circuit 4, which prevents a video signal with an extreme contrast, such as halation, from making the displayed image difficult to see. It suppresses large output values to make the displayed image easier to see, and performs gamma correction using a nonlinear amplification circuit.

The output of the nonlinear amplifier circuit 4 is led to an aperture control circuit 5, and an aperture opening setting means 7 controls the amount of light arriving at the imaging camera 1 via an aperture drive circuit 6 in order to adjust the contrast of the video output after gamma correction. to adjust the degree of opening and closing. Note that the imaging camera 1 and the imaging drive circuit 8 for scanning the imaging camera 1, the amplifier circuit 2, the waveform shaping circuit 3, and the nonlinear amplifier circuit 4 are well-known and are the configurations that are included in general imaging cameras. , to simplify its explanation.

Further, the output of the nonlinear amplifier circuit 4 is fed back to the aperture control circuit 5, the aperture drive circuit 6, and the aperture opening setting means 7 for adjusting the aperture opening, thereby adjusting the aperture state of the imaging camera 1 according to the video output state. The configuration to do this is also known, such as an automatic aperture method.

The mixing circuit 9 is a circuit that superimposes the video signal output of the nonlinear amplifier circuit 4 on the video signal output to be superimposed and the synchronization signal output. The display means 10 displays images by assembling and scanning video signals using a known liquid crystal or CRT.

The memory selection switch circuit 11 is connected to the input port of the control signal generation circuit 21, and is used to select the type of clock pulse input to the address counter 12, latch circuit 13, and buffer memory 14, and selects the type of clock pulse to be input to the video signal to be superimposed. The clock pulse type is selected according to the type of sensor and the output of the sensor.

The address counter 12 specifies a data storage address in the RAM 15, and the latch circuit 13 holds the value of the address counter 12 for a predetermined period of time. The buffer memory 14 is an address buffer that temporarily holds the value of the address counter 12 and uses it for reading from the RAM, and its output side is connected to the address bus. The use of this type of address buffer is the same as known address buffers used for the transfer of addresses. The RAM 15, which serves as an image memory for storing the video signal to be superimposed, stores a digital approximation signal (the 8-bit contents are digital (not weighted). The data memory can be stored by external input.

The output of the RAM 15 becomes the input of the parallel-to-serial conversion circuit 16, and the data read out by addressing the RAM 15 is an 8-bit parallel signal.
It is an 8-bit serial signal, and 8 x 64 pixels superimposed on one scanning line are sent out. This type of parallel-to-serial conversion circuit 16 is a circuit known as a code conversion circuit.

These RAM 15, the address counter 12 for specifying addresses in the RAM 15, the latch circuit 13, the buffer memory 14, and the parallel-to-serial conversion circuit 16 for converting the parallel signals of the RAM 15 into serial signals constitute an image storage circuit.

A superimpose switch circuit 17 selects whether or not it is necessary to superimpose the pattern display signal, graphic display signal, and character display signal to be superimposed on the video signal obtained by the imaging camera. It has a selection switch SW (see Figure 2),
When superimposition is not necessary, the superimpose selection switch SW is used to drop the output of the parallel-to-direct converter circuit 16 to the ground side.

The clock pulse generation circuit 18 as a synchronization signal generation circuit of this embodiment uses frequency division, delay, etc. to generate the scanning signal of the imaging camera 1, the synchronization signal of the video signal, the clock pulse of the address counter 12, the latch circuit 13, the buffer memory 14, and the RAM 15. It serves as a drive source for the control signal generation circuit 21 that generates timing pulses for the parallel-to-serial conversion circuit 16, and the power supply circuit 19 supplies the power supply voltage of the battery 20 to the control signal generation circuit 21 through a constant voltage circuit.
and supplies power to each component of this embodiment. These clock pulse generation circuit 18, power supply circuit 19, and battery 20 are well known, and therefore their explanation will be omitted.

Furthermore, the configuration of the main parts of the vehicle display device of the present invention will be explained in detail with reference to FIGS. 2 and 3.

FIG. 2 shows a specific circuit example of the circuit 50 and the superimpose switch circuit 17 having the mixing circuit 9 as a main part.

In the figure, a video signal from an imaging camera 1 is transmitted through an amplifier circuit 2, a waveform shaping circuit 3, and a nonlinear amplifier circuit 4.
After passing through, it is led to terminal a. The video signal input to the terminal a is amplified by the common collector transistor Q1, and the voltage drop across the resistor R1 is input to the transistor Q2 constituting the emitter follower.
The video signal input to the transistor Q2 causes the voltage between the terminals of the resistor R2 to be input to the transistor Q3 which constitutes a collector-grounded circuit via the resistor R3, and its output becomes the voltage drop across the resistor R5, which is passed through the emitter follower. Constituent transistor Q
4 input, and the output is taken out from resistor R6. The terminal e becomes an input to the display means 10. At this time, a transistor Q1 and a resistor R1 constitute a common collector circuit, a transistor Q2 and a resistor R2 constitute an emitter follower, and a transistor Q constitute a common collector circuit.
3 and a resistor R5, a transistor Q4 and a resistor R6 constituting an emitter follower act as a buffer circuit for the video signal from the imaging camera 1, the synchronization signal, and the video signal from the image storage circuit.

Note that the amplified output of the collector grounded circuit composed of the transistor Q1 and the resistor R1 is inputted to the aperture control circuit 5 from the terminal b, and is fed back to the aperture drive circuit 6 and the aperture opening setting means 7 that adjusts the aperture opening. , adjusts the aperture state of the imaging camera 1 depending on the video output state. Terminal c is the control signal generation circuit 21
When the synchronization signal input is “L”,
The synchronizing signal is pulled to the low potential side via the resistor R4 and the diode D1, and is superimposed on the low potential side of the video signal input to the terminal a. The output signal of the superimpose switch circuit 17 is input to the terminal d, and the superimpose switch circuit 17 inputs the video signal from the image storage circuit to the terminal f as an "H (high level)" or "L (low level)" signal. is entered as . When the "H" signal is input, a base current flows through the transistor Q11 via the resistor R11, the transistor Q11 is turned on, and the potential at the connection point between the series resistor R12 and the resistor R13 is input to the transistor Q3. This value is set to be below the low level of the video signal. When the “L” signal is input to the terminal f, the transistor Q11 is turned off and the resistor R
12 and diode D2, the input potential of transistor Q3 is raised.

Then, the signal level of the video signal input to transistor Q3 is increased. That is, normal CRT
When used as a display means, the video signal from the image storage circuit is superimposed at the white level. At this time, when the superimpose selection switch SW is turned on, the anode side of the diode D2 becomes the ground potential, and the diode D2 becomes reverse biased, so the superimpose function does not operate regardless of the input to the transistor Q11. .

Further, FIG. 3 shows a specific circuit example of the image storage circuit 60.

In the figure, the address counter 12 consists of four 4-bit counters 12 ₁ to 12 ₄ and basically constitutes a binary coded 2 ⁿ -ary counter. A clock pulse _m3 is input to the counter ₁₂₁ ,
The count-up is performed by the clock pulse _m3 , and the outputs of the four counters ₁₂₁ to ₁₂₄ constituting the address counter 12 are stored in the buffer memory 1.
4 ₁ and 14 ₂ are input. buffer memory 14
The contents input to ₁ and 14 ₂ are stored in two RAM1
The signals are input to the RAMs 15 ₁ and 15 ₂ via the address bus for addressing of the RAMs 15 ₁ and 15 ₂ .
Switching between the RAM 15 ₁ and the RAM 15 ₂ is performed by the most significant bit of the address counter 12 ₄ . By addressing the RAMs ₁₅₁ and ₁₅₂ , data is loaded into the 8-bit parallel-to-serial converter circuit 16 by a timing pulse _m2 , and 8-bit parallel data is sequentially output in series by a clock pulse _m1 .

In other words, for every 8 pulses of the clock pulse _m1 , the timing pulse _m2 loads the data of the RAM ₁₅₁ or ₁₅₂ once.
The addressing of 15 ₁ and 15 ₂ is also the same as the period of the timing pulse _m2 , and the address counter 1
2 ₁ clock pulse m ₃ is clock pulse m ₁ 8
The frequency is 1/1.

Data read from RAM is output in units of 8-bit pixels, but the number of pixels in the effective screen width in one scanning line is set to 512, and 8-bit information is output from address 0 to one scanning line. Up to number 63,
It is superimposed on the video signal obtained on the imaging camera 1 side. The number of scanning lines of the effective screen height is set to 244, and the 16th bit and higher bits of the address counter ₁₂₂ specify the number of scanning lines of the video signal obtained on the imaging camera side. Therefore, when the scanning of the effective screen height is completed, it is cleared by clear pulses _m4 and _m5 . In this way, 8-bit data is read out, data from addresses 0 to 63 is superimposed on one scanning line, and data from addresses 64 to 125 is superimposed on the next scanning line. The stored pixels for each bit of data can be superimposed on the display means.

However, when superimposing glyphs such as characters, it is not necessary to use a large number of image memories to read out the contents, but to repeatedly read the data stored in the image memory at a specific address a predetermined number of times and then Superimposition can be achieved by superimposing the data on the scanning line of the video signal obtained on the imaging camera 1 side and placing the data on the scanning line multiple times with the same address specification.

That is, by clock pulse _m3 , from address 0
After counting up to address 63, the outputs of the address counters 12 ₂ and 12 ₃ in units of scanning lines b ₆ ~
The output state of _b10 is latched by the latch circuit 13, and the same address is repeatedly specified. In this embodiment, the through signal _m6 is generated so as to specify the same address 10 times. Therefore, in this embodiment, data of 10 scanning lines can be superimposed by using the through signal _m6 10 times, so when superimposing a glyph such as a character,
The number of image memories in the RAM 15 can be reduced.

Note that writing to the RAMs 15 ₁ and 15 ₂ that store video signals to be superimposed can be performed as follows.

A digital value is input to the RAM write address designation information side input, and an image to be superimposed is decomposed and input to the RAM write data information side input. Addressing information input to the RAM write addressing information side is sent to the RAMs 15 _{1 and 15 2 via buffer memories 30 1 and 30 2} .
address bus. Also, RAM
Write data information is connected to the data buses of RAMs 15 ₁ and 15 ₂ via a data register 31 . The external input control signal is passed through a decoder 32 as a read timing signal for the buffer memories 30 ₁ and 30 ₂ and a read timing signal for the data register 31 . That is, the select inputs S1 and S2 of the external input control signal are set to "H",
When “H” is input to the enable input E and “L” is input, the RAM write address designation information is led to the address bus via the buffer memories 30 ₁ and 30 ₂ , and the RAM write data information is led to the address bus via the data register 31. can be routed to the data bus. At the same time, buffer memories 14 ₁ and 14 ₂ are released from the address bus. At this time, if the external input control signal makes the terminal WR “L”, the RAM
15 ₁ and 15 ₂ write RAM write data information to addresses according to RAM write address designation information.

Note that the RAM write address designation information supplied to the buffer memories 30 ₁ and 30 ₂ may be performed by mechanical switch operation, or may be performed using a binary coded 2 ^n- ary counter. Alternatively, this may be done by simultaneously reading address information and data information from RAM or ROM.

In addition, when receiving an image to be superimposed sent from an external image memory or microcomputer, etc., a terminal for external input control signals is used.
When RD is set to "L" and the output of an external image memory or microcomputer is connected as RAM write data information, RAM15 ₁ and RAM15 ₂
can release the data bus and send out the RAM write data information supplied to the data register 31 directly via the parallel-to-serial conversion circuit 16.

In the vehicle display device of this embodiment, the imaging means converts the object to be photographed into a video signal, the converted video signal is waveform-shaped by the waveform shaping circuit, and then guided to the nonlinear amplification circuit to improve the contrast of the video signal. Gamma correction is performed to prevent saturation, and the output of the nonlinear amplifier circuit is input to a mixing circuit. The mixing circuit mixes the video signal and the synchronization signal read from the video signal image memory to be superimposed which stores the video signal, characters, figures, etc. to form a composite video signal, and has a display means. As input to the receiver, a pattern signal, a graphic signal, a character signal, etc. are superimposed and displayed on the image of the photographed object using a display means.

In this way, the vehicle display device of this embodiment converts the object to be photographed into a video signal by the imaging means, and
The video signal is input to a mixing circuit, and the video signal to be superimposed, which stores characters, figures, etc. on the video signal, is mixed with the video signal and synchronization signal read from the image storage circuit, and composited. The video signal is used as an input to the display means, and the display means superimposes a pattern display signal, a graphic display signal, a character display signal, etc. on the image to be photographed and displays it. Since the synchronization signal generation circuit can be shared without requiring each independent synchronization signal generation circuit, miniaturization is easy, and noise resistance can be improved by sharing the synchronization signal generation circuit.

Therefore, the vehicle display device of this embodiment is installed in a car, etc., and displays images of blind spots around the vehicle, and also detects various sensors such as distance information between the vehicle and obstacles, and between the vehicle and people. A display device used as a driver's steering assistance information source for a vehicle, which displays information in a superimposed manner, or displays various monitoring information of the vehicle in a superimposed image during normal driving conditions, especially in a vehicle. It can be used as a vehicle display device that superimposes vehicle information, vehicle position information, etc. onto a video signal that captures images of the surrounding area.

Therefore, the vehicle display device of this embodiment is suitable for use in vehicles where noise in a wide frequency range from the medium wave band to the UHF band is likely to enter due to ignition circuits, flashers, wipers, horns, etc. This means that if the video signal and pattern signal each have independent synchronization signals, if noise is added to one of them, synchronization will be disturbed in each scanning line, making the display screen difficult to see when displaying an image. There is no.

In other words, synchronization disturbance on a scanning line basis becomes less likely to occur,
It does not become difficult to see due to pixel-by-pixel noise.

In the vehicle display device according to the embodiment of the present invention shown in FIG. 1, the image storage circuit that outputs the video signal to be superimposed stored in the image memory stores the video signal to be superimposed. RAM15, RAM1 as image memory
an address counter 12 for specifying addresses of 5;
Latch circuit 13, buffer memory 14, RAM1
However, when implementing the present invention, as shown in a specific circuit example of the image storage circuit 60 in FIG. It is also possible to adopt a circuit configuration in which an image to be superimposed is sent from an external image memory or a microcomputer. The signals sent from these external image memories or microcomputers, etc. can also be data selected by the output of reading data stored in the image memory according to the type of sensor and the output of the sensor. . Note that the circuit configuration that selects and reads data stored in the image memory according to the sensor type and sensor output may switch the image memory unit depending on the sensor type, or may change the image memory unit depending on the sensor type. The initial value of the address counter 12 may be made to correspond. At this time, a value corresponding to the sensor type is transferred from another memory to address counter 1.
Just set it to 2. Furthermore, if a memory separate from the image memory that stores the number of pixels per scanning line is prepared, the capacity efficiency of the image memory can be further improved by storing the number of repetitions per pixel number of the scanning line. I can do it.

Alternatively, in the above embodiment, a latch circuit is used as a circuit for holding the output of the address counter 12 for specifying the address of the RAM 15 as an image memory that stores the video signal to be superimposed, in units of the number of pixels of the scanning line. However, when implementing the present invention, the present invention is not limited to the latch circuit described above, but may be a circuit that controls the clock pulse and carry signal of the address counter 12.

In addition, in the image storage circuit that outputs the video signal to be superimposed stored in the image memory according to the embodiment of the present invention shown in FIGS. Counter 12 and latch circuit 1
3. Although the buffer memory 14 and the parallel-to-serial conversion circuit 16 convert the parallel signals of the RAM 15 into serial signals, when implementing the present invention, RAM or ROM may be used as the image memory, The latch circuit 13 for repeating reading multiple times can also be omitted.

In the embodiment of the present invention shown in FIG. 1, the memory selection switch circuit 11 changes the method of reading out the image memory. By selecting a unit of image memory or specifying an address of the image memory using the switch circuit 11, data corresponding to the state of the vehicle can be displayed on the display means, and it can be used as a steering assist device.

In this embodiment, the output of the nonlinear amplifier circuit 4 is obtained to adjust the opening of the aperture opening setting means 7, but the opening/closing degree of the aperture of the imaging camera 1 can also be adjusted using other light receiving elements. can do. Either method may be adopted when implementing the present invention. but,
If the output of the nonlinear amplifier circuit 4 is used as in this embodiment, no other light receiving element is required, and there is no need to provide a light receiving element in the imaging camera 1, so that the camera 1 can be miniaturized. Since the degree of opening and closing of the aperture is adjusted by determining the signal level of the video signal, the degree of opening and closing of the aperture can be accurately controlled.

[Effects of the Invention] As described above, the vehicle display device of the present invention includes an address counter that specifies the address of an image memory that stores a video signal to be superimposed;
By means of a latch circuit that holds the output of the address counter in units of the number of pixels of a scanning line, it is possible to repeatedly specify the address of the address counter, without repeatedly storing the same image data in units of scanning lines in the image memory. Since it can be read out, it is possible to store video signals for superimposition of many types of images with limited memory capacity, and even if the number of types of images that can be stored in the image memory increases, the memory capacity will be There is no need to make it larger. Therefore, downsizing is possible.

In addition, since the synchronous signal generation circuit is shared by the imaging means and the image storage circuit, it is easy to downsize.
And by sharing the synchronization signal generation circuit,
Disturbances due to the influence of noise are less likely to occur in the data in units of scanning lines, and even if noise intrudes, the disturbances will only occur in units of pixels, and the image signal from the imaging means and the superimposed target will be The probability that synchronization disturbance with the signal will occur is small, and the display screen will not become difficult to see. Therefore,
Noise resistance can be improved.

Then, the output of an address counter that specifies the address of the image memory that stores the video signal to be superimposed is held by a latch circuit in units of the number of pixels of a scanning line, and the video signal from the imaging means and the image Since the video signal from the memory is mixed with the video signal to be superimposed on the video signal from the imaging means, and the video signal is displayed on the display means, noise in a wide frequency range is generated. However, since the latch circuit holds the video signal to be superimposed in units of pixels of the scanning line, it is possible to eliminate the influence of noise that enters up to the address specification.

[Brief explanation of the drawing]

FIG. 1 is an overall configuration diagram showing an embodiment of a vehicle display device using the vehicle display device of the present invention, and FIG. 2 is a diagram showing a circuit including the mixing circuit of the above embodiment as an essential part and a superimpose switch circuit. FIG. 3 is a circuit diagram showing a specific circuit example of the vehicle display device of the embodiment. In the figure, 1...Imaging camera, 3...Waveform shaping circuit, 4...Nonlinear amplification circuit, 5...Aperture control circuit, 6...Aperture drive circuit, 7...Aperture opening setting means, 8...Imaging Drive circuit, 9...Mixing circuit, 1
0...Display means, 11...Memory selection switch circuit, 12...Address counter, 13...
...Latch circuit, 14...Buffer memory, 15...
. . RAM, 16 . . . parallel-to-direct conversion circuit, 17 . . . superimpose switch circuit, 21 . . . control signal generation circuit, 60 . . . image storage circuit. In addition, in the figures, the same reference numerals and symbols indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. Imaging means for converting a photographic subject into a video signal; various sensors attached to a vehicle; an image memory for storing images of a superimposed subject associated with the various sensors; and the image. an address counter that specifies the address of an image in a memory; a latch circuit that holds the output of the image of the address counter in units of the number of pixels of a scanning line;
an address feedback circuit that loads the output of the address counter held by the latch circuit into the address counter again; and a parallel circuit that converts the data read from the image memory using the output of the address counter into a serial signal.
a common synchronizing signal generation circuit that outputs a synchronizing signal between the video signal from the imaging means and the video signal from the parallel-to-serial conversion circuit; a mixing circuit that mixes the video signal from the conversion circuit and superimposes an image signal to be superimposed on the video signal from the imaging device; and a display device that displays the composite video signal output from the mixing circuit. A vehicle display device characterized by: