JPH0552684B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a source follower circuit using MOS transistors.

Background Art As shown in FIG. 1, such a circuit includes a source follower transistor Q1 and a current source transistor Q2.
The input signal to the gate of transistor Q1 is the bias voltage E to the gate of transistor Q2.
are supplied respectively. The output is derived from a common connection point between the sources and drains of both transistors.

FIG. 2 is a schematic structural diagram when the circuit of FIG. 1 is integrated, and shows the case of an N-channel transistor. P wells 2 and 3 are formed in the N type semiconductor substrate 1, and N wells 2 and 3, which are the source and drain of the transistor Q1, are formed in the P well 2, respectively.
Mold regions 4 and 5 are formed. Furthermore, N-type regions 6 and 7, which are the source and drain of the transistor Q2, are formed in the P-well 3, respectively. 8,9
indicates the gate of each transistor. The source and P-well of each transistor are at the same DC potential.

In this configuration, a junction capacitance exists between the P-well 2 and the drain 4 of the transistor Q1, that is, the circuit power supply _VDD, and is equivalent to C1 as shown in FIG. Note that C2 in FIG. 3 is the diffusion capacitance due to the diffusion potential. Therefore, transistor Q1 requires charging and discharging of these capacitances, which results in a reduction in operating speed. In addition, these capacitors are parallel to the load in terms of AC, and since there is a relationship of C = 1/V ² with respect to the applied voltage V, the load will fluctuate due to fluctuations in the output voltage. This causes output distortion.

DISCLOSURE OF THE INVENTION An object of the present invention is to provide a source follower circuit with improved operating speed and no output distortion.

A source follower circuit according to the present invention includes a source and a drain of a conductivity type opposite to the first conductivity type formed in a semiconductor layer of a first conductivity type, and supplying a potential according to an input signal to an intermediate layer between the source and the drain. A source follower circuit using a source follower MOS transistor comprising a gate and a voltage source supplying a predetermined potential to the drain,
The method is characterized in that biasing means for biasing the first conductivity type semiconductor layer is provided at the source output via a voltage follower circuit.

Embodiments Examples of the present invention will be described below with reference to the drawings.

4 to 6 are circuit diagrams of embodiments of the present invention, and parts equivalent to those in FIG. 1 are designated by the same reference numerals. A transistor Q3 having a source follower output as a gate input is provided, the drain of this transistor is applied with V _DD , and the source is connected to the drain of the current source transistor Q4. A bias E is supplied to the gate of this transistor Q4, and the sources of both transistors Q3 and Q4 are common to the P well. The P-well and source of the source follower transistor Q1 are electrically separated, and the P-well is shared with the source of the transistor Q3.

FIG. 5 shows another embodiment of the present invention, in which a transistor Q5 having a gate commonly connected to the gate of the transistor Q1 is provided, and V _DD is applied to the drain of this transistor,
The source of this transistor is commonly connected to the drain of current source transistor Q6. A bias E is supplied to the gate of this transistor Q6. And source follower transistor Q
The P-well and source of transistor Q5 are electrically separated, and this P-well is shared with the source of transistor Q5.

FIG. 6 shows another embodiment of the present invention, in which the output of a voltage follower circuit 10 inputting the source output of transistor Q1 is supplied to the P-well of transistor Q1.

A partial equivalent circuit of the embodiment shown in FIGS. 4 to 6 above is shown in FIG. 7, in which a voltage follower circuit 1 is connected between the source of the transistor Q1 and the P well.
1 is connected. C2 in this case is different from the diffusion capacitance C2 in FIG. 3, and is the source junction capacitance of the transistor Q1. Here, C1 becomes the output capacitance of the source follower circuit and needs to be charged and discharged by the output signal, but one end of C1 and the transistor Q1
In terms of direct current, a constant bias is always applied to the source of Q1 by the potential difference between the input and output of the voltage follower circuit 11, and in terms of alternating current, it is at the same potential as the source of transistor Q1. In this case, C1
is charged and discharged by the output of the voltage follower circuit 11, and is not charged and discharged by the source output of the transistor Q1 itself. Furthermore, since both ends of C2 are at the same potential in terms of alternating current, it is not charged or discharged by the source output of transistor Q1. Therefore, these equivalent capacitances do not exist equivalently.

Effects As described above, according to the present invention, the junction capacitance of the MOS transistor is equivalently eliminated, making it possible to improve the operating speed and eliminate output distortion.

[Brief explanation of the drawing]

Figure 1 is a diagram showing a conventional source follower circuit.
Figure 2 is a configuration diagram of the case of integrating the circuit in Figure 1;
Figure 3 is a partial equivalent circuit diagram of the circuit in Figure 1, Figures 4 to 6 are circuit diagrams of embodiments of the present invention, and Figure 7 is a partial equivalent circuit diagram of the circuit in Figures 4 to 6. It is a circuit diagram. Explanation of symbols of main parts, Q1...source follower transistor, Q3, Q5...MOS transistor, C1, C2...junction capacitance, 10
...Voltage follower circuit.

Claims (1)

[Claims] 1. The first semiconductor layer formed in a first conductivity type semiconductor layer.
A source follower MOS transistor comprising a source and a drain of a conductivity type opposite to the conductivity type, a gate that supplies a potential according to an input signal to an intermediate layer between the source and the drain, and a voltage source that supplies a predetermined potential to the drain. 1. A source follower circuit using a source follower circuit, characterized in that a bias means for biasing the first conductivity type semiconductor layer is provided at the source output via a voltage follower circuit.