JPH0553404B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an AC coupling circuit, and particularly to an AC coupling circuit suitable for AC coupling various circuits in semiconductor integrated circuits and the like.

[Conventional technology]

A semiconductor integrated circuit is made up of various circuits, and many of these circuits operate at different operating potentials. For this reason, it is known that when circuit blocks having different operating potentials are connected, each circuit block is connected via a capacitor. Such CR type coupling circuits are described in E.D.N., Seamos Gates in Linear Applications (1973), pp. 43-48 (EDN,
CMOS, gates in linear applications, Mar,
5, 1973, PP42-48),
A device in which a linear high resistance is used as the resistor R is known. In addition, as a device using a nonlinear switch for the resistor R, IE Journal of Solid State Circuits, SC 13, June 1978, pp. 294-298 (IEEE,
Journal of solid State Circuits SC−13, June,
1978, PP294-298) is known.

[Problem that the invention seeks to solve]

The former of the above conventional technologies increases the time constant for signals by using a linear high resistance as the resistor R, so it is possible to transmit signals even in the low frequency range, but the resistor R is This requires a large-area resistor chip, and also requires a large time constant for the bias power supply, resulting in a problem that the settling time of the bias voltage becomes long.

On the other hand, since the latter conventional technology uses a nonlinear switch for the resistor R, it is possible to shorten the settling time of the bias voltage compared to the former technology, but the bias voltage must be applied by a switch, and the bias voltage has to be applied continuously. There was a problem that it could not adapt to the signal.

The present invention has been made in view of the above-mentioned conventional problems, and an object thereof is to provide an AC coupling circuit that can increase the time constant for signals and decrease the time constant for bias voltage. .

[Means for solving problems]

To achieve the above object, the present invention provides a high input impedance amplifier whose operation is centered on a second reference potential different from the first reference potential of a signal source voltage having a first reference potential; a coupling capacitor for guiding the signal source voltage to the input side of the high input impedance amplifier; and a nonlinear impedance element that has a low impedance when the signal source voltage has a large amplitude and a high impedance when the signal source voltage has a small amplitude. and a bias power source that supplies a bias voltage equal to the second reference potential to the high input impedance amplifier side terminal of the coupling capacitor via the nonlinear impedance element.

[Effect]

When the bias voltage changes transiently, such as when power is applied, and a voltage exceeding the nonlinear region is applied to the semiconductor resistance element as a nonlinear impedance element, the semiconductor resistance element functions as a low impedance impedance element. The coupling capacitance is charged within a short time. On the other hand, when a voltage in a nonlinear region (signal source voltage) is applied to a semiconductor resistance element during steady operation, the semiconductor resistance element functions as a high impedance element, and even if the coupling capacitance is small, the time constant for the signal is Can be made larger.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 1 shows the configuration of a preferred embodiment of the present invention. In FIG. 1, diodes 31 and 32 as nonlinear impedance elements are connected to the input terminal 12 and output terminal 13 of the inverter amplifier 10.
are connected in parallel in opposite directions. The input terminal 12 is connected to the terminal 11 via a capacitor 40 as a coupling capacity, and the terminal 11 is connected to a voltage source 201 as a signal source 200 and a bias voltage source 2.
Connected to 02.

Diodes 31 and 32 are inverter amplifier 10
It forms a feedback circuit for the capacitor 40 as well as a charging/discharging circuit for the capacitor 40, and as shown in FIG. 2, it is composed of a semiconductor resistance element whose voltage-current characteristics are non-linear. Diodes 31, 32
When a voltage exceeding the nonlinear region is applied across the diodes 31 and 32, a forward current flows through the diodes 31 and 32, and the diodes 31 and 32 function as low impedance elements. On the other hand, when a voltage in a nonlinear region (signal source voltage) is applied to the diodes 31 and 32 during steady operation, an extremely small amount of current does not flow through the diodes 31 and 32, so the diodes 31 and 32 act as high impedance impedance elements. It will function as

That is, the rectification equation for the diodes 31 and 32 is expressed by the following equation.

I _D = I _S (eq VO/k T-1) ...(1) Here, the differential resistance of diodes 31 and 32 is r _D
Then, r _D =V _T /(I _D +I _S ), where V _T =kT/
q, = 26mV.

Since I _S is on the order of 10 ^{−17 to −18} A, when I _D is around 0, it is about 10 ¹⁵ Ω, and the diodes 31 and 32 function as resistance elements with extremely large resistance values.

The inverter amplifier 9 is an inverting amplifier with high input impedance, and is composed of a P-channel MOS transistor 16 and an N-channel MOS transistor 15, as shown in FIG.
Then, terminal 17 is connected to the power supply, and input terminal 12
A bias voltage of approximately 1/2 of the power supply voltage is applied to the

In the above configuration, the inverter amplifier 10
When the signal source 200 that outputs a signal source voltage (first reference potential) at a level different from the operating potential (second reference potential) of the inverter amplifier 10 is connected via the capacitor 40, the inverter amplifier 10 When a power supply voltage is applied to the inverter amplifier 10, a DC potential difference that exceeds the nonlinear region of the diodes 31 and 32 transiently occurs between the input and output of the inverter amplifier 10.
When the input terminal 12 has a higher potential than the output terminal 13, a current flows through the diode 32, and when the opposite occurs, a current flows through the diode 31.
Capacitor 40 is charged. As a result, the input terminal 12 side of the capacitor 40 is connected to the inverter amplifier 1.
The inverter 10 is rapidly charged to a voltage at which the input/output potential difference of 0 becomes almost 0, that is, the threshold voltage of the inverter 10.

When the capacitor 40 is charged, the potential difference between the input and output of the inverter amplifier 10 becomes approximately 0V, so
Both diodes 31 and 32 function as high-resistance resistance elements. Therefore, in a steady state after the capacitor 40 is charged, an AC signal from the signal source 200 is input to the inverter amplifier 10 via the capacitor 40, and is amplified by the inverter amplifier 10 to a signal with a predetermined amplification degree. It will be output from the rear output terminal 13.

In this way, in this embodiment, even if the capacitance of the capacitor 40 is reduced, the diodes 31 and 32 function as high impedance elements for AC signals, increasing the time constant for AC signals. I can do it. Furthermore, since the diodes 31 and 32 function as low impedance elements with respect to the bias voltage, the time constant with respect to the bias voltage can be reduced. For this reason, the capacitor 40
Even if the capacitance is made small, signals in the low frequency range can be amplified and the settling time of the bias voltage can be shortened. Furthermore, even when the inverter amplifier 10 is mounted on an integrated circuit, the capacitor 40 can be configured with a small capacity, so that size reduction can be achieved. Furthermore, since the inverter amplifier 10 and the signal source 200 are coupled in an alternating current manner, even if the power supply voltage fluctuates or the ambient temperature fluctuates, the operating potential is less likely to fluctuate than with a direct current coupled one. Can be suppressed.

FIG. 4 shows an embodiment in which the inverter amplifier 10 is connected to an oscillator 100 that operates with a higher operating potential than the operating potential of the inverter amplifier 10. In FIG.

The oscillator 100 includes transistors 111, 112,
113, 114, diodes 115, 116, resistors 117, 118, capacitor 120, and constant current sources 131, 132, 133, forming an emitter-coupled multivibrator. The emitters of the transistors 113 and 114 are connected to the inverter amplifier 10 via a coupling diode 45. The output side of the inverter amplifier 10 is connected to a CMOS gate 20.

In this embodiment, the inverter amplifier 10 and the oscillator 100 are connected via the coupling diode 45, but since the coupling diode 45 is reverse biased, it functions as a coupling capacitor like the capacitor 40, and the oscillator 100 The AC signal is passed through the coupling diode 45 to the inverter amplifier 1.
0. That is, in this embodiment, when the operating potential of the oscillator 100 is higher than the operating potential of the inverter amplifier 10, the inverter amplifier 10 and the oscillator 100 are connected via the coupling diode 45, and even when the potential difference between them is large, the coupling diode After shifting the DC level by charging both ends of 45 and amplifying the output signal of the oscillator 100 with the inverter amplifier 10,
It is assumed that the CMOS gate 20 is driven.

In this embodiment, as in the previous embodiment, the diodes 31 and 32 constitute a time constant circuit together with the coupling diode 45, and the time constant for the signal is increased.
The time constant for bias voltage can be reduced. Further, in this embodiment, since the oscillator 100 and the inverter amplifier 10 are AC-coupled, the DC level of the oscillator 100 fluctuates and the oscillator 1
Even if the duty ratio of the output signal 00 changes, it is possible to suppress the duty ratio of the output signal of the inverter amplifier 10 from changing.

FIG. 5 shows the configuration of another embodiment of the present invention.

In this embodiment, a capacitor 40 is inserted between the input side of an amplifier 10A and the input terminal 12, and diodes 31 and 32 and a bias power supply 50 are connected in parallel between the input side of the amplifier 10A and the ground. is inserted.

The operating potential of the amplifier 10A is set by the voltage of the bias power supply 50, and when a voltage is applied to the amplifier 10A and a voltage in a nonlinear region is applied across the diodes 31 and 32, the diode 3
1 and 32 function as low impedance elements, and the capacitor 40 is charged in a short time. On the other hand, after the capacitor 40 is charged, the voltage across the diodes 31 and 32 becomes approximately 0V, so the diodes 31 and 32
functions as a high impedance element, and signal components in the low frequency range are also amplified by the amplifier 10A.

In this way, in this embodiment, the bias voltage is obtained from the bias power supply 50 rather than from the feedback output of the amplifier 10A, so the amplifier 10A can be applied to an inverting amplifier or a non-inverting amplifier.

In the above embodiment, when the operating potential of the amplifier 10A is configured with a low voltage one, the bias power supply 5 is
Capacitor 40, diode 3 without using 0
1 and 32 can function as an AC coupling circuit.

As an application of the AC coupling circuit 200, as shown in FIG.
When circuit blocks 1 to 306 are AC-coupled to each other, each circuit block can be used as an integrated circuit for an audio system or a video system by connecting each circuit block through AC coupling circuits 201 to 205. In this case, even if each circuit block has a different operating potential or function, each circuit block can be easily replaced, increasing design freedom and shortening the IC development period. be able to.

In addition, as an application of the AC coupling circuit 200, the seventh
As shown in the figure, a stacked logic circuit 50
It can be used for 0 input circuit.

That is, when the logic circuit 500 is configured with a four-stage stack and has the function of output O = _{I 1 -} I ₂ + I ₃ + I ₄ for inputs I 1 to I ₄ , an AC current is applied to the input circuit of each stage. If the coupling circuits 206 to 209 are inserted, the inputs I ₁ to _{I 4}
It can function as a four-stage stacked logic circuit regardless of the DC level. In this case, since the DC levels of the AC coupling circuits 206 to 209 can be reliably shifted, the number of stack stages can be increased and the amplitude of the output signal of the logic circuit 500 can be reduced. Furthermore, since it is only necessary to flow the current for one stage of the stack, the utilization rate of the power supply can be increased.
A circuit with low power consumption can be realized.

Note that in each of the above embodiments, the diode 3
In addition to bipolar PN diodes as 1,32
MOS diodes or Schottky diodes can also be used. Furthermore, when configuring diodes as semiconductor resistance elements, it is possible not only to connect a pair of diodes in opposite directions, but also to connect the required number of diodes in series depending on the amplitude of the input signal. be.

〔Effect of the invention〕

As explained above, according to the present invention, even if the coupling capacitance is small, the time constant for signals can be increased and the time constant for bias voltage can be decreased, thereby contributing to the miniaturization of integrated circuits. can.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram showing one embodiment of the present invention, and FIG.
3 is a specific configuration diagram of the inverter amplifier 10, FIG. 4 is a configuration diagram showing another embodiment of the present invention, and FIG. 5 is a diagram of another embodiment of the present invention. FIG. 6 is a block diagram showing an applied example of the present invention, and FIG. 7 is a block diagram showing an applied example of the present invention. 10... Inverter amplifier, 10A... Amplifier, 31, 32... Diode, 40... Capacitor, 100... Oscillator, 200-209... AC coupling circuit.

Claims (1)

[Scope of Claims] 1. A high input impedance amplifier whose operation center is a second reference potential different from the first reference potential of a signal source voltage having a first reference potential; a coupling capacitor for leading to the input side of a high input impedance amplifier; a nonlinear impedance element that has a low impedance when the signal source voltage has a large amplitude and a high impedance when the signal source voltage has a small amplitude; and the coupling capacitor. and a bias power source that supplies a bias voltage equal to the second reference potential to the high input impedance amplifier side terminal of the circuit via the nonlinear impedance element.