JPH0557808B2 - - Google Patents
Info
- Publication number
- JPH0557808B2 JPH0557808B2 JP62149079A JP14907987A JPH0557808B2 JP H0557808 B2 JPH0557808 B2 JP H0557808B2 JP 62149079 A JP62149079 A JP 62149079A JP 14907987 A JP14907987 A JP 14907987A JP H0557808 B2 JPH0557808 B2 JP H0557808B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- charging
- circuit
- voltage dividing
- capacitors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000003990 capacitor Substances 0.000 claims description 35
- 238000007599 discharging Methods 0.000 claims description 17
- 238000000034 method Methods 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 210000005036 nerve Anatomy 0.000 description 1
Landscapes
- Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)
- Direct Current Feeding And Distribution (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、充電回路によりコンデンサに充電さ
れた電荷を急速に放電することによつてその放電
電流をそのまま或は光又は磁気等に変換して利用
する充放電装置に関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention rapidly discharges the electric charge charged in a capacitor by a charging circuit, and converts the discharge current as it is or into light, magnetism, etc. The present invention relates to a charging/discharging device used for
この種の装置で特に高電圧大容量のコンデンサ
を用いる場合、通常ペーパコンデンサ或は電解コ
ンデンサを使用している。
In this type of device, especially when using a high-voltage, large-capacity capacitor, a paper capacitor or an electrolytic capacitor is usually used.
しかしながら、前者は高価であり、後者は耐電
圧が500V程度に制限されるために直列接続によ
り耐電圧を高める必要がある。 However, the former is expensive, and the latter has a withstand voltage limited to about 500V, so it is necessary to increase the withstand voltage by connecting them in series.
この場合、電解コンデンサの容量はバラツキが
大きいため各々に均等に充電電圧が加わらず、し
たがつて一方のコンデンサに過電圧が加わつた
り、放電を行わせる過程で電流は一定でもロスが
不平衡となり、コンデンサ特性の劣化を加速さ
せ、寿命上問題がある。そこで、第2図に示すよ
うに、2個の直列接続された電解コンデンサC
1,C2が充電回路1から充電させ、スイツチ回
路2を通して負荷3へその充電電圧を放電させる
冒頭に述べた充放電装置において、電解コンデン
サC1,C2に1/2分圧用の分圧抵抗回路R1,
R2を並列接続するのが周知である。しかし、ロ
スを少なくするために分圧抵抗値を大きくすると
対応して時定数が大きくなり、充電電圧を分圧電
圧に応じて均等にするのに相応の時間を要するこ
とになつていた。 In this case, since the capacitance of the electrolytic capacitors varies widely, the charging voltage is not applied equally to each capacitor, so overvoltage may be applied to one capacitor, and during the process of discharging, the loss may be unbalanced even though the current is constant. , which accelerates the deterioration of capacitor characteristics and causes problems in terms of life. Therefore, as shown in Figure 2, two series-connected electrolytic capacitors C
In the charging/discharging device described at the beginning, in which 1 and C2 charge from the charging circuit 1 and discharge the charging voltage to the load 3 through the switch circuit 2, a voltage dividing resistor circuit R1 for 1/2 voltage division is connected to the electrolytic capacitors C1 and C2. ,
It is well known to connect R2 in parallel. However, when the voltage dividing resistance value is increased in order to reduce loss, the time constant becomes correspondingly large, and it takes a considerable amount of time to equalize the charging voltage according to the divided voltage.
よつて、本発明は、2個の直列接続された電解
コンデンサを用い、分圧抵抗回路でその出力電圧
の1/2に均等に充電させるようになつた充放電装
置において、電解コンデンサの均等充電動作を分
圧抵抗の値を大きくした状態で素早く行わせるこ
とを目的とする。 Therefore, the present invention provides a charging/discharging device that uses two series-connected electrolytic capacitors and charges the electrolytic capacitors equally to 1/2 of the output voltage using a voltage dividing resistor circuit. The purpose is to perform the operation quickly while increasing the value of the voltage dividing resistor.
本発明は、この目的を達成するために、エミツ
タ同志及びベース同志が接続されたnpn形及び
pnp形の2個のトランジスタQ11,Q12のコ
レクタを、それぞれ分圧抵抗回路R11,R12
の抵抗値よりも十分小さな抵抗値のコレクタ抵抗
r11,r12を通して電解コンデンサC11,
C12に正規の極性で並列接続した。そして、こ
れらのコンデンサの共通接続点11をエミツタに
接続し、分圧抵抗回路R11,R12の1/2分圧
端子14aをベースに接続した。
In order to achieve this object, the present invention provides an npn type and a
The collectors of the two pnp transistors Q11 and Q12 are connected to voltage dividing resistor circuits R11 and R12, respectively.
Electrolytic capacitor C11,
Connected in parallel to C12 with proper polarity. The common connection point 11 of these capacitors was connected to the emitter, and the 1/2 voltage dividing terminals 14a of the voltage dividing resistor circuits R11 and R12 were connected to the base.
尚、( )内の符号は後述する実施例のものを
引用してある。 Note that the symbols in parentheses refer to those in the embodiment described later.
共通接続点11が1/2分圧端子14aの電圧に
対して高い場合、一方のトランジスタQ12がオ
ンとなり、高い電圧に充電された側の電解コンデ
ンサC12がオンになつたコレクタ抵抗r12を
通して小さな時定数で素早く放電すると共に、他
方の電解コンデンサC11は素早く充電され、1/
2分圧端子14aの電圧に一致する時点でトラン
ジスタQ12はオフとなる。共通接続点11が1/
2分圧電圧より低い場合には、高く充電された側
の電解コンデンサC11がコレクタ抵抗r11を
通して素早く放電し、他方C12は充電される。
When the voltage at the common connection point 11 is higher than the voltage at the 1/2 voltage terminal 14a, one transistor Q12 is turned on, and when the voltage is small, the electrolytic capacitor C12 on the side charged to a higher voltage passes through the collector resistor r12 which is turned on. While quickly discharging at a constant rate, the other electrolytic capacitor C11 is quickly charged and 1/
Transistor Q12 is turned off at the point in time when the voltage matches the voltage at voltage-dividing terminal 14a. Common connection point 11 is 1/
If the voltage is lower than 2, the highly charged electrolytic capacitor C11 is quickly discharged through the collector resistor r11, while the other C12 is charged.
この均等充電動作は充電過程及び放電過程の双
方で常時に行われる。 This equal charging operation is always performed during both the charging process and the discharging process.
第1図は本発明の一実施例による充放電装置を
示すもので、第2図の場合と同様に2個の直列接
続された電解コンデンサC11,C12が充電回
路としての高電圧発生回路10により、その正の
出力電圧Voが抵抗R11,R12で構成される
分圧抵抗回路14で1/2に分圧充電され、スイツ
チ回路12を通して負荷13へその充電電圧を放
電させる。
FIG. 1 shows a charging/discharging device according to an embodiment of the present invention, in which two series-connected electrolytic capacitors C11 and C12 are connected by a high voltage generating circuit 10 as a charging circuit, as in the case of FIG. , the positive output voltage Vo is divided and charged to 1/2 by a voltage dividing resistor circuit 14 composed of resistors R11 and R12, and the charged voltage is discharged to a load 13 through a switch circuit 12.
そして、本発明により電解コンデンサC11,
C12には、エミツタ同志及びベース同志が接続
されたnpn形及びpnp形の2個のコンプリメンタ
リ接続されたトランジスタQ11,Q12が正規
の極性で並列接続されている。即ちnpn側のコレ
クタはコレクタ抵抗r11を通して正電圧側の電
解コンデンサC11に接続され、pnp側のコレク
タはコレクタ抵抗r12を通してアース側の電解
コンデンサC12に接続されている。さらに、電
解コンデンサC11,C12の共通接続点11は
エミツタに接続され、分圧抵抗回路14の1/2分
圧端子14aはベースに接続されている。 According to the present invention, the electrolytic capacitor C11,
Two complementary connected transistors Q11 and Q12 of npn type and pnp type, whose emitters and bases are connected to each other, are connected to C12 in parallel with normal polarity. That is, the collector on the npn side is connected to the electrolytic capacitor C11 on the positive voltage side through the collector resistor r11, and the collector on the pnp side is connected to the electrolytic capacitor C12 on the ground side through the collector resistor r12. Furthermore, the common connection point 11 of the electrolytic capacitors C11 and C12 is connected to the emitter, and the 1/2 voltage dividing terminal 14a of the voltage dividing resistor circuit 14 is connected to the base.
抵抗R11,R12はロスを生じないように十
分に大きく、かつ1/2分圧用として精密に同一の
抵抗値に設定されている。コレクタ抵抗r11,
r12はトランジスタQ11,Q12の限流抵抗
として機能すると共に、電解コンデンサC11,
C12の充放電の時定数を小さくするようにR1
1,R12よりも十分小さな抵抗値に設定されて
いる。 The resistors R11 and R12 are sufficiently large so as not to cause loss, and are set to exactly the same resistance value for 1/2 voltage division. Collector resistance r11,
r12 functions as a current limiting resistor for transistors Q11 and Q12, and also serves as a current limiting resistor for transistors Q11 and Q12, as well as for electrolytic capacitors C11 and
R1 to reduce the charging/discharging time constant of C12.
1, the resistance value is set to be sufficiently smaller than R12.
このように構成された充放電装置の動作は、次
の通りである。 The operation of the charging/discharging device configured as described above is as follows.
高電圧発生回路10の正の出力電圧Voによる
電解コンデンサC11,C12に対する充電終了
時点或は充電過程で1/2分圧端子14aの電圧は
高精度で1/2Voになるが、静電容量のバラツキに
より充電電圧は正確に1/2Voに設定されていると
は限らない。これにより、もし共通接続点11の
電圧が1/2Voよりも低くなろうとすれば、トラン
ジスタQ11がオンとなつてコレクタ抵抗r11
を通しての瞬間的な電解コンデンサC11の放電
及びC12の充電により1/2Voに達する。逆に、
もし共通接続点11の電圧が1/2Voよりも高くな
ろうとすれば、トランジスタQ12がオンとなつ
て、コレクタ抵抗r12を通して瞬間的な電解コ
ンデンサC12の放電及びC11の充電により1/
2Voに達する。 At the end of charging the electrolytic capacitors C11 and C12 by the positive output voltage Vo of the high voltage generation circuit 10, or during the charging process, the voltage at the 1/2 voltage dividing terminal 14a becomes 1/2 Vo with high accuracy, but the capacitance Due to variations, the charging voltage may not be set accurately to 1/2Vo. As a result, if the voltage at the common connection point 11 becomes lower than 1/2Vo, the transistor Q11 turns on and the collector resistor r11
1/2Vo is reached by momentary discharging of electrolytic capacitor C11 and charging of C12 through. vice versa,
If the voltage at the common node 11 becomes higher than 1/2Vo, the transistor Q12 turns on and momentarily discharges the electrolytic capacitor C12 through the collector resistor r12 and charges C11 to 1/2Vo.
Reach 2Vo.
即ち、分圧抵抗回路14の抵抗値を十分に大き
くしても、トランジスタQ11,Q12のスイツ
チング作用により小抵抗のr11,r12により
小さな時定数で1/2Voに瞬時に電圧調整が行わ
れ、この状態ではトランジスタQ11,Q12が
オフになるために、充電終了後には殆んどロスが
生じない。 That is, even if the resistance value of the voltage dividing resistor circuit 14 is made sufficiently large, the voltage is instantly adjusted to 1/2Vo with a small time constant by the small resistors r11 and r12 due to the switching action of the transistors Q11 and Q12. In this state, transistors Q11 and Q12 are turned off, so almost no loss occurs after charging is completed.
充電終了状態でスイツチ回路12をオンにする
と、負荷13へ電解コンデンサC11,C12か
ら放電電流が供給される。この放電過程でも、同
様な均等放電動作が行われ、一方の電解コンデン
サに異常なロスが生じることもない。 When the switch circuit 12 is turned on in the charging completed state, a discharge current is supplied to the load 13 from the electrolytic capacitors C11 and C12. In this discharge process, a similar uniform discharge operation is performed, and no abnormal loss occurs in one of the electrolytic capacitors.
この充放電装置は、例えば負荷13をコイルと
し、充電電圧を1kV、各電解コンデンサ容量を数
千μFとして、手動もしくは自動でスイツチ回路
12を通して高速放電させ磁気パルスを神経へ加
える生体刺激装置として構成することができる。 This charging/discharging device is configured as a biological stimulator that uses a coil as the load 13, a charging voltage of 1 kV, and a capacitance of each electrolytic capacitor of several thousand μF, which manually or automatically discharges at high speed through a switch circuit 12 and applies magnetic pulses to nerves. can do.
尚、前述の実施例において、出力電圧Voが負
の場合トランジスタQ11,Q12の接続を反転
させて正規の極性になるようにする。また、共通
接続点11が接地され、高電圧発生回路10が正
負の電圧+Vo、−Voを出力する場合も同様であ
る。 In the above-mentioned embodiment, when the output voltage Vo is negative, the connections between the transistors Q11 and Q12 are reversed so that the polarity becomes normal. The same applies when the common connection point 11 is grounded and the high voltage generation circuit 10 outputs positive and negative voltages +Vo and -Vo.
以上、本発明によれば、分圧器とトランジスタ
のコンプリメンタリトランジスタとの組み合せに
より、電解コンデンサの充電電圧をその容量のバ
ラツキの有無に拘らず充電・放電過程及び充電終
了時において均等の分圧電圧に小さな時定数で素
早く設定できる。即ち、電解コンデンサの劣化の
加速が回避され、しかも繰返し放電電流を利用す
る場合にも、直ぐに正規の充電電圧を得ることが
できる。
As described above, according to the present invention, by combining a voltage divider and a complementary transistor, the charging voltage of an electrolytic capacitor is made to be an equal divided voltage during the charging/discharging process and at the end of charging, regardless of the presence or absence of variations in the capacitance. Can be set quickly with a small time constant. That is, acceleration of deterioration of the electrolytic capacitor is avoided, and even when repeatedly discharging current is used, a normal charging voltage can be obtained immediately.
第1図は本発明の一実施例による充放電装置の
回路構成を示す図及び第2図は従来の充放電装置
の回路構成を示す図である。
14…分圧抵抗回路、14a…1/2分圧端子。
FIG. 1 is a diagram showing a circuit configuration of a charging/discharging device according to an embodiment of the present invention, and FIG. 2 is a diagram showing a circuit configuration of a conventional charging/discharging device. 14...Voltage dividing resistor circuit, 14a...1/2 voltage dividing terminal.
Claims (1)
分圧用の分圧抵抗回路が並列接続され、これらの
コンデンサが充電回路でその出力電圧の1/2に充
電されると共に、スイツチ回路を通して負荷へそ
の充電電圧を放電させるようになつた充放電装置
において、 エミツタ同志及びベース同志が接続されたnpn
形及びpnp形の2個のトランジスタのコレクタを
それぞれ分圧抵抗回路よりも十分小さな抵抗値の
抵抗を通して前記2個のコンデンサに正規の極性
で並列接続し、 これらの電解コンデンサの共通接続点を前記エ
ミツタに接続し、前記分圧抵抗回路の1/2分圧端
子を前記ベースに接続したことを特徴とする充放
電装置。[Claims] 1. Two series-connected electrolytic capacitors with 1/2
A charging/discharging device in which voltage dividing resistor circuits for voltage division are connected in parallel, these capacitors are charged to 1/2 of their output voltage in a charging circuit, and the charged voltage is discharged to the load through a switch circuit. In the npn where the emitsuta comrade and the base comrade are connected
The collectors of two transistors, one type and one pnp type, are connected in parallel to the two capacitors with regular polarity through a resistor whose resistance value is sufficiently smaller than that of the voltage dividing resistor circuit, and the common connection point of these electrolytic capacitors is connected to the A charging/discharging device characterized in that the 1/2 voltage dividing terminal of the voltage dividing resistor circuit is connected to the base.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62149079A JPS63314132A (en) | 1987-06-17 | 1987-06-17 | Charge and discharge apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62149079A JPS63314132A (en) | 1987-06-17 | 1987-06-17 | Charge and discharge apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63314132A JPS63314132A (en) | 1988-12-22 |
| JPH0557808B2 true JPH0557808B2 (en) | 1993-08-25 |
Family
ID=15467233
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62149079A Granted JPS63314132A (en) | 1987-06-17 | 1987-06-17 | Charge and discharge apparatus |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63314132A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006280512A (en) * | 2005-03-31 | 2006-10-19 | National Institute Of Information & Communication Technology | Method and apparatus for presenting danger signal to vehicle operator |
| JP2008090022A (en) * | 2006-10-03 | 2008-04-17 | Sugawara Laboratories Inc | Flash device |
| JP2008236826A (en) * | 2007-03-16 | 2008-10-02 | Cooper Technologies Co | System having coilless circuit for controlling voltage unbalance, capacitor protection, balanced circuit module, and capacitor device |
| JP5438931B2 (en) * | 2008-08-06 | 2014-03-12 | Fdk株式会社 | Voltage balance correction circuit between modules of power storage system |
| JP5797946B2 (en) * | 2011-06-23 | 2015-10-21 | 東芝シュネデール・インバータ株式会社 | Stored power discharge circuit of inverter device |
-
1987
- 1987-06-17 JP JP62149079A patent/JPS63314132A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63314132A (en) | 1988-12-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |