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JPH0559071B2 - - Google Patents
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JPH0559071B2 - - Google Patents

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Publication number
JPH0559071B2
JPH0559071B2 JP59272460A JP27246084A JPH0559071B2 JP H0559071 B2 JPH0559071 B2 JP H0559071B2 JP 59272460 A JP59272460 A JP 59272460A JP 27246084 A JP27246084 A JP 27246084A JP H0559071 B2 JPH0559071 B2 JP H0559071B2
Authority
JP
Japan
Prior art keywords
zro
substrate
powder
borosilicate glass
thermal expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59272460A
Other languages
Japanese (ja)
Other versions
JPS61151064A (en
Inventor
Kishio Yokochi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59272460A priority Critical patent/JPS61151064A/en
Publication of JPS61151064A publication Critical patent/JPS61151064A/en
Publication of JPH0559071B2 publication Critical patent/JPH0559071B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass

Landscapes

  • Inorganic Insulating Materials (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は高密度のジルコニア基板をガラス含有
量を極力少なくして形成する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for forming a high-density zirconia substrate with as little glass content as possible.

膨大な情報を高速に処理する方法としてIC,
LSIなどの半導体装置は単位素子の小形化と大容
量化が進んでおり、VLSIなどが実用化されてい
るが、同時に半導体材料の面についても改良が進
められている。
IC as a way to process huge amounts of information at high speed.
The unit elements of semiconductor devices such as LSIs are becoming smaller and larger in capacity, and VLSIs and other devices are being put into practical use, but at the same time improvements are being made in semiconductor materials.

すなわち従来の半導体装置の材料は使用温度範
囲が広いこと、酸化被膜によりプレーナー化が容
易なことなどの理由から殆どの場合シリコン
(Si)が使用されているが、高速処理を実現する
ために電子易動度の大きなガリウム砒素
(GaAs)化合物半導体が注目され、高電子移動
度トランジスタなどが実用化され、この需要が増
加している。
In other words, in most cases silicon (Si) is used as the material for conventional semiconductor devices due to its wide operating temperature range and the ease with which it can be planarized due to its oxide film. Gallium arsenide (GaAs) compound semiconductors, which have high mobility, are attracting attention, and demand for them is increasing as high electron mobility transistors and other devices are put into practical use.

さて、半導体装置は単体半導体或いは化合物半
導体からなる半導体基板(ウエハ)上に薄膜形成
技術と写真食刻技術(ホトリソグラフイ)とを使
用して多数の半導体デバイスを作り、これを個々
のデバイス毎に切断してチツプとし、このチツプ
をセラミツク基板に搭載してパツケージ処理を施
したものである。
Semiconductor devices are manufactured by using thin film formation technology and photolithography to create a large number of semiconductor devices on a semiconductor substrate (wafer) made of a single semiconductor or a compound semiconductor, and then each device is separated into individual devices. The chips were cut into chips, mounted on a ceramic substrate, and packaged.

いま例をSiにとるとパターン形成の終わつたSi
チツプはこれと熱膨張率が近いアルミナ(α−
Al2O3)或いはガラスセラミツクからなる配線基
板に接着剤或いは共晶ボンデイングなどの方法で
接着し、ワイヤボンデイングなどの方法でチツプ
の端子と配線基板の配線とを回路接続した後、樹
脂外装あるいはハーメチツクシールを施して半導
体装置が形成されている。
Taking Si as an example, Si after pattern formation has been completed.
The chip is made of alumina (α-
After adhering to a wiring board made of Al 2 O 3 ) or glass ceramic using an adhesive or eutectic bonding method, and connecting the circuit between the terminals of the chip and the wiring of the wiring board using a method such as wire bonding, the resin exterior or A semiconductor device is formed by applying a hermetic seal.

以上のようにチツプは配線基板に搭載して使用
されるが、この場合両者の熱膨張率が近似してい
ることが必要であり、これを満たさない場合はチ
ツプの破損や基板との剥離を生じ、装置の信頼性
が著く低下する。
As mentioned above, the chip is used mounted on a wiring board, but in this case it is necessary that the thermal expansion coefficients of both are similar, and if this is not met, the chip may be damaged or peeled off from the board. This results in a significant decrease in the reliability of the device.

本発明はGaAsチツプの搭載に適したジルコニ
ア基板の製造方法に関するものである。
The present invention relates to a method of manufacturing a zirconia substrate suitable for mounting a GaAs chip.

〔従来の技術〕[Conventional technology]

GaAsの熱膨張率は9〜10×10-6/℃でα−Al2
O3の熱膨張率の5〜6×10-6/℃に較べると約
2倍大きく、そのため従来のアルミナ基板は使用
することができない。
The thermal expansion coefficient of GaAs is 9~10×10 -6 /℃ and α-Al 2
This is about twice as large as the thermal expansion coefficient of O 3 , which is 5 to 6×10 -6 /°C, and therefore conventional alumina substrates cannot be used.

ここでGaAsに近い熱膨張率をもつ耐熱材料か
らなる基板を使用する必要があり、この材料とし
てジルコニア(ZrO2)とマグネシヤ(MgO)を
挙げることができる。
Here, it is necessary to use a substrate made of a heat-resistant material with a coefficient of thermal expansion close to that of GaAs, and examples of such materials include zirconia (ZrO 2 ) and magnesia (MgO).

すなわちZrO2の熱膨張率は9〜10×10-6/℃
またMgOの熱膨張率は10〜11×10-6/℃であり
何れもGaAsに近似している。
In other words, the coefficient of thermal expansion of ZrO 2 is 9 to 10 × 10 -6 /℃
Furthermore, the coefficient of thermal expansion of MgO is 10 to 11×10 -6 /°C, which is close to that of GaAs.

然し、ZrO2の融点は2700℃、MgOの融点は
2800℃とα−Al2O3の2015℃に較べても遥かに高
く、そのため焼結は容易ではない。
However, the melting point of ZrO 2 is 2700℃, and the melting point of MgO is
The temperature of 2800℃ is much higher than that of α-Al 2 O 3 at 2015℃, so sintering is not easy.

また高密度化が進んだIC,LSIなどのチツプを
搭載する基板としては多層化基板が必要であり、
これに使用する導体パターンとして金(Au)、銅
(Cu)等の比電導度の高い金属の使用が望ましい
が、これらの金属の融点は1000℃内外であるため
に、そのままでは多層基板の導体パターンを形成
することは不可能である。
Additionally, multi-layered substrates are required as substrates for mounting chips such as ICs and LSIs, which are becoming increasingly dense.
It is desirable to use metals with high specific conductivity such as gold (Au) and copper (Cu) as the conductor pattern used for this, but since the melting point of these metals is around 1000℃, they cannot be used as conductors for multilayer boards. It is impossible to form a pattern.

そこでこの問題を打開するためセラミツクの粒
度を微細にして表面エネルギーを大きくし、焼結
温度を低下させるなどの方法が講じられているが
効果は僅かである。
In order to overcome this problem, methods have been taken such as making the grain size of ceramic finer to increase its surface energy and lowering the sintering temperature, but these efforts have had little effect.

かかる問題は従来のアルミナセラミツクにおい
ても同様であつて、この解決法としてアルミナ粉
末をガラス粉末と混和し、これを焼結したガラス
セラミツクが実用化されている。
This problem is the same in conventional alumina ceramics, and as a solution to this problem, glass ceramics in which alumina powder is mixed with glass powder and the mixture is sintered have been put into practical use.

すなわちアルミナ粉に硼珪酸ガラスを均一に混
合したものを成形して熱処理を行うと硼珪酸ガラ
スの融点は組成比により異なるが500〜800℃と低
く、これがアルミナ粉のバインダとして作用して
複合誘電体が構成されるため900℃程度の比較的
低い焼成処理で誘電率が低く、また熱膨張率の少
ない値をもつガラスセラミツク基板を作ることが
できる。
In other words, when a uniform mixture of alumina powder and borosilicate glass is molded and heat treated, the melting point of the borosilicate glass is as low as 500 to 800°C, depending on the composition ratio, and this acts as a binder for the alumina powder to form a composite dielectric. Because of its structure, glass-ceramic substrates with low dielectric constants and low coefficients of thermal expansion can be produced with a relatively low firing process of around 900°C.

すなわち硼珪酸ガラスは熱膨張率が1〜2×
10-6/℃と少なく、また誘電率もアルミナ磁気基
板が9〜10と比較的高いのに対して4〜5と低
い。
In other words, borosilicate glass has a coefficient of thermal expansion of 1 to 2×
The dielectric constant is as low as 10 -6 /°C, and the dielectric constant is as low as 4 to 5, compared to a relatively high 9 to 10 for alumina magnetic substrates.

これらのことからSiチツプの搭載基板としてア
ルミナを用いたガラスセラミツク多層基板は適し
ている。
For these reasons, a glass-ceramic multilayer substrate using alumina is suitable as a mounting substrate for Si chips.

然し、この手法をそのままZrO2やMgOを主構
成分とするガラスセラミツクに適用することはで
きない。
However, this method cannot be directly applied to glass ceramics whose main components are ZrO 2 or MgO.

その理由はジルコニア基板或いはマグネシヤ基
板はGaAsチツプに見合つた高い熱膨張率をもつ
ていることが必要条件であるが、ZrO2は硼珪酸
ガラスの主成分である珪酸(SiO2)と反応して
ジルコン(ZrO2・SiO2)を生じ、この熱膨張率
が5〜6×10-6/℃と小さくなるので、目的に沿
わなくなる。
The reason for this is that the zirconia or magnesia substrate must have a high coefficient of thermal expansion commensurate with the GaAs chip, but ZrO 2 reacts with silicic acid (SiO 2 ), the main component of borosilicate glass. Zircon (ZrO 2 .SiO 2 ) is formed, and the coefficient of thermal expansion becomes as small as 5 to 6× 10 -6 /°C, which is not suitable for the purpose.

またMgOの場合は硼珪酸ガラスに対する濡れ
性が極めて悪く、均一に分散されず、また焼成後
にガラスとの界面に隙間を生じて緻密なガラスセ
ラミツク基板ができないと云う問題がある。
Furthermore, in the case of MgO, there are problems in that it has extremely poor wettability with borosilicate glass and is not uniformly dispersed, and that gaps are formed at the interface with the glass after firing, making it impossible to form a dense glass-ceramic substrate.

また従来のように硼珪酸ガラスを多量に添加す
ると複合誘電体が形成されるため必然的に熱膨張
率を始めとし各種の特性が変化する。
Furthermore, if a large amount of borosilicate glass is added as in the conventional method, a composite dielectric is formed, which inevitably changes various properties including the coefficient of thermal expansion.

これらのことからGaAsチツプの搭載に適した
セラミツク基板は未だ実用化されていない。
For these reasons, ceramic substrates suitable for mounting GaAs chips have not yet been put into practical use.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上記したようにGaAsチツプは熱膨張率が大
きく、これに適した基板材料としてZrO2がある
が融点が高く、そのため多層基板を形成すること
が難しく、一方硼珪酸ガラスと混合してガラスセ
ラミツク基板を形成するとSiO2と反応して
ZrO2・SiO2を形成すると共に全体として熱膨張
率が低下すると云う問題がある。
As mentioned above, GaAs chips have a large coefficient of thermal expansion, and although ZrO 2 is a suitable substrate material, its melting point is high, making it difficult to form multilayer substrates. When the substrate is formed, it reacts with SiO 2
There is a problem that as ZrO 2 ·SiO 2 is formed, the coefficient of thermal expansion decreases as a whole.

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題は化学気相成長法により表面にα−
Al2O3の薄膜を被覆したZrO2粉末に該ZrO2粉末
よりも一桁以上小さな粒径をもつ硼珪酸ガラスを
添加し、溶剤を加えて混練したる後、該基板を成
型して乾燥を行い、次いで該基板を焼成処理する
ことを特徴とするジルコニア基板の製造方法によ
り解決することができる。
The above problem can be solved by applying α− to the surface by chemical vapor deposition.
Borosilicate glass having a particle size at least one order of magnitude smaller than the ZrO 2 powder is added to the ZrO 2 powder coated with a thin film of Al 2 O 3 , a solvent is added and kneaded, and the substrate is molded and dried. This problem can be solved by a method for manufacturing a zirconia substrate, which is characterized in that the substrate is subjected to a firing treatment.

〔作用〕[Effect]

本発明はZrO2と硼珪酸ガラスとが反応して
ZrO2・SiO2が生じるのを防ぐためにZrO2の表面
に化学気相成長法を用いてα−Al2O3の薄膜を被
覆すると共に、バインダとして使用する硼珪酸ガ
ラス粉をZrO2粉の粒径に対して一桁以上小さい
ものを使用することによつて最小量の硼珪酸ガラ
スの添加により高密度のジルコニア基板を形成す
るものである。
The present invention is based on the reaction between ZrO 2 and borosilicate glass.
In order to prevent the formation of ZrO 2 and SiO 2 , the surface of ZrO 2 is coated with a thin film of α-Al 2 O 3 using chemical vapor deposition, and borosilicate glass powder used as a binder is coated with ZrO 2 powder. By using particles that are one order of magnitude smaller than the particle size, a high-density zirconia substrate can be formed by adding a minimum amount of borosilicate glass.

第1図は本発明の概要を説明するもので、使用
するZrO2粉末1はZrO2・SiO2の生成を防ぐため
にこの表面に化学気相成長法(CVD法)により
α−Al2O3膜2を被覆したものを用い、一方これ
を相互に接着する硼珪酸ガラス3には粒径が
ZrO2粉末よりも一桁以上小さなものを使用し、
第1図Aに示すように混合した状態で焼成処理す
ることにより同図Bに示すようにα−Al2O3膜2
で被覆されたZrO2粉末1の隙間部分が硼珪酸ガ
ラス3で充填された焼成体を得るものである。
FIG. 1 explains the outline of the present invention. The ZrO 2 powder 1 used is coated with α-Al 2 O 3 on the surface by chemical vapor deposition (CVD) in order to prevent the formation of ZrO 2 and SiO 2 . The borosilicate glass 3 used to bond the membrane 2 to each other has a particle size of
Using ZrO 2 powder, which is more than an order of magnitude smaller,
As shown in FIG. 1A, by firing the mixed state, the α-Al 2 O 3 film 2 is formed as shown in FIG. 1B.
A fired body is obtained in which the gap between the ZrO 2 powder 1 coated with borosilicate glass 3 is filled with borosilicate glass 3.

このようにするとα−Al2O3膜2と硼珪酸ガラ
ス3とは馴染みが良いため空孔などの隙間ができ
ず、また硼珪酸ガラス3はバインダとして使用す
るだけなので、ZrO2の熱膨張率に及ぼす影響は
少ない。
In this way, the α-Al 2 O 3 film 2 and the borosilicate glass 3 are compatible, so no gaps such as pores are formed, and since the borosilicate glass 3 is only used as a binder, the thermal expansion of ZrO 2 The effect on the rate is small.

〔実施例〕〔Example〕

第2図はZrO2にα−Al2O3を被覆するCVD装
置の構成を示すものでヒータ4を備えた石英製の
反応室5の中には粒径が3〜5μmの部分安定化
ZrO2粉末6が入れられており、底部に設けた篩
状の細孔により粉体流動ができるよう構成されて
いる。
Figure 2 shows the configuration of a CVD apparatus for coating ZrO 2 with α-Al 2 O 3 . Partially stabilized particles with a particle size of 3 to 5 μm are contained in a quartz reaction chamber 5 equipped with a heater 4 .
ZrO 2 powder 6 is placed therein, and the structure is such that the powder can flow through sieve-like pores provided at the bottom.

またこの反応室の下側には塩化アルミニウム
(Al Cl3)気化器7があり、コツク8を通じて炭
酸ガス(CO2)ボンベ9と水素ガス(H2)ボン
ベ10に接続されている。
Further, there is an aluminum chloride (Al Cl 3 ) vaporizer 7 on the lower side of the reaction chamber, which is connected to a carbon dioxide gas (CO 2 ) cylinder 9 and a hydrogen gas (H 2 ) cylinder 10 through a tank 8 .

また反応室5の上部にはコツク11を通じて真
空ポンプ12およびトラツプ13に連結されてい
る。
Further, the upper part of the reaction chamber 5 is connected to a vacuum pump 12 and a trap 13 through a tank 11.

このようなCVD装置を用いてZrO2の表面にα
−Al2O3膜を被覆するには粒径が3〜5μmの部分
安定化処理したZrO2粉末6を反応室5の中に入
れ、真空ポンプ12を用いて排気した後、CO2
H2の混合ガスを流速約50cm3の条件で流しながら
1200℃に加熱して流動層とする。
Using such a CVD device, α is deposited on the surface of ZrO2 .
- To coat the Al 2 O 3 film, partially stabilized ZrO 2 powder 6 with a particle size of 3 to 5 μm is placed in the reaction chamber 5, and after being evacuated using the vacuum pump 12, CO 2 and
While flowing a mixed gas of H2 at a flow rate of approximately 50cm3 .
Heat to 1200℃ to form a fluidized bed.

この状態でAl Cl3気化器7から気化したAl
Cl3を流入することによりZrO2粉末6の上にα−
Al2O3被覆が被覆される。
In this state, Al vaporized from the Al Cl 3 vaporizer 7
α− on top of ZrO 2 powder 6 by flowing Cl 3
Al 2 O 3 coating is applied.

この反応は次の反応式で表すことができる。
2Al Cl3+3CO2+3H2→Al2O3+3CO+6HCl このようにして得られたZrO2粉末80重量%と
粒径が0.1〜0.5μmの硼珪酸ガラス粉末20重量%と
を混合した後、アルミナボールを用いてポツト中
でドライミーリングを施して、ZrO2粉と硼珪酸
ガラス粉との団粒を形成した。
This reaction can be expressed by the following reaction formula.
2Al Cl 3 +3CO 2 +3H 2 →Al 2 O 3 +3CO + 6HCl After mixing 80% by weight of the ZrO 2 powder thus obtained and 20% by weight of borosilicate glass powder with a particle size of 0.1 to 0.5 μm, alumina balls were formed. Dry milling was carried out in a pot using the following method to form aggregates of ZrO 2 powder and borosilicate glass powder.

次にこの団粒にアセトンなどの溶剤と少量のア
クリル樹脂を加え、よく混練してスリラー状と
し、これを用いて基板を成形し約150℃の温度を
加えて乾燥した。
Next, a solvent such as acetone and a small amount of acrylic resin were added to the aggregates, and the mixture was thoroughly kneaded to form a thriller shape, which was then used to form a substrate and dried at a temperature of approximately 150°C.

かかる基板を電気炉に入れ、900℃の温度で2
時間焼成することにより相対密度99%のジルコニ
ア基板を得ることができた。
The substrate was placed in an electric furnace and heated at a temperature of 900°C for 2
By firing for several hours, a zirconia substrate with a relative density of 99% could be obtained.

次にこの基板について熱膨張率を測定した結果
9×10-6/℃の値を示した。
Next, the thermal expansion coefficient of this substrate was measured and showed a value of 9×10 -6 /°C.

なお、これと同様な条件で硼珪酸ガラスの添加
量を5重量%として試作した基板につていは熱膨
張率は9×10-6/℃と変わらないが相対密度は95
%に低下した。
Note that for a substrate prototype produced under similar conditions with the amount of borosilicate glass added at 5% by weight, the coefficient of thermal expansion remained the same at 9 x 10 -6 /°C, but the relative density was 95.
%.

〔発明の効果〕〔Effect of the invention〕

以上記したように本発明の実施により高密度で
熱膨張率がGaAsチツプに近いガラスセラミツク
基板が形成されると共に1000℃以下の温度で焼成
できるために多層配線基板の製造が可能となる。
As described above, by carrying out the present invention, a glass ceramic substrate with a high density and a coefficient of thermal expansion close to that of a GaAs chip can be formed, and since it can be fired at a temperature of 1000° C. or less, it becomes possible to manufacture a multilayer wiring board.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の構成を模式的に示す断面図で
同図Aは焼成前、同図Bは焼成後、第2図は本発
明に必要なCVD装置の構成図、である。 図において、1はZrO2粉末、2はα−Al2O3
膜、3は硼珪酸ガラス、5は反応室、6はZrO2
粉末、である。
FIG. 1 is a sectional view schematically showing the structure of the present invention. FIG. 1A is before firing, FIG. B is after firing, and FIG. 2 is a configuration diagram of a CVD apparatus necessary for the present invention. In the figure, 1 is ZrO 2 powder, 2 is α-Al 2 O 3
Membrane, 3 is borosilicate glass, 5 is reaction chamber, 6 is ZrO 2
It is a powder.

Claims (1)

【特許請求の範囲】[Claims] 1 表面にアルミナの薄膜を被覆したジルコニア
粉末に該ジルコニア粉末よりも一桁以上小さな粒
径をもつ硼珪酸ガラスを添加し、溶剤を加えて混
練したる後、該基板を成型して乾燥を行い、次い
で該基板を焼成処理することを特徴とするジルコ
ニア基板の製造方法。
1 Add borosilicate glass having a particle size at least one order of magnitude smaller than the zirconia powder to the zirconia powder whose surface is coated with a thin film of alumina, add a solvent and knead, then mold the substrate and dry it. 1. A method for manufacturing a zirconia substrate, the method comprising: then subjecting the substrate to a firing treatment.
JP59272460A 1984-12-24 1984-12-24 Manufacture of zirconia substrate Granted JPS61151064A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59272460A JPS61151064A (en) 1984-12-24 1984-12-24 Manufacture of zirconia substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59272460A JPS61151064A (en) 1984-12-24 1984-12-24 Manufacture of zirconia substrate

Publications (2)

Publication Number Publication Date
JPS61151064A JPS61151064A (en) 1986-07-09
JPH0559071B2 true JPH0559071B2 (en) 1993-08-30

Family

ID=17514220

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59272460A Granted JPS61151064A (en) 1984-12-24 1984-12-24 Manufacture of zirconia substrate

Country Status (1)

Country Link
JP (1) JPS61151064A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0683008B2 (en) * 1989-08-22 1994-10-19 セイコー電子部品株式会社 Surface mount piezoelectric vibrator container
JP2752301B2 (en) * 1992-07-30 1998-05-18 京セラ株式会社 Composition for ceramic substrate and ceramic wiring substrate

Also Published As

Publication number Publication date
JPS61151064A (en) 1986-07-09

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