JPH0562997B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] An analog/digital (A/D) system that converts an audio input signal in an audio processing device into a digital signal.
D) A circuit test that checks the operation of the data conversion section, including the conversion circuit (ADC), digital signal processor (DSP), and the bus that connects these circuits to the data register, and specifically identifies faulty circuits in the event of a failure. It is useful for

[Industrial application field]

The present invention relates to an A/D conversion circuit (ADC) and a digital signal processor (DSP) in an audio processing device.
The present invention relates to a method for checking the operation of a data converter including a bus connecting a data register to a data register.

If some kind of failure occurs in the audio processing equipment and the equipment stops operating, or an abnormality occurs in the equipment operation and a failure search is performed and the cause of the failure is not found, even if the failure is caused by the hardware. Even if the equipment has been tested, it is divided into operational or functional units, and the entire equipment is checked while confirming the normality of each unit.

Therefore, if a fault occurs, it would be extremely convenient to perform a simple check and separate the circuit into a normal part and a part containing an abnormality, in order to find the fault.

There is a need for a check method that can be easily performed when such a failure occurs.

[Conventional technology]

FIG. 4 is a block diagram of the data conversion section of a conventional audio processing device.Speech input to the microphone 1 is amplified to an appropriate level by a preamplifier 2a, and is subjected to processing such as audio frequency band extraction and noise removal. The sample and hold circuit (S/H) 2b holds the analog signal at fixed time intervals and outputs it to the ADC 3.

The ADC 3 converts the input signal into digital audio data composed of a predetermined number of bits of "1" and "0" signals, and outputs it to the DSP 4.

The DSP 4 processes, analyzes and converts the audio data into required data using its internal processing program, and outputs the data to the data register 5.

These ADC 3, DSP 4, and data register 5 are connected by a bus 6, and each circuit connection gate uses a three-state element, and the DSP 4 is a bidirectional gate.

The audio data stored in the data register 5 is
The microprocessor (MPU) 7 sends the signal to a subsequent system (not shown) for further audio processing.

Status register 8 stores the status signal of DSP 4 and notifies microprocessor 7 of the status.

The control circuit 9 connects signal lines to each existing circuit, and when reading data from the DSP 4,
A read timing signal TDSP is sent from the DSP read signal generator 90.

The start-up operation of the data conversion section was performed according to the flowchart shown in FIG.

Conventionally, when a failure occurred in the data conversion section of this audio processing device, each circuit was disconnected at its input/output terminal, the quality of each circuit was investigated using a tester, or each circuit was We isolated the circuit and observed changes in the state of the entire circuit while searching for the faulty circuit or fault point.

[Problem that the invention seeks to solve]

This conventional method requires fault detection tools such as measuring instruments and fault detection techniques, making it difficult to identify faulty circuits and requiring time to repair faults.

Furthermore, since the operator cannot check the circuit before the circuit starts operating, it becomes clear that a circuit failure has occurred only after the circuit starts operating.

The present invention was created in view of these points, and an object of the present invention is to provide a method that can be easily checked by adding a simple circuit program.

[Means for solving problems]

The data conversion section check device of the audio processing device of the present invention shown in FIG. A data conversion unit check device for checking a data conversion unit of an audio processing device, which is formed by connecting an output and an input of a data register 5 via a bus 6, includes a microprocessor 7 for processing output data of the data register 5; A control circuit 9 is provided for controlling signals of the data conversion section, and under the control of the control circuit 9, test data 41 stored in advance in the digital signal processor 4 is passed through the bus 6 and the data register 5. The test data 41 is read out to the microprocessor 7, and the microprocessor 7 compares the built-in data with the test data 41.
Under the control of the control circuit 9, the output digital signal from the analog/digital conversion circuit 3 for a known audio input analog signal is read out to the microprocessor 7 via the bus 6 and the data register 5, and The processor 7 is configured to check data.

[Effect]

The following two types of tests can be performed by attaching the circuit and reading the test data described above.

[Test 1] In the control circuit 9, the output section of the ADC 3 shows high impedance due to the activation signal from the microprocessor 7, and the circuit is blocked.
Sends a check start signal to DSP4.

The DSP 4 sends the stored test data 41 to the bus 6, and the data is written into the data register 5.

Furthermore, when the control circuit 9 notifies the microprocessor 7 of data storage via the status register 8, the microprocessor 7 reads the contents of the data register 5, compares the contents with the internal data, and stores the data. Pass/fail is determined, and if they match, the test result is determined to be good.

[Test 2] The control circuit 9 outputs the value obtained by the ADC 3 by inputting the audio, via the status register 8.
The microprocessor 7 is notified of data storage.

The microprocessor 7 receives the timing signal
Read the data register 5 containing the ADC data set by TADC and check its value.

Based on the results of the two types of tests, the location of the injury can be determined as follows.

(1) If [Test 1] is good, DSP4 and Bus6
is good.

(2) If [Test 2] is good, ADC3 and bus 6
is good.

(3) If [Test 1] is good and [Test 2] is bad, there is a defective circuit in the ADC and its preceding circuit.

(4) If [Test 1] is bad and [Test 2] is good, there is a defect in the DSP and its peripheral circuits.

(5) If both [Test 1] and [Test 2] are defective, there is a defect in the converter circuits and its peripheral circuits.

The result of this check can be known simply by the operator instructing the microprocessor 7 to start the check.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for checking a data conversion section of an audio processing apparatus according to the present invention will be explained in detail with reference to the drawings.

A block diagram of an embodiment of the present invention shown in FIG. Figure 2 is a flowchart of the example. FIG. 3 shows a timing chart of the embodiment.

Note that the same reference numerals indicate the same objects throughout the figures.

In the case of [Test 1], the microprocessor 7 instructs the control circuit 9 to send a reset signal to the reset terminal of the DSP 4 to reset the DSP 4 (Step 1).

The DSP4 program starts and the built-in flag
Clear F1, that is, set F1 to "0" (step 2).

The DSP 4 enters a loop state when the judgment program F1 is "0" and waits for a start signal (step 3).

Next, the microprocessor 7 sets F1 to "1" using the F1 set signal as a check activation signal.
(Step 4).

The DSP 4 sends out the IOIND signal by setting F1 to "0" again (step 5).

The microprocessor 7 uses this IOIND signal as a trigger and waits for the read timing of the data register 5.

Then, after _t1 time, the DSP 4 sends the IOIND signal and the first test data "AA", that is, the 8-bit signal "10101010" to the bus 6.

Upon receiving the IOIND signal, the microprocessor 7 reads data from the data register 5.

Then, the read data is compared with pre-built-in test data to determine whether the bus 6 is good or bad (step 6).

Next, the DSP 4 sends the second test data "55", that is, "01010101" to the bus 6 after _t2 hours, and the microprocessor 7 similarly reads the data from the data register 9 based on the IOIND signal. Verify and make a judgment (Step 7).

This completes the check and sets the contents of the DSP 4 to its initial state (step 8).

If the circuit is determined to be normal based on the test results,
An execution program, for example an analysis program, is started (step 9).

It goes without saying that the test data 41 may be made into a code with regularity as described above, and the regularity may be checked without comparing it with the same data.

In [Test 2], a known voice input is input, the value measured by the ADC 3 is taken into the microprocessor 7, and it is checked whether the maximum value of the ADC 3 is within a preset value.

Such circuit tests are not only used to isolate circuits in the event of a fault, but can also be performed at the operator's direction at the time the equipment is put into use to check the basic circuit; however, they are usually , is often installed so that it starts automatically when the device is powered on.

〔Effect of the invention〕

As described above, according to the present invention, a simple additional circuit can be used to isolate the failure of the data conversion section, which is the main part of the input system of the audio processing circuit.
Alternatively, it can be used to check operation, and is extremely useful in practice.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the data conversion unit check system of the audio processing device of the present invention, FIG. 2 is a flowchart of the embodiment, FIG. 3 is a timing chart of the embodiment, and FIG. 4 is a conventional example. The block diagram, FIG. 5, is a flowchart of a conventional example. In the figure, 3 is an analog/digital conversion circuit (ADC), 4 is a digital signal processor (DSP), 41 is test data, 5 is a data register, 6 is a bus, 7 is a microprocessor (MPU), and 9 is a control circuit. , 91 is an ADC read signal device.

Claims (1)

[Claims] 1. The output of the analog/digital conversion circuit 3 that converts the audio input analog signal into a digital signal, the input/output of the digital signal processor 4 that analyzes the digital signal, and the input of the data register 5 are connected to a bus. A data conversion unit check device for checking a data conversion unit of an audio processing device connected by a microprocessor 7 that processes the output data of the data register 5, and a control unit that controls signals of the data conversion unit. Under the control of the control circuit 9, test data 41 stored in advance in the digital signal processor 4 is read out to the microprocessor 7 via the bus 6 and the data register 5, and The setter 7 collates the built-in data with the test data 41, and under the control of the control circuit 9, the output digital signal from the analog/digital conversion circuit 3 in response to the known audio input analog signal is transferred to the bus 6 and A data converter check device for an audio processing device, characterized in that the data is read to the microprocessor 7 via the data register 5, and the data is checked by the microprocessor 7.