JPH0564470B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application] The present invention relates to a high voltage MIS transistor that effectively suppresses breakdown of the gate oxide film on the drain side despite the thin gate oxide film thickness.

[Problems with conventional technology]

High-voltage MIS transistors require various structural improvements to increase drain breakdown voltage and lower on-resistance. For example, there is a structure in which the drain region is extended toward the channel region, the impurity concentration in this region is set to be low (this part is generally referred to as the extended drain region), and the gate electrode is disposed only on the sole side. In this structure, the drain voltage is gradually absorbed in the extended drain region, so that the channel potential on the drain side where the input gate electrode is present can be set low even when the transistor is off. However, since the top of the extended drain region is generally in an open state, the potential distribution in the extended drain rises rapidly near the true drain edge, and therefore the electrolysis also becomes high, and the withstand voltage cannot be made that high.

Therefore, as shown in FIG. 1, a so-called field plate 11 is generally attached to the drain 3 side.
Since the potential of the field plate 11 is always equal to the drain voltage, it is possible to alleviate the lateral electrolysis in the extended drain 10 directly under the gate, particularly in the portion near the real drain, and to increase the withstand voltage. In the figure, 1 is a substrate, 2 is a source, and 4 is an input gate. However, even though the channel potential is low at the edge of the field plate 11 on the source 2 side, the potential of the field plate 11 is equal to the drain voltage, so if the gate oxide film is thin, there will be a problem with the oxide film breakdown voltage. Become.

Therefore, as shown in Figure 2, field plate 1
2 is made of a resistive material, such as high-resistance polysilicon, and the side close to the source 2 is grounded to a constant potential, such as ground, thereby creating a potential gradient in the field plate 12 and reducing the lateral electrolysis in the extended drain 10. There is a method of relaxing the vertical electric field in the gate oxide film at the same time. This method is very effective in increasing the withstand voltage, but because the potential distribution in the resistive gate 4 is linear, it does not necessarily match the channel potential, and the electric field relaxation effect cannot be maximized. In addition, the current flowing through the resistive gate becomes a drain leak current, which limits the way it can be used.

[Purpose of the invention]

An object of the present invention is to provide a high-voltage MIS transistor that can maximize drain breakdown voltage and virtually ignore drain leakage current even when the gate oxide film is thinned to obtain sufficiently low on-resistance. It is in.

[Structure of the invention]

The MIS transistor according to the present invention has a field plate divided into two or more along the channel direction, and the field plate closest to the source is fixed at a constant potential or capacitively coupled,
It is characterized in that the field plate closest to the drain is in contact with or capacitively coupled to the drain, and the field plates on both sides are strongly capacitively coupled to each other.

[Principle of the invention]

Next, the principle of the present invention will be explained. The configuration of the present invention is as shown in FIG.

That is, on the extended drain 10 are field plates 5, 6 and 7, 7 divided into several parts.
... are formed, and each is strongly capacitively coupled to its neighbors. 8 indicates the coupling capacity. In this figure, the field plate 5 at one end is in contact with the drain 3, and the field plate 6 at the other end is in contact with a power supply 9 having a certain fixed potential, but these may be capacitively coupled to each other. Here, in order to have more generality, numbers are assigned in order such that field plate 6 is numbered 1 and field plate 5 is numbered N. The coupling capacitance existing between the i-th and i+1-th field plate is
Let it be C _i .

As can be easily seen from FIG. 4 showing the equivalent circuit of FIG. 3, the potential V _i of the i-th field plate is generally given as follows. In FIG. 4, 13 is a node for the field plate 6, and 14 is a node for the field plate 5.

Here, V _D is the drain voltage, and V _O is the voltage of the power supply 9. V _O is set sufficiently small compared to the maximum value of V _D. As i becomes larger, the first term of the denominator becomes smaller and the second term and numerator become larger, so that V _i approaches V _D . When i is small, the opposite is true, so V _i is
Get closer to V _O. Therefore, it is possible to gradually increase the potential of each field plate on the extended drain 10 from the side closer to the source 2 toward the drain electrode. If each coupling capacitance is appropriately selected, it is also possible to control how it increases. Therefore, it is possible to set a potential corresponding to the spatial distribution of the channel potential on each field plate, and as a field plate, it is possible to weaken the electric field in the extended drain and at the same time set the electric field in the gate oxide film to be low. Become.

Moreover, since each field plate is simply capacitively coupled, the reel current at the drain is only caused by the original transistor (for example, leakage current flowing to the substrate) and can be kept very small.

[Example] Figures 5a and 5b show an example of the present invention. A is a plan view, and b is a corresponding cross-sectional view. In this transistor, the field plates (formed of polysilicon) 26, 27, 27 on the extended drain 30
...Contacts are made in all cases, and metal wiring 31~
It is taken out at 35. 25 is the drainest 2
The field plate closest to the source 22 side, 26, is the field plate closest to the source 22 side on the extended drain 30. 24 is an input gate. The distance between each field plate should be as narrow as possible, but as a rough guide, the gate oxide film thickness may be about 2000 Å, for example. This can be achieved by electron beam exposure, dry etching, etc. Here, metal wiring 31 and 32, 32 and 33, 33 and 34, 34
Capacitors 41 to 44, which are sufficiently larger than the gate capacitance, are externally connected between and 35. At this time, the capacity ratio is set to 1:2:4:4 in this order. For example, a ceramic capacitor can be used as an external capacitor. Further, a voltage equal to the high level voltage applied to the input gate 24, for example, about 10 V, is applied to the metal wiring 35. As described above, the configuration of the present invention can be realized.

〔Effect of the invention〕

Regarding the embodiment described above, the potentials of the field plate 27 on the extended drain are 0.5 (V _D - V _O ) + V _O and 0.25, respectively, from the side closest to the drain.
(V _D −V _O )+V _O , 0.125(V _D −V _O )+V _O . On the other hand, when the transistor is off, the potential distribution in the extended drain increases approximately as the square of the distance.
Therefore, if V _D >> V _O , field plate 2
Each potential of 7 is approximately equal to the channel potential immediately below it. Therefore, according to the present invention, the field plate effect can be sufficiently exerted, and the electric field in the gate oxide film is also low, so that the maximum drain breakdown voltage of the transistor can be easily obtained. Moreover, since each field plate is only capacitively coupled, there is essentially no leakage current, and the applications are not limited.

In the above description, only one typical and simple embodiment has been described for convenience of explanation, but the present invention is not limited to such an embodiment. For example, the field plate closest to the drain electrode may be capacitively coupled without contacting the drain, and such a modification is naturally included in the present invention.

[Brief explanation of the drawing]

Fig. 1 is a sectional view of a conventional transistor with a field plate, Fig. 2 is a sectional view of a conventional transistor with a resistive field plate, Fig. 3 is a sectional view of a transistor with the structure of the present invention, and Fig. 4 is its operation. An equivalent circuit for explaining the principle, FIG. 5a is a plan view of a typical embodiment of the present invention, and FIG. 5b is a partial sectional view of a. 1...Substrate, 2...Source, 3...Drain,
4... Input gate, 5... Field plate closest to the drain side, 6... Field plate closest to the source on the extended drain, 7... Divided field plate, 8... Coupling capacitance, 9
...Bias power supply, 10...Extended drain, 13
...Node corresponding to field plate 6, 1
4...Node corresponding to field plate 5,
21...Substrate, 22...Source, 23...Drain, 24...Input gate, 25...Field plate closest to the drain side, 26...Field plate closest to the source on the extended drain,
27...Divided field plate, 30...
...Extended drain, 31, 32, 33, 34...2
Metal wiring contacted to 7, 35...Metal wiring contacted to 26, 41, 42, 43,
44...Coupling capacity.

Claims (1)

[Claims] 1 A field plate divided into two or more along the channel direction, the field plate closest to the source being fixed at a constant potential or capacitively coupled, and the field plate closest to the drain being in contact with the drain or capacitively coupled. MIS transistors are characterized by the fact that the field plates on both sides are strongly capacitively coupled to each other.