JPH0566797B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a contour signal extraction filter that digitally extracts a contour signal from a composite video signal in which a luminance signal and a color signal are frequency multiplexed.

[Prior Art] Various methods for extracting contour signals from image information have been proposed from various fields. For example, in a television receiver, horizontal and vertical contour signals are extracted from a luminance signal, and the extracted horizontal and vertical contour signals are added to the original luminance signal to improve the sharpness of the image. Let me explain this in a little more detail.

The NTSC composite video signal S(t) includes a luminance signal Y(t) and two color difference signals U(t) and V(t).
It is a composite signal of the color signal C(t) which is orthogonally phase-modulated with the color subcarrier _sc (3.579545MHz).
In other words, the composite video signal S(t) is S(t)=Y(t)+C(t)=Y(t)+U(t)
It is expressed as sin2π _sc t+V(t)cos2π _sc t.

Conventionally used contour extraction filters of this type, whether analog or digital, separate the luminance signal Y(t) from the composite video signal S(t), and extract the separated luminance signal from the composite video signal S(t). Generally, a horizontal contour signal is obtained from Y(t) by using a horizontal contour extraction filter, and a vertical contour signal is obtained by a vertical contour extraction filter.

FIG. 1 is a block diagram showing the circuit configuration of a conventional digital horizontal contour extraction filter. In FIG. 1, an analog-to-digital conversion circuit (hereinafter referred to as an A/D conversion circuit) 2 that samples an analog composite video signal applied to an input terminal 1 at a predetermined sampling frequency _s and converts it into a digital composite video signal; , a color signal/luminance signal separation circuit (hereinafter referred to as YC separation circuit) 3 that separates and extracts a luminance signal from the digital composite manufacturing signal A/D converted by the A/D conversion circuit 2, and a horizontal contour extraction filter. 8 external circuits. The horizontal contour extraction filter 8 includes a delay circuit 5-1 that receives the digital signal from the YC separation circuit 3 and delays the reciprocal of the sampling frequency _s , that is, the sampling interval T of the digital signal, and a delay circuit 5-1 that receives the digital signal from the YC separation circuit 3. A delay circuit 5-2 that receives a digital luminance signal and delays it by a sampling interval T, a coefficient circuit that receives a signal from the delay circuit 5-1 and outputs the signal by -2, and a YC separation circuit 3 and a delay circuit. It is composed of an adder circuit 7 that receives signals from the circuit 5-2 and the coefficient circuit 6, adds the input signals, and outputs the result. The operation of horizontal contour signal extraction will be described below.

The analog video signal applied to the input terminal 1 is sampled at a predetermined frequency _fs by the A/D conversion circuit 2 and converted into a digital composite video signal. The YC separation circuit 3 supplies only the luminance signal component of the digitally converted composite video signal to the horizontal contour extraction filter 8 . Now, assume that the luminance signal (t) which is the output signal of the YC separation circuit 3 is given as (nT) at a certain time t=nT. At this time, the output luminance signal of the delay circuit 5-1 having a delay time T is given by ((n-1)T). In addition, the delay circuit 5
-2 delays the luminance signal ((n-1)T) delayed by the delay circuit 5-1 again by the time T, so the output signal of the delay circuit 5-2 becomes ((n-2)T). The coefficient circuit 6 receives the output signal of the delay circuit 5-1.
Since it is multiplied by 2, the output signal of the coefficient circuit 6 is −2((n
-1) T). Since the adder circuit 7 adds all its input signals and outputs the result, the luminance signal given to the output terminal 4 of the horizontal contour extraction filter 8 is (nT)-2((n-1)T)+((n-2 )T
) becomes. This represents the second-order differential of the luminance signal (t) with respect to the horizontal direction (horizontal frequency component) on the screen. Therefore, the horizontal high frequency component of the luminance signal, that is, the horizontal contour signal has been extracted.

FIG. 2 is a block diagram showing the structure of a conventional digital vertical contour extraction filter. In FIG. 2, the external circuit of the vertical contour extraction filter 9 is similar to the external circuit of the horizontal contour extraction filter of FIG.
It is composed of an A/D conversion circuit 2 that performs D conversion, and a YC separation circuit 3 that receives a signal from the A/D conversion circuit 2 and outputs only a luminance signal component. The vertical contour extraction filter 9 receives the luminance signal from the YC separation circuit 3 and delays it by one horizontal scanning time (hereinafter referred to as 1H), and the delay circuit 5-3 receives the signal from the delay circuit 5-3 and delays it by 1H. a delay circuit 5-4,
Receives the signal from the delay circuit 5-3 and changes its value by -2
It is comprised of a coefficient circuit 6 that multiplies, and an adder circuit 7 that receives signals from the YC separation circuit 3, delay circuit 5-4, and coefficient circuit 6, and adds these signals. The operation of the vertical contour extraction filter 9 will be described below.

First, the horizontal contour extraction filter 8 and the second
The only difference in configuration from the vertical contour extraction filter is the delay time of the delay circuit. Therefore, the luminance signal (nT) at a certain time t=nT is
Assuming that the output signal from the vertical contour extraction filter 9 is given from the YC separation circuit 3 to the vertical contour extraction filter 9, the output signal of the vertical contour extraction filter 9 is (nt)-2(nT-H)+( nT−2H). This is the vertical direction of the screen (vertical frequency component)
It represents the second derivative of . That is, the vertical high frequency component of the luminance signal, that is, the contour signal in the vertical direction on the screen is extracted.

FIG. 3 is a block diagram showing the structure of a conventional digital horizontal/vertical contour extraction filter constructed by superimposing the horizontal contour extraction filter of FIG. 1 and the vertical contour extraction filter of FIG. 2.

The configuration consists of the horizontal contour extraction filter 8 shown in Figure 1 and the second
This is a superposition of the vertical contour extraction filter 9 shown in the figure, and the delay circuit 5-5 is simply used to adjust the delay time.
The delay times of and 5-6 and the coefficient values of the coefficient circuit 6 are different. In other words, the delay time is the time obtained by subtracting the sampling period from one horizontal scanning time (hereinafter referred to as H
- Delay circuit 5-5 (denoted as T), delay circuit 5-1 with delay time T, and delay circuit 5-2 with delay time T
and a delay circuit 5-6 having a delay time (H-T) are connected in series to each other in this order. The contour extraction filter 10 also includes a coefficient circuit 6 that receives a signal from a delay circuit 5-1 and multiplies its value by -4, a YC separation circuit 3, a delay circuit 5-5, a coefficient circuit 6, and a delay circuit 5.
-2 and an adder circuit 7 that receives and adds signals from the delay circuit 5-6. That is, the horizontal/vertical contour extraction filter 10 is a vertical contour extraction filter composed of a delay circuit 5-5, a delay circuit 5-1, a delay circuit 5-2, a delay circuit 5-6, a coefficient circuit 6, and an addition circuit 7. , delay circuit 5-1 and delay circuit 5-2
A horizontal contour extraction filter consisting of a coefficient circuit 6 and an adder circuit 7 are superposed. Therefore, if this horizontal/vertical contour extraction filter 10 is used, horizontal contour signals and vertical contour signals can be extracted simultaneously. Furthermore, in the horizontal and vertical contour extraction filter having this configuration, it can be considered that calculation of second-order differential in diagonal directions on the screen is also performed, and contour signals in diagonal directions on the screen can also be extracted.

As mentioned above, conventional contour extraction circuits extract contour signals using only the luminance signal component. Therefore, 1H is required for a luminance signal/chrominance signal separation circuit that separates a composite video signal into a luminance signal and a chrominance signal.
1H required for delay circuit (delay circuit that delays one horizontal scanning time signal) and horizontal/vertical contour extraction filter
The drawback is that it cannot be shared with a delay circuit, leading to an unavoidable increase in costs.

[Summary of the invention] The purpose of the invention is to eliminate the above-mentioned drawbacks and to
An object of the present invention is to provide a contour signal extraction filter of a new type for directly extracting a contour signal from a composite video signal, in which a delay circuit can be shared by a luminance signal/chrominance signal separation circuit and a contour extraction filter.

To summarize, this invention samples an analog composite video signal so that the phases of the color subcarriers are aligned in the vertical direction on the screen in the order of in-phase and anti-phase, and the pixel signal of interest and the color subcarrier are This is a contour extraction filter that extracts contours directly from a composite video signal by performing second-order differentiation of pixel signals in a direction where the change in pixel signals is large using neighboring pixel signals that are in phase.

The objects and other objects and features of the present invention will become more apparent from the detailed description given below with reference to the drawings.

[Embodiment of the Invention] FIG. 4 is a block diagram showing the configuration of a contour signal extraction filter which is an embodiment of the invention.

In FIG. 4, external circuits of the contour signal extraction filter 11 include an A/D conversion circuit 2 that converts an analog composite video signal applied to the input terminal 1 into a digital composite video signal, and an A/D conversion circuit 2 in the A/D conversion circuit 2. A sampling pulse generation circuit 30 that provides a timing signal for D conversion (sampling) is provided.
The pulse signal generated by the sampling pulse generation circuit 30 has a frequency _s that is four times the frequency _sc of the color subcarrier included in the analog composite video signal, and is synchronized with the color subcarrier. Therefore, the analog composite video signal is a signal sequence sampled every period T, which is the reciprocal of the sampling pulse frequency _s .

The contour signal extraction filter 11 that extracts contour signals from the sampled composite video signal is roughly divided into a delay system, first and second calculation systems, and a signal output system.

The delay system includes a 4T delay circuit 20-1 that receives the composite video signal sampled by the A/D conversion circuit 2, delays it by four times the sampling period T, and outputs it, and a 1 horizontal scanning time after receiving the signal
(H-2T) delay circuit 21 that outputs with a delay of 1H minus twice the sampling period T.
-1, the (H-2T) delay circuit 21-2 which receives the signal from the (H-2T) delay circuit 21-1 and outputs the signal with a delay of (H-2T), and the (H-2T) delay circuit 21-2. It is composed of a 4T delay circuit 20-2 which receives a signal from the circuit 21-2, delays it by 4T, and outputs the delayed signal to an addition circuit 22-1 and a subtraction circuit 24-3.

The first calculation system is further divided into two systems.
One system includes an adder circuit 22-1 that receives and outputs the signal from the 4T delay color circuit 20-2 and the A/D conversion circuit 2, and an adder circuit 22-1 that receives and outputs the signal from the adder circuit 22-1. A 1/4 multiplier circuit 23-1 that multiplies the signal by 1/4 and outputs the signal, and a (H-2T) delay circuit 21
A signal from the 1/2 times circuit 26 which receives the signal from -1, multiplies the value by 1/2 and outputs it, and the 1/4 times circuit 23-
1 and a subtraction circuit 24-1 which receives the signal from the 1/2 multiplier circuit 26 and subtracts the signal from the 1/4 multiplier circuit 23-1 from the signal sample value from the 1/2 multiplier circuit 26. The other calculation system includes a subtraction circuit 24-3 that receives and subtracts the signal from the A/D conversion circuit 2 and the signal from the 4T delay circuit 20-2 (subtraction may be performed from either side);
An absolute value circuit 27 receives the signal from the subtraction circuit 24-3 and calculates the absolute value of the signal.

The second calculation system is also divided into two systems. One system includes a subtraction circuit 24- which receives signals from a 4T delay circuit 20-1 and an (H-2T) delay circuit 21-2 and calculates the difference between the signal values (the subtraction direction may be either direction). 4, and an absolute value circuit 25- which receives the signal from the subtraction circuit 24-4 and takes the absolute value of the signal.
It consists of 2. The other system is a 4T delay circuit 20-
An adder circuit 22-2 receives a signal from 1 and a signal from a (H-2T) delay circuit 21-2 and adds these signals; A 1/4x circuit 23-2 that multiplies by 4,
(H-2T) The signal from the 1/2 times circuit 26 which multiplies the signal from the delay circuit 21-1 by 1/2 and outputs it, and the signal from the 1/4 times circuit 23-2 is received and halved. double circuit 26
and a subtraction circuit 24-2 that subtracts the signal from the 1/4 multiplier circuit 23-2 from the signal from the 1/4 multiplier circuit 23-2.

The output system includes absolute value circuit 25-1 and absolute value circuit 2.
A comparison circuit 27 receives signals from the subtraction circuit 24-1 and the subtraction circuit 24-2 and compares the signals, and a comparison circuit 27 receives signals from the subtraction circuit 24-1 and the subtraction circuit 24-2 and selects one of them depending on the signal from the comparison circuit 27. It is composed of a switch circuit 28 that selectively passes one of the signals, and a multiplier circuit 29 that receives a signal from the switch circuit 28, multiplies the signal by N, and supplies the signal to the output terminal 4. The multiplier N of the multiplication circuit 29 is controlled by, for example, a microcomputer (not shown) to perform contour correction adjustment.

FIG. 5 shows a sampled composite video signal sequence focusing on the phase of the color subcarrier. In FIG. 5, the same reference numerals indicate sampled composite video signals (hereinafter referred to as sample points) in which color subcarriers have the same phase. Also, the color subcarrier frequency _sc is 4
Since sampling is performed at twice the frequency _s , sampling points with opposite color subcarriers are lined up in a row in the vertical direction of the screen. Line (n) represents the nth horizontal scanning line on the screen, and horizontal scanning is performed from left to right in FIG. P1 to P9 are symbols attached to sample points for convenience of explanation. Hereinafter, with reference to FIGS. 4 and 5, the sample point P5 obtained by the contour signal extraction filter 11 will be described.
This section describes contour extraction.

Now, assume that the A/D conversion circuit 2 supplies the sample value of the sample point P9 to the contour extraction filter 11 at a certain time t. At this time, the 4T delay circuit 20-
The sample value given by 1 is the sample value of sample point P7 4T hours before sample point P9 (4 sample points to the left in FIG. 5).

(H-2T) The sample value given by the delay circuit 21-1 is the sample point P which is (H-2T) time before the sample point P7.
This is the sample value of 5.

(H-2T) The sample value provided by the delay circuit 21-2 is similarly the sample value at sample point P3.

Moreover, the sample value given by the 4T delay circuit 20-2 is
This is the sample value of sample point P1.

Each output sample value from the delay system described above is
Each of the four systems will be described in turn because the calculations are performed in two examples. First, adder circuit 2
2-1, 1/4 multiplication circuit 23-1, subtraction circuit 24-1
We will describe a system consisting of The adder circuit 22-1 receives the sample value of the sample point P9 provided by the A/D converter circuit 2.
Since the sample value of the sample point P1 provided by the 4T delay circuit 20-2 is added, the output provided by the adding circuit 22-1 is (the sample value of the sample point P1)+(the sample value of the sample point P9).

Since the 1/4 times circuit 23-1 multiplies its input sample value by 1/4 and outputs it, the output given by the 1/4 times circuit 23-1 is 1/4 {(sample value at sampling point P1) + ( sample value of sample point P9)}.

The subtraction circuit 23-1 is configured to subtract the sample value provided by the 1/4 multiplier circuit 23-1 from the sample value provided by the 1/2 multiplier circuit 26. Here, 1/2 times circuit 26
(H-2T) Since the sample value given by the delay circuit 21-1 is multiplied by 1/2 and output, the output of the 1/2 multiplier 26 is the sample value at the sample point P5. Therefore, the output Q ₁ given by the subtraction circuit 24-1 is Q ₁ = 1/2 (sample value at sample point P5) - 1/4
{(sample value of sample point P1)+(sample point of sample point P9)}. The output Q ₁ of the subtraction circuit 24-1 is applied to one terminal of the switch circuit 28.

Next, adder circuit 22-2, 1/4 times circuit 23-2,
The system consisting of the subtraction circuit 24-2 will be described. The adder circuit 22-2 receives and adds the output sample value of the 4T delay circuit 22-1 and the output sample value of the (H-2T) delay circuit 21-2, and outputs the result.
-2 output is (sample value of sample point P7) + (sample point P
3 sample value).

Since the 1/4 times circuit 23-2 multiplies its input signal by 1/4 and outputs it, the output of the 1/4 times circuit 23-2 is 1/4.
{(sample value of sample point P7) + (sample value of sample point P3)}
becomes. The subtraction circuit 24-2 is configured to subtract the signal provided by the 1/4 multiplier circuit 23-2 from the signal provided by the 1/2 multiplier circuit 26. The output given by the 1/2 multiplier circuit 26 is then 1/2 (sample value at sample point P5)
It is. Therefore, the output signal given by the subtraction circuit 24-2 is Q ₂ = 1/2 (sample value at sample point P5) - 1/4
{(sample value of sample point P7)+(sample value of sample point P3)}. The sample value P given by this subtraction circuit 24-2
9 is applied to the other terminal of the switch circuit 28.

Next, consider a system consisting of the subtraction circuit 24-3 and the absolute value circuit 25-1. The subtraction circuit 24-3 takes the difference between the sample value from the 4T delay circuit 20-2 and the signal from the A/D conversion circuit 2, and the absolute value circuit 25-1 receives the sample value from the subtraction circuit 24-3. Since the absolute value is taken, the sample value given by the absolute value circuit 25-1
R ₁ becomes R ₁ =|(sample value of sample point P1)−(sample value of sample point P9)|. The subtraction circuit 24- which is the last system of the calculation system
4. Consider the system of absolute value circuit 25-2. The subtraction circuit 24-4 calculates the difference between the signal from the 4T delay circuit 20-1 and the signal from the (H-2T) delay circuit 21-2, and the absolute value circuit 25-2 calculates the difference between the signal from the subtraction circuit 24-4. Since the signal R ₂ given by the absolute value circuit 25-2 is R ₂ =|(sampled value at sampling point P3)−(sampled value at sampling point P7)|. Comparison circuit 27 is absolute value circuit 25-1, 2
The signals from 5-2 are received, their magnitudes are compared, and the switch circuit 28 is controlled as described below based on the comparison results. That is, when the signals R ₁ and R ₂ applied to the comparison circuit 27 are R ₁ > R ₂ , the switch circuit 28 passes the signal Q ₁ from the subtraction circuit 24-1, and when R ₁ ≦ R ₂ , the switch circuit 28 passes the signal Q 1 from the subtraction circuit 24-1. Circuit 28 passes signal Q ₂ from subtraction circuit 24-2.
The output of the switch circuit 28 is applied to a multiplier circuit 29. The multiplication circuit 29 multiplies the input signal by N and outputs it for contour correction adjustment. This multiplier N is controlled by, for example, an external microcomputer (not shown) so as to obtain the desired contour correction.

Signals Q ₁ from subtraction circuits 24-1 and 24-2,
Q ₂ indicates the second-order differential at the sample point where the color subcarriers in the diagonal direction on the screen are in phase. Therefore, considering that the reference area is a minute area and the color signal hardly changes, the color signal components of signals Q ₁ and Q ₂ are canceled because the color subcarriers use similar sampling points. In the end, the luminance signal is subjected to second-order differentiation. Also, the one with the larger signal change is detected, and the two
Since second-order differentiation is performed, contour signals in the horizontal, vertical, and diagonal directions are extracted simultaneously.

YC using the contour signal extraction filter 11 described above.
To perform the separation, a signal with an appropriate delay time can be taken out from the delay circuit, for example, by tapping.

Note that in the above example, a 1/4 times circuit and a 1/2 times circuit are used, but the coefficients 1/4 and 1/2 can be calculated by using a combination of other coefficients that satisfy the 1:2 relationship. Good too.

In addition, in the above embodiment, sampling is performed at a frequency that is four times the frequency of the color subcarrier, but the sampling frequency is such that sampling points whose color subcarrier phases are opposite to each other are lined up in a line in the vertical direction of the screen. If so, the same effects as in the above embodiment can be obtained by simply changing the delay time of the delay circuit appropriately.

[Effects of the Invention] As described above, in the contour signal extraction filter of the present invention, the direction in which the signal change is large is detected using neighboring pixel signals whose color subcarriers are in the same phase, and the direction in which the pixel signal change is large is detected. The structure is such that a contour signal is extracted by performing a second-order differential calculation using a pixel signal in the direction. Therefore, it is possible to perform contour correction on a composite video signal with high accuracy, and the YC separation circuit and the 1H delay circuit can be used in common.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the structure of a conventional digital horizontal contour extraction filter. FIG. 2 is a block diagram showing the structure of a conventional digital vertical contour signal extraction filter. FIG. 3 is a block diagram of a conventional digital contour signal extraction filter. FIG. 4 is a block diagram showing the configuration of a contour extraction filter which is an embodiment of the present invention. FIG. 5 is a diagram showing the arrangement of a series of sampled composite video signals focusing on the phase of the color subcarrier. In the figure, 2 is an A/D conversion circuit, 10 , 11
are contour extraction filters, 20-1, 20-2, 21
-1, 21-2 are delay circuits, 22-1, 22-2
is an adder circuit, 23-1 and 23-2 are 1/4 times circuits,
24-1, 24-2, 24-3, 24-4 are subtraction circuits, 25-1, 25-2 are absolute value circuits, 26 is a 1/2 times circuit, 27 is a comparison circuit, 28 is a switch circuit, 29 30 is a multiplication circuit, and 30 is a sampling pulse generation circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Claims] 1. Adaptive type that extracts a contour signal from a composite video signal sample point sequence containing sampled color subcarriers temporally arranged in a grid pattern in the horizontal scanning line direction and the screen vertical direction. A contour extraction filter, comprising: a first extraction means for extracting a first sample point from the sample point series; second, third, fourth, and fifth sampling points, respectively, that have color subcarriers having the same phase as the color subcarrier of the sampling point and are close to the first sampling point; 3, 4th, and 5th extraction means; 1st calculation means for receiving signals from the 1st, 2nd, and 5th extraction means to calculate a quadratic differential; and 1st, 3rd extraction means. and a second calculating means that receives the signal from the fourth extracting means and calculates a second order differential, and receives the signals from the second extracting means and the fifth extracting means and detects the amount of change thereof. a first detection means for receiving signals from the third extraction means and the fourth extraction means and detecting the amount of change thereof; a comparison means for receiving a signal from the detection means and comparing the magnitude thereof; and one of a signal given by the first calculation means or a signal given by the second calculation means in response to the signal from the comparison means. An adaptive contour extraction filter comprising: a selection means for passing a signal; and means for receiving, weighting, and outputting a signal from the selection means. 2. The adaptive extraction filter according to claim 1, wherein the first, second, third and fourth extraction means are delay circuits each having a specified delay time. 3. The adaptive contour extraction filter according to claim 1 or 2, wherein the composite video signal is sampled at a frequency four times the frequency of the color subcarrier.