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JPH0570294B2 - - Google Patents
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JPH0570294B2 - - Google Patents

Info

Publication number
JPH0570294B2
JPH0570294B2 JP14935287A JP14935287A JPH0570294B2 JP H0570294 B2 JPH0570294 B2 JP H0570294B2 JP 14935287 A JP14935287 A JP 14935287A JP 14935287 A JP14935287 A JP 14935287A JP H0570294 B2 JPH0570294 B2 JP H0570294B2
Authority
JP
Japan
Prior art keywords
film
plate capacitor
layer
tiw
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP14935287A
Other languages
Japanese (ja)
Other versions
JPS63312614A (en
Inventor
Yoichi Aono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14935287A priority Critical patent/JPS63312614A/en
Publication of JPS63312614A publication Critical patent/JPS63312614A/en
Publication of JPH0570294B2 publication Critical patent/JPH0570294B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマイクロ波帯の高出力増幅器の入出力
整合回路に使用される単板コンデンサーに関し、
特に電極構造の改良に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a single-plate capacitor used in an input/output matching circuit of a high-power amplifier in the microwave band.
In particular, it relates to improvements in electrode structure.

〔従来の技術〕[Conventional technology]

高周波信号を処理する電気回路では、高誘電率
基板上に形成された集中定数化キヤパシタ(単板
コンデンサ)と20〜30μm〓のAuボンデイング線
によるインダクタンスとからなる集中定数回路に
よるインピーダンス整合化が行なわれている。
In electrical circuits that process high-frequency signals, impedance matching is performed using a lumped constant circuit consisting of a lumped capacitor (single-plate capacitor) formed on a high dielectric constant substrate and an inductance formed by a 20-30 μm Au bonding wire. It is.

第2図は集中定数回路に用いられている従来の
単板コンデンサー(チツプコンデンサーともい
う)の縦断面図を示したものであり、TiO2を主
成分とする高誘電率基板1の両面にTiW膜2,
5とAu膜4,6とが被覆されている。実装はま
ずAu膜4をAuSnあるいはAuSi等の共晶合金ソ
ルダーを用いてパツケージの放熱基板に固着し、
その後Au膜6にAuのボンデイングワイアで接続
することにより使用される。
Figure 2 shows a vertical cross-sectional view of a conventional single-plate capacitor (also called a chip capacitor) used in lumped constant circuits. membrane 2,
5 and Au films 4 and 6 are coated. For mounting, first the Au film 4 is fixed to the heat dissipation board of the package using a eutectic alloy solder such as AuSn or AuSi.
Thereafter, it is used by connecting to the Au film 6 with an Au bonding wire.

〔発明が解決しようとする問題点〕 しかしながら、この様な従来の電極構造には以
下に述べる大きな欠点がある。即ち、単板コンデ
ンサーの接着強度がマウントの作業時間に大きく
依存し、時間と共に低下することである。特に一
つのパツケージに数個の単板コンデンサーを装着
する場合、最初にマウントした単板コンデンサー
のAu膜4がソルダーに食われてしまい、TiW膜
2とソルダーの界面で剥れが生じるという欠点が
あり、組立歩留りの低下及び信頼性低下の大きな
要因となつている。
[Problems to be Solved by the Invention] However, such a conventional electrode structure has the following major drawbacks. That is, the adhesive strength of a single-plate capacitor largely depends on the mounting operation time, and decreases over time. In particular, when several single-plate capacitors are mounted in one package cage, the Au film 4 of the first mounted single-plate capacitor is eaten away by the solder, causing peeling at the interface between the TiW film 2 and the solder. This is a major factor in lowering assembly yield and reliability.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の目的は、この様な従来の欠点を除去
し、剥れの発生しない安定な電極構造を有する単
板コンデンサーを提供するものである。
An object of the present invention is to eliminate such conventional drawbacks and provide a single-plate capacitor having a stable electrode structure without peeling.

本発明の単板コンデンサーは、酸化チタンを主
成分とする高誘電率基板の少なくとも一主面上
に、第1層としてTiWからなる高融点金属膜、
第2層としてPt,Pd、又はNi膜の中から選ばれ
たいずれかの膜、第3層としてAu膜を順次積層
した電極構造を有している。
The single-plate capacitor of the present invention includes a high melting point metal film made of TiW as a first layer on at least one main surface of a high dielectric constant substrate mainly composed of titanium oxide;
It has an electrode structure in which a film selected from Pt, Pd, or Ni film is laminated as the second layer, and an Au film is laminated as the third layer.

〔実施例〕〔Example〕

以下、本発明について図面を参照しつつ説明す
る。
The present invention will be described below with reference to the drawings.

第1図は本発明にかかる単板コンデンサーの一
実施例の縦断面図である。まず酸化チタンを主成
分とする高誘電率基板(ω:〜90)1の基板厚を
ラツピング及びポリツシング研摩により例えば
150μm程度の厚さに加工する。その後、ソルダー
で固着される側(図の下面側)に例えば600Åの
TiW膜(Ti:10Wt%)2、例えば2000ÅのPt膜
3、例えば3μmのAu膜4をこの順序に連続して
スパツタ法により形成する。次に基板を裏返して
同様に例えば600ÅのTiW膜5、例えば3μmのAu
膜6をこの順序に連続して形成する。その後、所
望の容量値が得られるようにTiW膜5−Au膜5
−Au膜6から成る電極の大きさを通常のホトプ
ロセスによりエツチング加工し、最後にダイシン
グにより個々に分離することにより第1図に示す
ような単板コンデンサーが完成する。
FIG. 1 is a longitudinal sectional view of an embodiment of a single-plate capacitor according to the present invention. First, the thickness of a high dielectric constant substrate (ω: ~90) 1 whose main component is titanium oxide is reduced by lapping and polishing.
Process to a thickness of approximately 150μm. After that, for example, a 600Å
A TiW film (Ti: 10 Wt%) 2, a Pt film 3 with a thickness of, for example, 2000 Å, and an Au film 4 with a thickness of, for example, 3 μm are successively formed in this order by sputtering. Next, turn the substrate over and apply a TiW film 5 of, for example, 600 Å, and a layer of Au of, eg, 3 μm, in the same manner.
The films 6 are successively formed in this order. After that, the TiW film 5 - Au film 5 is adjusted so that the desired capacitance value is obtained.
- The size of the electrodes made of the Au film 6 is etched by a normal photo process, and finally they are separated into individual pieces by dicing, thereby completing a single-plate capacitor as shown in FIG.

この様な電極構造にすれば、ソルダーに対して
拡散バリアとなるPt膜3がTiW膜2とAu膜4の
間に介在するのでマウント時間が長くなつても単
板コンデンサーの接着強度は低下しない。実際に
AuSnソルダーを用いてN2雰囲気中320℃、6分
間の条件でマウントした単板コンデンサーのダイ
シエア試験を行つた結果、Pt膜3を介在してい
ない単板コンデンサーの剥れ発生率は約30%であ
つたのに対し、Pt膜3を介在させた単板コンデ
ンサーでは全く剥れは発生せず、試験した100個
のチツプコンデンサーすべてが接着強度の規格
(600g以上)を満足した。
With this electrode structure, the Pt film 3, which acts as a diffusion barrier against the solder, is interposed between the TiW film 2 and the Au film 4, so the adhesive strength of the single-plate capacitor will not decrease even if the mounting time becomes longer. . actually
As a result of a die shear test of a single-plate capacitor mounted using AuSn solder at 320°C for 6 minutes in an N2 atmosphere, the peeling rate of a single-plate capacitor without Pt film 3 was approximately 30%. On the other hand, no peeling occurred in the single-plate capacitor with the Pt film 3 interposed therebetween, and all of the 100 chip capacitors tested satisfied the adhesive strength standard (600 g or more).

上記の実施例はソルダーに対する拡散バリア層
をPt膜3で形成したものであるが、Pt膜3の代
りにPd膜あるいはNi膜を用いても同様の効果が
得られる。
In the above embodiment, the diffusion barrier layer against the solder is formed of the Pt film 3, but the same effect can be obtained by using a Pd film or a Ni film instead of the Pt film 3.

〔発明の効果〕〔Effect of the invention〕

以上の説明から明らかなように、本発明によれ
ばTiW膜2とAu膜4との間にPt,Pdあるいは
Ni膜等のソルダーに対する拡散バリア層が介在
することにより、単板コンデンサー接着強度の低
下あるいは剥れを防止でき、組立歩留り及び信頼
性の著しい向上が可能となつた。
As is clear from the above explanation, according to the present invention, between the TiW film 2 and the Au film 4, Pt, Pd or
The presence of a diffusion barrier layer against the solder, such as a Ni film, prevents the bonding strength of single-plate capacitors from decreasing or peeling off, making it possible to significantly improve assembly yield and reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による単板コンデン
サーの縦断面図、第2図は従来の単板コンデンサ
ーの縦断面図である。 1……TiO2を主成分とする高誘電率基板、2,
5……TiW膜、3……Pt膜、4,6……Au膜。
FIG. 1 is a longitudinal cross-sectional view of a single-plate capacitor according to an embodiment of the present invention, and FIG. 2 is a longitudinal cross-sectional view of a conventional single-plate capacitor. 1... High dielectric constant substrate containing TiO 2 as the main component, 2,
5...TiW film, 3...Pt film, 4,6...Au film.

Claims (1)

【特許請求の範囲】[Claims] 1 高誘電率基板の少なくとも一主面上に、第1
層としてTiWからなる高融点金属膜、第2層と
してPt,Pd、又はNi膜の中から選ばれたいずれ
かの膜、第3層としてAu膜を順次積層して構成
された電極構造を有することを特徴とする単板コ
ンデンサー。
1. On at least one main surface of the high dielectric constant substrate, a first
It has an electrode structure consisting of a high melting point metal film made of TiW as the layer, a film selected from Pt, Pd, or Ni film as the second layer, and an Au film as the third layer. A single plate capacitor characterized by:
JP14935287A 1987-06-15 1987-06-15 Single plate capacitor Granted JPS63312614A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14935287A JPS63312614A (en) 1987-06-15 1987-06-15 Single plate capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14935287A JPS63312614A (en) 1987-06-15 1987-06-15 Single plate capacitor

Publications (2)

Publication Number Publication Date
JPS63312614A JPS63312614A (en) 1988-12-21
JPH0570294B2 true JPH0570294B2 (en) 1993-10-04

Family

ID=15473248

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14935287A Granted JPS63312614A (en) 1987-06-15 1987-06-15 Single plate capacitor

Country Status (1)

Country Link
JP (1) JPS63312614A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0444101U (en) * 1990-08-13 1992-04-15
JP4568975B2 (en) * 2000-08-23 2010-10-27 株式会社村田製作所 Capacitor manufacturing method

Also Published As

Publication number Publication date
JPS63312614A (en) 1988-12-21

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