JPH0570853B2 - - Google Patents

Description

[Detailed Description of the Invention] [Summary] The present invention provides a diagnostic method that verifies the validity of an interface control circuit by looping back signals of a common bus inside hardware, and performs a diagnostic operation on connected devices. In order to solve the problem of increasing the amount of objects and increasing the number of locations that cannot be diagnosed, by looping back the signal internally, in order to prevent the influence of By sending an initialization signal that has been set up or a response prohibition signal to a dedicated test line, and forcing other connected devices to stop operating or prohibit responses, the increase in volume due to internal loopback can be suppressed. , and enables diagnosis using actually operating hardware.

[Industrial application field]

The present invention relates to a diagnostic method for diagnosing an interface control circuit connected to a common bus. In particular, it relates to verifying the validity of a common bus interface in a computer system that uses a common bus to connect system components (CPU, memory, input/output control device, etc.).

[Conventional technology]

Conventionally, verification of bus interface control circuits of computer systems connected by a common bus has been
As shown in FIG. 3, a so-called loopback method is used to diagnose the operation of other devices connected to the common bus without affecting them. This loopback method is based on the interface control circuit 21.
In order to loop back and capture control signals (strobe signals, response signals, etc.), address signals, and data sent to the common bus internally,
MUX 1 to MUX 4 were installed. The operation will be briefly explained below.

In FIG. 3, the test mode latch 22 is set and MUX1 to MUX4 are switched to the A side. For example, a control signal (such as a strobe signal) to be sent from the master control circuit to the common bus is taken into the slave control circuit via MUX4. Similarly, data and addresses to be sent to the common bus from the data output latch and address output latch are taken into the data input latch and address input latch via MUX2 and MUX1. Based on these captured control signals, data, and addresses, the operation of the interface control circuit 21 is diagnosed.

[Problem that the invention seeks to solve]

Conventional interface control circuit 2 shown in Fig. 3
1 had MUX1 to MUX4 installed to return control signals internally for diagnosis.
There was a problem that the amount of material increased.

In addition, since control signals, etc. were looped back internally and taken in under conditions that did not affect the common bus, the drivers DV1 to DV4, which send control signals, etc. to the common bus, and the control signals, etc. from the common bus, Receiver RV1 to RV4 to receive
There was a problem that it was not possible to diagnose the operation of the system.

The present invention sends an initialization signal defined in the interface or sends a response prohibition signal to a dedicated test line during diagnostic operation, and forces other connected devices to stop operating or respond. By prohibiting this, the purpose is to suppress the increase in volume due to internal folding and to enable diagnosis using actually operating hardware.

[Means for solving problems]

Means for solving the problem will be explained with reference to FIGS. 1 and 2.

In FIGS. 1 and 2, interface control circuits 1 and 1-1 exchange data with a common bus, and are the circuits to be diagnosed. This interface control circuit 1, 1-1
is composed of a driver 3, a receiver 4, etc.

The test mode latches 2 and 2-1 send out a reset signal to the common bus or a response inhibit signal to the test line 5 when set.

The test line 5 is for transmitting a response prohibition signal to other devices.

[Effect]

The present invention, as shown in FIGS. 1 and 2,
Set test mode latch 2 and send the reset signal to the common bus or test mode latch 2
-1 and sends a response prohibition signal to the test line 5 to hold other devices in the initialized state or prohibit responses, while the control signal from the driver 3,
Data and addresses are sent to the common bus, and the control signals, data and addresses sent to the common bus are taken in via the receiver 4 to diagnose the operation of the interface control circuit 1.

Therefore, it is possible to diagnose the operation of the interface control circuit 1 with a simple configuration, and it is also possible to diagnose the operation with the same circuit configuration as in normal operation. Driver 3 connected directly to the common bus
It is also possible to diagnose the operation of the receiver 4 as well.

〔Example〕

Next, using FIG. 1 and FIG.
The configuration and operation of the embodiment will be explained in detail.

FIG. 1 shows a configuration diagram of an embodiment in which a test mode latch 2 is set to perform diagnosis.

In FIG. 1, interface control circuit 1
is used to exchange control signals (strobe signals, response signals, etc.), addresses, and data with the common bus.

The test mode latch 2 is set when diagnosing the operation of the interface control circuit 1. By setting this test mode latch 2, a system reset signal is sent to the common bus to hold all other devices in their initialized state. For this reason, the illustrated interface control circuit 1
Any bus cycle performed on the common bus will be ignored by other devices and will not affect other devices.

The driver 3 sends control signals, addresses, and data to the common bus.

The receiver 4 receives control signals, addresses, and data from the common bus.

The address output latch 5-1 and data output latch 5-2 hold addresses and data to be sent to the common bus.

The address input latch 6-1 and data input latch 6-2 take in and hold addresses and data from the common bus.

The master control circuit 7-1 sends control signals (such as strobe signals) to the common bus.

The slave control circuit 7-2 takes in control signals (response signals, etc.) from the common bus.

The address setting register 7-3 is used to set an address to be accessed.

Next, the operation will be explained.

In FIG. 1, the test mode latch 2 is set and the SYSRST (system reset) signal is sent to the common bus. This keeps all other devices connected to the common bus in an initialized state and ignores any bus cycles performed on the common bus. Therefore, in this state, arbitrary addresses are sequentially set in the address setting register 7-3 and input to the slave control circuit 7-2 to access the common bus under the control of the master control circuit 7-1. Make it. At this time, the address and data set in the address output latch 5-1 and the data output latch 5-2 are sent to the common bus via the driver 3, and from the common bus to the receiver 4.
Addresses and data taken in through the address input latch 6-1 and data input latch 6-2 are held. These control signals sent to the common bus,
The operation of the interface control circuit 1 is diagnosed based on the address, data, and control signal, address, and data taken in from the common bus.

As described above, the test mode latch 2 is set and a system reset signal is sent to the common bus to hold all other devices in the initialized state, and during this time, control signals, etc. are sent to the common bus via the driver 3. It is possible to diagnose the operation of the interface control circuit 1 in the same state as the normal operating state by transmitting a control signal and receiving control signals from the common bus via the receiver 4.

FIG. 2 shows a configuration diagram of another embodiment in which diagnosis is performed by sending a response prohibition signal to the test line 5.

In Figure 2 A, the test mode latch 2-1
is set when diagnosing the operation of the interface control circuit 1. After the interface control circuit 1-1 obtains control of the common bus, by setting the test mode latch 2-1, a response inhibit signal is sent to the test line 5, and all other devices Even if the user is asked to do so, the user is instructed not to respond.

The test line 5 is for transmitting a response prohibition signal to other devices connected to the common bus.

The arbiter 6 performs exclusive management of which device is given control of the common bus.

Next, the operation of the configuration in FIG. 2A will be explained using FIG. 2B.

In FIG. 2B, device A sends "Bus Request A" to arbiter 6 via the common bus.
Arbiter 6 replies to device A with "Bus Grant A". Correspondingly, device A has the previous device
stops sending the “Bus Busy” signal and the “Data
When "Strobe" and "Data Ack" are not output on the bus, the "Bus Busy" signal is sent to acquire control of the common bus.Then,
A response prohibition signal according to this embodiment is sent to the test line 5 to instruct other devices not to respond even if the own device is selected. While sending this response prohibition signal to test line 5, “Data
A control signal such as "Strobe" is sent to the common bus via the driver 3, and a control signal is taken in from the common bus via the receiver 4 to diagnose the operation of the interface control circuit 1-1.

As mentioned above, device A etc. makes “Bus Request”
After transmitting a signal to the arbiter 6 to acquire control of the common bus, and after transmitting a response prohibition signal to the test line 5 to make other devices unresponsive, control signals etc. are transmitted to the common bus via the driver 3. By transmitting control signals to the bus and receiving control signals etc. from the common bus via the receiver 4 and diagnosing the operation of the interface control circuit 1-1, the interface control circuit 1-1 can be operated in the same state as the normal operating state. 1 operation diagnosis can be performed.

〔Effect of the invention〕

As explained above, according to the present invention, after setting the test mode latch 2 and sending a reset signal to the common bus, or acquiring control of the common bus, the test mode latch 2-1 is set to send a response prohibition signal. is sent to the test line 5 while other devices are held in the initialized state or prohibited from responding.
A configuration in which control signals, data, and addresses are sent from the driver 3 to a common bus, and the control signals, data, and addresses sent to the common bus are received via a receiver 4 to diagnose the operation of the interface control circuit 1. interface control circuit 1, with a simple circuit configuration.
1-1 operation diagnosis can be performed. In addition, operation diagnosis can be performed using the same circuit configuration as in normal operation, and in particular, operation diagnosis can be performed including the driver 3 and receiver 4 that are directly connected to the common bus, which could not be diagnosed by conventional internal loopback. be able to.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention, FIG. 2 is a block diagram of another embodiment of the present invention, and FIG. 3 is an explanatory diagram of a prior art. In the figure, 1 and 1-1 are interface control circuits;
2 and 2-1 are test mode latches, 3 is a driver, 4 is a receiver, and 5 is a test line.

Claims (1)

[Claims] 1. A diagnostic method for diagnosing an interface control circuit connected to a common bus, comprising: a driver 3 that sends control signals, addresses, and data to the common bus; It is equipped with an interface control circuit 1 consisting of a receiver 4 for taking in data and a control circuit for controlling a common bus, and a test mode latch 2 for sending a reset signal to the common bus. While the test mode latch 2 is turned on and a reset signal is sent to the common bus, the receiver 4 captures the control signals sent from the driver 3 to the common bus, and diagnoses the interface control circuit 1. An interface control circuit diagnostic method characterized by being configured to perform the following steps. 2 In a diagnostic method for diagnosing an interface control circuit connected to a common bus, a driver 3 sends control signals, addresses, and data to the common bus, a receiver 4 receives control signals, addresses, and data from the common bus, and a common It is equipped with an interface control circuit 1 consisting of a control circuit that controls a bus, and a test line 5 for sending a response prohibition signal that prohibits responses to the common bus. While the interface control circuit 1 that has acquired control of the bus is sending a response prohibition signal to the test line 5, the receiver 4 captures the control signal sent from the driver 3 to the common bus, An interface control circuit diagnostic method characterized in that the interface control circuit 1 is configured to be diagnosed.