JPH0571668B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Description of the Field to Which the Invention Pertains The present invention relates to an improvement in a parallel plate plasma etching apparatus for forming fine patterns of integrated circuits on a wafer.

(2) Description of the Prior Art In the manufacture of large-scale integrated circuits, it is necessary to form fine patterns on semiconductor wafers, and for this purpose dry etching equipment is used. Various types of dry etching equipment have been devised up to now, but in the manufacture of large-scale integrated circuits with a high degree of integration, parallel plate type dry etching equipment, which can form fine patterns with good reproducibility, is the mainstream. Further, this parallel plate type dry etching apparatus is classified into a cathode coupling type in which the wafer is placed on a high frequency applying electrode and an anode coupling type in which the wafer is placed on a ground electrode. The pattern processing characteristics of the anodic bonding method are almost the same as those of the cathode bonding method, but because no high frequency is applied to the electrode on which the wafer is placed, (1) the equipment configuration is greatly simplified, (2) the wafer It is widely used because it has advantages such as reducing plasma damage. However, it cannot be said that this parallel plate type plasma etching apparatus has higher processing capacity than conventional wet etching apparatuses or cylindrical plasma etching apparatuses that process a large number of wafers at once. . Therefore, it has become an important issue to provide a parallel plate type plasma etching apparatus that can perform high speed etching while maintaining the excellent microfabrication characteristics of the parallel plate type and has a high throughput. Furthermore, with the recent increase in the diameter of wafers, it is inevitable that parallel plate single-wafer processing type plasma etching apparatuses, which process wafers one by one with good controllability, will become even more popular. It is clear that high-speed etching technology is even more important in this single-wafer processing type apparatus than in the conventional batch type apparatus, which processes a plurality of wafers at once in order to increase processing capacity.

As mentioned above, high-speed etching technology will become even more important in the future, and one effective method for increasing the etching speed is the use of an electric field concentration ring. As explained below, this increases the etching rate by concentrating the generated plasma on the top of the wafer.

FIG. 1 is a sectional view of an example of a parallel plate type plasma etching apparatus using a conventional electric field concentration ring. As shown in the figure, inside the processing chamber 1 there is a high frequency application electrode 2 and a wafer mounting electrode 4 on which a wafer 3 is mounted.
are installed parallel to each other. After the processing chamber 1 is evacuated by the vacuum evacuation system 5, the reaction gas introduction system 6
A predetermined flow rate of the reaction gas is introduced, and the inside of the processing chamber 1 is maintained at a predetermined constant pressure by adjusting the exhaust capacity of the evacuation system 5. In this state, when high frequency power is applied from the high frequency power supply 7 to the high frequency application electrode 2, the reaction gas is turned into plasma and the etching process is performed.

In the figure, 8-a is a ring-shaped object made of an insulator, a semiconductor, or a conductor inside the insulator or covering the semiconductor, installed around the periphery of the wafer, and is usually called an electric field concentration ring. Since the electric field in the area where the electric field concentration ring 8 is placed on the mounting electrode 4 is suppressed, the plasma is concentrated on the wafer mounting area. Therefore, the plasma above the wafer 3 becomes locally dense, and as a result, the etching rate is increased.

However, in the conventional electric field concentration ring 8-a, since the electric field changes rapidly at the boundary between the wafer 3 and the electric field concentration ring 8-a, the etching rate at the outer periphery of the wafer is usually different from that at the center of the wafer. It was hot. This means that the uniformity of etching within the wafer deteriorates, and as a result, in the conventional parallel plate plasma etching apparatus using the electric field concentrating ring 8-a, semiconductor device defects often occur at the outer periphery of the wafer. There was a serious drawback that this occurred.

(3) Purpose of the Invention The present invention provides a parallel plate plasma etching apparatus which eliminates the above-mentioned drawbacks, precisely controls electric field concentration, maintains a high etching rate, and provides good etching uniformity within a wafer. The purpose is to

(4) Features of the Invention The feature of the present invention is to introduce a reactive gas between an electrode to which high-frequency power is applied and an opposing wafer mounting electrode, and to generate gas plasma between these two electrodes to etch the wafer. In a parallel plate plasma etching apparatus, a wafer mounting electrode is divided into a wafer mounting portion and an electric field concentration ring surrounding the wafer, and the electric field concentration ring is made of a conductor covered with an insulator, and the electric field concentration ring is made of a conductor covered with an insulator. This is a parallel plate type plasma etching apparatus in which a high frequency resonant circuit is connected between a part and a wafer mounting part.

(5) Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a drawing for explaining an embodiment of the present invention. The structure and operation of the entire device are the same as those described using FIG. 1. Reference numerals 1 to 7 in FIG. 2 are components having the same functions as the same reference numerals used in FIG. Also, 8- in Figure 2
b is an electric field concentration ring consisting of a conductor covered by an insulator. The insulator may be covered partially or over the entire surface of the ring as long as the electric field concentration ring 8-b and the substrate mounting electrode 4 are electrically insulated. The conductor portion of the electric field concentration ring 8-b is a high-frequency resonant circuit 9.
The other end of the high frequency resonant circuit 9 is grounded. Although Fig. 2 shows a high-frequency resonant circuit consisting of a series combination of a variable capacitor and a variable coil, other circuit configurations may be used as long as the impedance of the high-frequency resonant circuit is adjustable according to the applied high frequency. I don't mind. The circuit constants of the high-frequency resonant circuit suitable for the present invention vary depending on the shape and size of the electrode or the state of the plasma, but when the high-frequency power is 13.56 MHz and the electrode diameter is
When the distance is about several tens of centimeters, it is effective to use a combination of a variable capacitor of 0 to 500 picofarad, and a variable coil of 0 to 5 microhenries.

FIG. 3 is a diagram for explaining an example of the operation of the present invention. In FIG. 3, a broken line 10-1 indicates the inside of a wafer when a silicon oxide film formed on a 5-inch silicon wafer is etched using the parallel plate type plasma etching apparatus using the conventional electric field concentration ring described in FIG. This shows the distribution of etching rates. The etching rate at the periphery of the wafer is higher than the etching rate at the center, and in such a situation, device defects occur at the periphery of the wafer. In FIG. 3, reference numeral 10-2 is an example of the etching rate distribution obtained by appropriately adjusting the impedance of the high frequency resonant circuit using the apparatus according to the present invention. 10-1 and 1
It is clear from the comparison of 0-2 that the etching rate distribution has been significantly improved by the present invention.

(6) Explanation of Effects As explained above, according to the present invention, it is possible to obtain much better uniformity of the etching rate within the wafer than with the conventional electric field concentration ring.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of an example of a parallel plate plasma etching apparatus using a conventional electric field concentration ring, FIG. 2 is a diagram showing an embodiment of the present invention, and FIG. 3 is an effect of the embodiment of the present invention. FIG. In the figure, 1... processing chamber, 2... high frequency application electrode, 3... wafer, 4... wafer mounting electrode, 5... vacuum evacuation system, 6... reaction gas introduction system, 7... high frequency power supply , 8-a, 8-b... electric field concentration ring, 9... high frequency resonant circuit.

Claims (1)

[Scope of Claims] 1. A parallel plate plasma etching apparatus that etches a wafer by introducing a reactive gas between an electrode to which high-frequency power is applied and an opposing wafer mounting electrode to generate gas plasma between the two electrodes. The wafer mounting electrode is divided into a wafer mounting portion and an electric field concentration ring surrounding the wafer,
A parallel plate plasma etching apparatus characterized in that the electric field concentration ring is made of a conductor covered with an insulator, and a high frequency resonant circuit is connected between the conductor part and the wafer mounting part. . 2. The parallel plate plasma etching apparatus according to claim 1, wherein the high frequency resonant circuit is comprised of a variable capacitor and a variable coil.