JPH0574935B2 - - Google Patents
Info
- Publication number
- JPH0574935B2 JPH0574935B2 JP59214099A JP21409984A JPH0574935B2 JP H0574935 B2 JPH0574935 B2 JP H0574935B2 JP 59214099 A JP59214099 A JP 59214099A JP 21409984 A JP21409984 A JP 21409984A JP H0574935 B2 JPH0574935 B2 JP H0574935B2
- Authority
- JP
- Japan
- Prior art keywords
- molybdenum
- punching
- plate
- cracks
- hardness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
Landscapes
- Punching Or Piercing (AREA)
- Die Bonding (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はシリコン等の半導体材料を用いて構成
される半導体装置の支持用基板の製造方法に関
し、特に支持用基板として用いられるモリブデン
基板の製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a supporting substrate for a semiconductor device constructed using a semiconductor material such as silicon, and in particular to a method for manufacturing a molybdenum substrate used as a supporting substrate. Regarding the method.
〔従来技術〕
一般にダイオード及びサイリスタ等の半導体装
置は半導体ペレツトの互いに相対向する主面から
外部引出電極を取り出せる構成を備えている。一
方、半導体ペレツトは強度が低く、脆いため、使
用の際には金属基板によつて支持される。半導体
ペレツトを支持するための金属基板材料としては
熱膨張係数が半導体材料に近いモリブデンが用い
られている。[Prior Art] Semiconductor devices such as diodes and thyristors generally have a structure in which external lead electrodes can be taken out from the mutually opposing main surfaces of a semiconductor pellet. On the other hand, since semiconductor pellets have low strength and are brittle, they are supported by a metal substrate during use. Molybdenum, which has a coefficient of thermal expansion close to that of the semiconductor material, is used as the metal substrate material for supporting the semiconductor pellets.
半導体支持用基板として用いられるモリブデン
板は一般にモリブデン素材板から打ち抜き加工法
によつて製造させる。この種のモリブデン板は円
形または角型などの小片に成形されて市販され、
使用者においてこの小片上に必要に応じてろう材
などを被着して半導体ペレツトを搭載し、半導体
装置の組立てが行なわれる。 A molybdenum plate used as a semiconductor support substrate is generally manufactured from a molybdenum material plate by a punching process. This type of molybdenum plate is commercially available in the form of small circular or square pieces.
The user places a semiconductor pellet on the small piece by applying a brazing material or the like as necessary, and assembles a semiconductor device.
圧延加工が施されたモリブデン素材板はダイス
鋼又は超硬金型を用いて打ち抜き加工されて円形
あるいは角型などのモリブデン板小片に成形され
る。 The rolled molybdenum material plate is punched using a die steel or a carbide mold to form a circular or square molybdenum plate piece.
このようなモリブデン素材板は打ち抜き方向に
対して直角方向に延びる層状の繊維組織を備えて
いるため、打ち抜き加工の際、剥離が発生しやす
い。さらに、打ち抜き加工の際、層状組織の粒界
に沿つて割れが発生しやすく、重大な欠陥となつ
てしまう(ここでは、このような層状組織粒界に
沿つた割れをラミネーシヨンクラツクと呼ぶ)。
ラミネーシヨンクラツクが発生すると、半導体支
持用基板としての特性が著しく阻害される。従つ
て、従来はラミネーシヨンクラツクの混入を防止
するため弗酸、硝酸及び酢酸等の混酸を用いてモ
リブデン板をエツチングした後、拡大鏡によつて
検査をしていた。 Since such a molybdenum material plate has a layered fiber structure extending in a direction perpendicular to the punching direction, peeling is likely to occur during punching. Furthermore, during punching, cracks are likely to occur along the grain boundaries of the layered structure, resulting in serious defects (here, such cracks along the grain boundaries of the layered structure are referred to as lamination cracks). ).
When lamination cracks occur, the properties of the substrate as a semiconductor supporting substrate are significantly impaired. Therefore, conventionally, in order to prevent lamination cracks from being mixed in, a molybdenum plate was etched using a mixed acid such as hydrofluoric acid, nitric acid and acetic acid, and then inspected using a magnifying glass.
ところが、従来のようにエツチングを行つても
ラミネーシヨンクラツクが解消しない場合が多く
あり、半導体支持用基板としての特性を著しく損
ねていた。 However, even if conventional etching is performed, lamination cracks are often not eliminated, and the properties of the substrate as a semiconductor supporting substrate are significantly impaired.
本発明の目的はモリブデン素材板から半導体支
持用のモリブデン板を打ち抜き加工によつて製造
する場合において、ラミネーシヨンクラツクの発
生することのない製造方法を提供することであ
る。
An object of the present invention is to provide a method of manufacturing a molybdenum plate for supporting semiconductors by punching from a molybdenum material plate without producing lamination cracks.
本発明は、半導体材料を支持するために用いら
れるモリブデン基板の製造する方法に関し、圧延
加工が施さcビツカース硬度220乃至250の範囲の
モリブデン素材板をこのモリブデン素材板の板厚
に対して0.02乃至0.05のクリアランスを有する金
型を用いて打ち抜き加工するようにした半導体基
板用モリブデン板の製造方法又は圧延加工が施さ
れかつビツカース硬度が220乃至250の範囲を除く
モリブデン素材板をこのモリブデン素材板の板厚
に対して0.02乃至0.05のクリアランスを有する金
型を用いて、300℃を超える温度で打ち抜き加工
するようにした半導体用モリブデン板の製造方法
である。
The present invention relates to a method for manufacturing a molybdenum substrate used to support semiconductor materials, in which a molybdenum material plate is rolled and has a c-Vickers hardness of 220 to 250, with a thickness of 0.02 to 250. A method for manufacturing a molybdenum plate for semiconductor substrates in which the molybdenum plate for semiconductor substrates is punched using a mold having a clearance of 0.05, or a molybdenum plate that has been subjected to rolling processing and has a Vickers hardness of 220 to 250. This is a method for manufacturing a molybdenum plate for semiconductors, in which punching is performed at a temperature exceeding 300°C using a mold having a clearance of 0.02 to 0.05 with respect to the plate thickness.
以下本発明について第1図乃至第3図に示す実
施例によつて説明する。(本実施例においては圧
延加工が施されたモリブデン素材板を単にモリブ
デン素材板と呼ぶ)
実施例 1
まず、ビツカース硬度(Hv)がそれぞれ220〜
250、260以上、200以下でかつ板厚が1.0mmのモリ
ブデン素材板を準備した。これら3種のモリブデ
ン素材板をこのモリブデン素材板の板厚に対して
0.035mmのクリアランスを有する金型を用いて、
打ち抜き温度300〜800℃、打ち抜き速度80〜90
mm/秒で打ち抜き加工し、直径24mmの円板状のモ
リブデン基板をそれぞれ1000個づつ作製した(試
料1)。さらに上記と同様のビツカース硬度及び
板厚を有するモリブデン素材板を用いて上記の打
ち抜き加工の条件によつて各ビツカース硬度に対
してそれぞれ1000個づつのモリブデン基板の試料
2及び2を得た。
The present invention will be explained below with reference to embodiments shown in FIGS. 1 to 3. (In this example, the molybdenum material plate subjected to rolling processing is simply referred to as a molybdenum material plate.) Example 1 First, each material has a Bitkers hardness (Hv) of 220~
Molybdenum material plates with a size of 250, 260 or more, and 200 or less and a thickness of 1.0 mm were prepared. These three types of molybdenum material boards are compared to the thickness of this molybdenum material board.
Using a mold with a clearance of 0.035mm,
Punching temperature 300~800℃, punching speed 80~90
1000 disc-shaped molybdenum substrates each having a diameter of 24 mm were produced by punching at a speed of mm/sec (Sample 1). Further, using molybdenum material plates having the same Vickers hardness and thickness as above, 1000 molybdenum substrate samples 2 and 2 were obtained for each Vickers hardness under the above punching conditions.
これらの試料1〜3についてラミネーシヨンク
ラツクが発生しているかとうかについて調べ、各
試料についてのラミネーシヨンクラツクの発生率
を求めた。この結果を第1図に表わす。第1図に
示すように試料1〜2のついてはビツカース硬度
が220〜250のときにはラミネーシヨンクラツクの
発生率が皆無であり、試料3についてもビツカー
ス硬度が220〜250のときにはラミネーシヨンクラ
ツクの発生率は0.01%と極めて小さい。一方ビツ
カース硬度が200以下となるとビツカース硬度が
220〜250の場合と比べて、ラミネーシヨンクラツ
クの発生率がやや増加し、ビツカース硬度が260
以上となるとラミネーシヨンクラツクの発生率が
飛躍的に増大することがわかる。 These samples 1 to 3 were examined to determine whether or not lamination cracks had occurred, and the incidence of lamination cracks for each sample was determined. The results are shown in FIG. As shown in Fig. 1, when the Vickers hardness is 220-250 for samples 1 and 2, there is no occurrence of lamination cracks, and for sample 3, when the Vickers hardness is 220-250, no lamination cracks occur. The incidence is extremely small at 0.01%. On the other hand, when the Bitkers hardness becomes less than 200, the Bitkers hardness decreases.
Compared to 220-250, the incidence of lamination cracks slightly increased, and the Vickers hardness was 260.
It can be seen that the occurrence rate of lamination cracks increases dramatically when the temperature exceeds this level.
次に、ビツカース硬度がそれぞれ220〜250、
260以上、200以下でかつ板厚が0.5mmのモリブデ
ン素材板を準備した。これら3種のモリブデン素
材板をこのモリブデン素材板の板厚に対して0.02
mmのクリアランスを有する金型を用いて、打ち抜
き温度300〜700℃、打ち抜き速度84.7mm/秒で打
ち抜き加工し、直径13.5mmの円板状のモリブデン
基板をそれぞれ2000個づつ作製した(試料4)。
さらに同様にして上記各ビツカース硬度のモリブ
デン素材板を用いてそれぞれ3000個づつのモリブ
デン基板の試料5及び6を得た。 Next, the Bitkers hardness is 220 to 250, respectively.
A molybdenum material plate with a size of 260 or more and 200 or less and a thickness of 0.5 mm was prepared. These three types of molybdenum material boards are 0.02% of the thickness of this molybdenum material board.
Using a die with a clearance of mm, punching was performed at a punching temperature of 300 to 700°C and a punching speed of 84.7 mm/sec to produce 2000 disk-shaped molybdenum substrates each with a diameter of 13.5 mm (Sample 4). .
Furthermore, 3000 molybdenum substrate samples 5 and 6 were obtained in the same manner using molybdenum material plates having each of the above-mentioned Vickers hardnesses.
これらの試料4〜6についてラミネーシヨンク
ラツクが発生しているかどうかについて調べ、各
試料についてのラミネーシヨンクラツクの発生率
を求めた。その結果について第1図に示す。第1
図に示すように試料4〜6についてビツカース硬
度が220〜250のときにはラミネーシヨンクラツク
の発生率が皆無であることがわかる。 These samples 4 to 6 were examined to determine whether or not lamination cracks had occurred, and the incidence of lamination cracks for each sample was determined. The results are shown in Figure 1. 1st
As shown in the figure, when the Vickers hardness was 220 to 250 for Samples 4 to 6, there was no incidence of lamination cracks.
実施例 2
第2図を参照して打ち抜き加工の温度を種々変
化させた場合のラミネーシヨンクラツクの発生率
について説明する。Example 2 The incidence of lamination cracks when the punching temperature is varied will be explained with reference to FIG.
ビツカース硬度がそれぞれ220〜250、260以上、
200以下でかつ板厚が1.0mmのモリブデン素材板を
準備した。これら3種のモリブデン素材板をこれ
らモリブデン素材板の板厚に対して0.02mmのクリ
アランスを有する金型を用いて、打ち抜き温度を
300℃以下、300〜600℃、600〜800℃の3段階に
変化させて、打ち抜き速度84.7mm/秒で打ち抜き
加工し、直径24mmの円板状のモリブデン基板を各
打ち抜き温度に対してそれぞれ1000個づつ製作し
た。なお、第2図においてビツカース硬度200以
下のモリブデン板を試料7、ビツカース硬度260
以上のモリブデン板を試料8、ビツカース硬度
220〜250のモリブデン板を試料9とする。 Bitkers hardness is 220-250 and 260 or more, respectively.
A molybdenum material plate of 200 or less and a plate thickness of 1.0 mm was prepared. These three types of molybdenum material plates were punched using a die with a clearance of 0.02 mm to the thickness of these molybdenum material plates, and the temperature was controlled.
Punching was performed at a punching speed of 84.7 mm/sec at three stages of 300°C or lower, 300 to 600°C, and 600 to 800°C, and a disk-shaped molybdenum substrate with a diameter of 24 mm was punched at 1000°C for each punching temperature. Made individually. In addition, in Figure 2, sample 7 is a molybdenum plate with a Bitkers hardness of 200 or less, and Sample 7 is a molybdenum plate with a Bitkers hardness of 260.
The above molybdenum plate is sample 8, Bitkers hardness
Sample 9 is a molybdenum plate of 220 to 250.
第2図から明らかなように、試料9については
300℃以下、300〜600℃以下、600〜800℃のすべ
ての温度範囲について、ラミネーシヨンクラツク
の発生がみられなつた。また試料8については温
度範囲300℃以下でラミネーシヨンクラツクの発
生がみられたが、300〜600℃、600〜800℃の温度
範囲においてはラミネーシヨンクラツクの発生は
なかつた。試料7については打ち抜き温度300℃
以下でかなりのラミネーシヨンクラツクの発生が
みられたが、300〜600℃では急激に減少し、600
〜800℃ではまつたく発生しなかつた。 As is clear from Figure 2, for sample 9
No lamination cracks were observed in all temperature ranges of 300°C or lower, 300 to 600°C or lower, and 600 to 800°C. Regarding sample 8, lamination cracks were observed in the temperature range of 300°C or lower, but no lamination cracks occurred in the temperature ranges of 300 to 600°C and 600 to 800°C. For sample 7, the punching temperature was 300℃
Considerable occurrence of lamination cracks was observed below, but it decreased rapidly between 300 and 600℃, and
No flashes occurred at ~800°C.
実施例 3
ビツカース硬度が220〜250でかつ板厚が1.0mm
のモリブデン素材板を準備した。このモリブデン
素材板をそれぞれモリブデン素材板の板厚に対し
て0.02以下、0.02〜0.05及び0.06〜0.1のクリアラ
ンスを有する金型を用いて、打ち抜き温度を300
〜800℃、打ち抜き速度84.7mm/秒で打ち抜き加
工し、直径24mmの円板状のモリブデン基板を上記
各金型について10000個づつ製作した(試料10)。
さらに同様にして上記のビツカース硬度のモリブ
デン素材板を用いて各金型についてさらに10000
個づつのモリブデン基板を製作して試料11とし
た。Example 3 Bitkers hardness is 220-250 and plate thickness is 1.0mm
A molybdenum material board was prepared. This molybdenum material plate was punched at a temperature of 300°C using a mold having clearances of 0.02 or less, 0.02 to 0.05, and 0.06 to 0.1 relative to the thickness of the molybdenum material plate.
Punching was carried out at ~800°C and a punching speed of 84.7 mm/sec to produce 10,000 disc-shaped molybdenum substrates with a diameter of 24 mm for each of the above molds (Sample 10).
Further, in the same manner, using a molybdenum material plate with the above-mentioned Bitkers hardness, for each mold, an additional 10,000
Sample 11 was prepared by producing individual molybdenum substrates.
これらが試料10及び11についてラミネーシンヨ
ンクラツクが発生しているかどうかについて調
べ、各試料についてラミネーシヨンクラツクの発
生率を求めた。その結果について第3図に示す。
第3図から明らかなように0.02mm以下及び0.06〜
0.1mmのクリアランスを有する金型を用いて打ち
抜き加工した場合には極めてラミネーシヨンクラ
ツクの発生率が高い。一方0.02〜0.05mmのクリア
ランスを有する金型を用いた場合にはラミネーシ
ヨンクラツクの発生がまつたくみられなかつた。 Samples 10 and 11 were examined to see if lamination cracks were occurring, and the incidence of lamination cracks was determined for each sample. The results are shown in Figure 3.
As is clear from Figure 3, 0.02mm or less and 0.06~
When punching is performed using a die with a clearance of 0.1 mm, the incidence of lamination cracks is extremely high. On the other hand, when a mold having a clearance of 0.02 to 0.05 mm was used, no lamination cracks were observed.
さらにビツカース硬度が220〜250でかつ板厚が
0.5mmのモリブデン素材板を準備した。このモリ
ブデン素材板をモリブデン素材板の板厚に対して
それぞれ0.02以下、0.02〜0.06及び0.05〜0.1のク
リアランスを有する金型を用いて、打ち抜き温度
を300〜800℃、打ち抜き速度84.7mm/秒で打ち抜
き加工し、直径13.5mmの円板状のモリブデン基板
を上記各金型について10000個づつ製作した(試
料12)。さらに同様にして上記のビツカース硬度
のモリブデン素材板を用いて各金型についてさら
に10000個づつのモリブデン基板を製作して試料
13とした。 In addition, the Bitkers hardness is 220 to 250 and the plate thickness is
A 0.5 mm molybdenum material plate was prepared. This molybdenum material plate was punched using a mold having clearances of 0.02 or less, 0.02 to 0.06, and 0.05 to 0.1 with respect to the thickness of the molybdenum material plate, at a temperature of 300 to 800°C and a punching speed of 84.7 mm/sec. 10,000 disk-shaped molybdenum substrates with a diameter of 13.5 mm were produced by punching for each of the above molds (Sample 12). Furthermore, in the same manner, 10,000 molybdenum substrates were manufactured for each mold using the molybdenum material plates with the above-mentioned Bitkers hardness, and samples were prepared.
It was set at 13.
これら試料12及び13についてラミネーシヨンク
ラツクが発生しているかどうかについて調べ、各
試料についてラミネーシヨンクラツクの発生率を
求めた。その結果について第3図に示す。第3図
に示すように0.02mm以下及び0.06〜0.1mmのクリア
ランスを有する金型を用いて打ち抜き加工した場
合には極めてラミネーシヨンクラツクの発生率が
高い。一方0.02〜0.05mmのクリアランスを有する
金型を用いた場合にはラミネーシヨンクラツクの
発生がまつたくみられなかつた。 These samples 12 and 13 were examined to determine whether or not lamination cracks occurred, and the incidence of lamination cracks was determined for each sample. The results are shown in Figure 3. As shown in FIG. 3, when punching is performed using a die having a clearance of 0.02 mm or less or 0.06 to 0.1 mm, the incidence of lamination cracks is extremely high. On the other hand, when a mold having a clearance of 0.02 to 0.05 mm was used, no lamination cracks were observed.
上述した実施例1〜3によつて明らかなよう
に、ビツカース硬度が220〜250のモリブデン素材
板を打ち抜き加工してモリブデン基板を製作する
場合には、このモリブデン素材板の板厚に対して
0.02乃至0.05のクリアランスを有する金型を用い
て打ち抜き加工すればモリブデン基板にラミネー
シヨンクラツクが発生することはない。 As is clear from Examples 1 to 3 above, when manufacturing a molybdenum substrate by punching a molybdenum material plate with a Bitkers hardness of 220 to 250, the thickness of the molybdenum material plate is
If a die with a clearance of 0.02 to 0.05 is used for punching, lamination cracks will not occur in the molybdenum substrate.
また、220〜250の範囲外のビツカース硬度のモ
リブデン素材板を打ち抜き加工してモリブデン基
板を製作する場合には、このモリブデン素材板の
板厚に対して0.02乃至0.05のクリアランスを有す
る金型を用いて、300℃を超える温度下で打ち抜
き加工をすればラミネーシヨンクラツクが発生す
ることはほとんどない。 In addition, when manufacturing a molybdenum substrate by punching a molybdenum material plate with a Bitkers hardness outside the range of 220 to 250, a mold having a clearance of 0.02 to 0.05 with respect to the thickness of the molybdenum material plate is used. Therefore, if the punching process is performed at temperatures above 300°C, lamination cracks will hardly occur.
以上説明したように本発明によるモリブデン基
板の製造方法を用いればモリブデン板にラミネー
シヨンクラツクが発生することなく、製品の歩留
りが極めてよい。
As explained above, if the method for manufacturing a molybdenum substrate according to the present invention is used, lamination cracks will not occur in the molybdenum plate and the yield of the product will be extremely high.
第1図はビツカース硬度とラミネーシヨンクラ
ツクの発生率との関係を示す図、第2図は打ち抜
き温度とラミネーシヨンクラツクの発生率との関
係を示す図、第3図は打ち抜き加工に用いる金型
のクラアランスとラミネーシヨンクラツクの発生
率との関係を示す図である。
Figure 1 shows the relationship between Vickers hardness and the incidence of lamination cracks, Figure 2 shows the relationship between punching temperature and the incidence of lamination cracks, and Figure 3 shows the relationship between the punching temperature and the incidence of lamination cracks. FIG. 3 is a diagram showing the relationship between the mold clearance and the incidence of lamination cracks.
Claims (1)
ブデン基板を製造する方法において、圧延加工が
施されビツカース硬度220乃至250の範囲のモリブ
デン素材板を該モリブデン素材板の板厚に対して
0.02乃至0.05のクリアランスを有する金型を用い
て打ち抜き加工するようにしたことを特徴とする
半導体基板用モリブデン板の製造方法。 2 半導体材料を支持するために用いられるモリ
ブデン基板を製造する方法において、圧延加工が
施されビツカース硬度220乃至250の範囲を除くモ
リブデン素材板を該モリブデン素材板の板厚に対
して0.02乃至0.05のクリアランスを有する金型を
用いて、300℃を越える温度で打ち抜き加工する
ようにしたことを特徴とする半導体基板用モリブ
デン板の製造方法。[Claims] 1. In a method for manufacturing a molybdenum substrate used to support a semiconductor material, a molybdenum material plate that has been subjected to a rolling process and has a Vickers hardness in the range of 220 to 250 is used in accordance with the thickness of the molybdenum material plate. hand
1. A method for manufacturing a molybdenum plate for a semiconductor substrate, characterized in that punching is performed using a mold having a clearance of 0.02 to 0.05. 2. In a method for manufacturing a molybdenum substrate used to support a semiconductor material, a molybdenum material plate that has been subjected to rolling processing and has a Vickers hardness of 220 to 250 has a hardness of 0.02 to 0.05 relative to the thickness of the molybdenum material plate. A method for manufacturing a molybdenum plate for semiconductor substrates, characterized in that punching is performed at a temperature exceeding 300°C using a mold having a clearance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59214099A JPS6193633A (en) | 1984-10-15 | 1984-10-15 | Manufacture of molybdenum plate for semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59214099A JPS6193633A (en) | 1984-10-15 | 1984-10-15 | Manufacture of molybdenum plate for semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6193633A JPS6193633A (en) | 1986-05-12 |
| JPH0574935B2 true JPH0574935B2 (en) | 1993-10-19 |
Family
ID=16650205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59214099A Granted JPS6193633A (en) | 1984-10-15 | 1984-10-15 | Manufacture of molybdenum plate for semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6193633A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2567104Y2 (en) * | 1991-07-26 | 1998-03-30 | 京セラ株式会社 | Package for storing semiconductor elements |
-
1984
- 1984-10-15 JP JP59214099A patent/JPS6193633A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6193633A (en) | 1986-05-12 |
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