JPH0575121B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a reference voltage generation circuit, and particularly to a MOS
This invention relates to a reference voltage generation circuit that includes a mixture of transistors and bipolar transistors.

[Conventional technology]

In recent years, with the development of integration technology, advances have been made in miniaturization, reduction in chip area, and lower power consumption.The MOS process in particular has many of these advantages, so it is also becoming popular in the analog field.
Circuits composed of MOS transistors have come into use. In the MOS process, it is possible to parasitically create a bipolar transistor with the collector as the substrate, and bandgap reference voltage generation circuits using this bipolar transistor are often used. Conventionally, this type of reference voltage generating circuit has a circuit configuration as shown in FIG. Consisting of This reference voltage generation circuit consists of a bipolar transistor Q1, a bipolar transistor Q2 with an emitter size n times larger than Q1, three resistors R1, R2, and R3 (R ₂ = R ₃ ), a gate length L, and a gate width W. It consists of two MOS transistors M1 and M2 of the same size and one operational amplifier A1. MOS transistors M1 and M2 each constitute a constant current circuit. The base-emitter voltage of Q1 is V _BE1 , and the base-emitter voltage of Q2 is V BE1.
V _BE2 , and if bias voltage V _B is applied to Q1 and Q2, the voltage at output terminal OUT is V _OUT
is V _OUT =V _B −V _BE1 −R ₂ /R ₁ (V _BE1 −V _BE2 ) ……(1). Here, if V _B is fixed and the voltage is constant with respect to temperature, then by appropriately adjusting the ratio of R ₂ / R ₁ , it is possible to make V _OUT almost constant with respect to temperature. . Also, since the power supply voltage term is not included in the equation, it is relatively stable against power supply voltage fluctuations.

[Problem that the invention seeks to solve]

However, the conventional reference voltage generation circuit described above requires a fairly large layout area because it uses a resistor, which is a passive element. In particular, in order to increase the speed of integrated circuits, the sheet resistance of polysilicon and diffused resistors used as resistors is currently being reduced, and the disadvantage is that they require a large area to obtain the required resistance. It was hot. In order to further reduce power consumption, R1
~R3 must be made large, which has the disadvantage that the chip area increases in inverse proportion to the reduction in power.

[Means for solving problems]

The reference voltage generation circuit of the present invention consists of two bipolar transistors with different emitter sizes of 1:n, an operational amplifier and two MOS transistors for constant current circuits of the same size, and a gate of N
In the case of channel, it has a MOS transistor connected to the positive power supply side, and in the case of P channel, it has a MOS transistor connected to the negative power supply side,
It has the feature that the chip area can be made smaller because it does not include a resistor.

The reference voltage generating circuit of the present invention has a collector as a first
A first bipolar transistor is connected to the potential of the first bipolar transistor, and the collector and base of the first bipolar transistor are connected to the potential of the first bipolar transistor, and the collector is connected to the first potential of the first bipolar transistor. a second bipolar transistor having a substantially large emitter size; a first constant current circuit composed of a MOS transistor and having one end connected to the second potential; and a first constant current circuit composed of a MOS transistor and having one end connected to the second potential. The second constant current circuit and the MOS
a first MOS resistor composed of a transistor and connected between the emitter of the first bipolar transistor and the other end of the first constant current circuit; and a first MOS resistor composed of a MOS transistor and connected to the emitter of the second bipolar transistor. 2nd MOS with one end connected
The second transistor is composed of a resistor and a MOS transistor.
a third MOS resistor connected between the other end of the MOS resistor and the other end of the second constant current circuit;
The connection point between the MOS resistor and the first constant current circuit is the positive phase input, the connection point between the second MOS resistor and the third MOS resistor is the negative phase input, and the output is the first and second constant current circuit.
An operational amplifier is provided as a control input of the constant current circuit, and an output reference voltage is obtained from a connection point between the first constant current circuit and the first MOS resistor.

〔Example〕

Next, the present invention will be explained with reference to the drawings.
FIG. 1a is a circuit diagram showing an embodiment of the present invention. Two NPN bipolar transistors Q1 and Q2, whose bases are commonly connected and a bias voltage V _B is applied, have emitter sizes of Q1 and Q2 in a relationship of 1:n (n>1), and Q1 and Q
The collectors of Q1 and Q2 are connected in common and a positive power supply V _DD is applied, and the emitters of Q1 and Q2 are each N channel.
Connected to the drains of MOS transistors M5 and M4. The sources of M5 and M4 are connected to the drains of N-channel MOS transistors M1 and M3,
The source of M3 is connected to the drain of M2, and
1, the source of M2 is connected to the negative power supply (GND).
The sizes of M1 and M2 are the same. Operational amplifier A
The positive phase input of 1 is connected to the source of M5, the negative phase input is connected to the source of M4, and the operational amplifier output is connected to M1 and M2.
It returns to the part where the gates of the two are connected in common. M3,
The gates of M4 and M5 are all connected to the positive power supply _VDD . MOS transistors M1 and M2 each constitute a constant current circuit. M of M3, M4, M5
The gate length L ₁ and gate width W ₁ of 4 and M5 are the same,
Let the gate length of M3 be L ₂ and the gate width W ₂ .
The channel resistance R of a MOS transistor has a relationship between the gate length L and the gate width W as shown in the following equation.

R∝W/L...(2) The channel resistance R _A of M4 and M5 becomes R _A ∝W ₁ /L ₁ , and the channel resistance R _B of M3 becomes R _B ∝W ₂ /L ₂ .

Taking this channel resistance into consideration and calculating the voltage at the OUT terminal, we can substitute it into (1) and obtain the following relationship: V _OUT = V _B − V _BE1 − _{R A} /R _B ΔV _BE ……(3). In this circuit configuration, M3, M
The potential difference between the drain and source of transistors 4 and 5 remains almost constant even when the power supply voltage fluctuates. Therefore, the channel resistances R _A and R _B are also substantially constant against variations in the power supply voltage, etc., and a reference voltage generation circuit with a constant output voltage can be realized. In terms of chip area, in the configuration using the resistors shown in Figure 3, R2=R3
= 5kΩ, R1 = about 650Ω, the sheet resistance value is set to 30Ω, and the resistance width is adjusted to achieve accuracy.
When the resistance is 6 μm and the distance between the resistors is 3 μm on one side, the total area occupied by the resistors is approximately 25,600 μm ² .
On the other hand, when R2, R3, and R1 are replaced with MOS transistors M4, M5, and M3, respectively, the W/L of M4 and M5 is 30 μm/4 μm, and the W/L of M3 is
Almost the same characteristics can be obtained with 320 μm/4 μm, and the area at that time is about 7350 μm ² , which can be reduced to about one-fourth of the area when using a resistor. The power supply voltage fluctuation characteristics at this time are shown in FIG. 1b. The fluctuation is 1/50th of the fluctuation of the power supply voltage of 2V, making it stable.

FIG. 2 is a circuit diagram showing another embodiment of the present invention. When integrated into a circuit, if a P-type substrate is used, a PNP bipolar transistor with a common collector can be easily realized using a MOS process. Connect Q1 as a diode and connect the base of Q3 to the emitter of Q1. Q2 is a diode-connected bipolar transistor with the emitter size of Q1 multiplied by n (n>1), and Q4 is also a diode-connected bipolar transistor with the emitter size of Q1 multiplied by n.
Connect the emitter of Q2 and the base of Q1 with a doubled bipolar transistor. The positive phase input of operational amplifier A1 is connected to the emitter of Q3, and the negative phase input of operational amplifier A1 is connected to the drain of M3 whose source is connected to the emitter of Q3. By connecting bipolar transistors in series like Q1 and Q3, the voltages of the positive-phase and negative-phase inputs of the operational amplifier can be set high, increasing the gain of the operational amplifier itself and making it possible to operate more stably. P channel MOS transistors M1, M2, M6, M7 are for constant current driving of bipolar transistors Q1, Q2, Q3, Q4, and P channel MOS transistors M8, M9,
M10, M11, M12, M13 and N channel
The MOS transistor M14 is a start-up circuit when the power is turned on. M3 and M4,
M5 is the channel resistance of the P channel MOS transistor, and is the ratio of the channel resistances of M3 and M4.
The voltage of the output terminal from the source side of 5 can be set. The transistor sizes of M4 and M5 are the same, the sizes of M1, M2, M6, and M7 are the same, the base-emitter voltage of Q1 and Q3 is set to V _BE1 , and the base-emitter voltage of Q2 and Q4 is set to V _BE2.
Then, V _OUT = 2 (V _BE1 + R _B / R _A ΔV _BE ) ...(4) Here, ΔV _BE = V _BE1 - V _BE2 R _A : Channel resistance of M3 R _B : Channel resistance of M4 Band gap standard A voltage generation circuit can be configured. If M3, M4, and M5 are resistors that are ordinary passive elements, the total resistance is approximately
The resistance is approximately 47.2kΩ, which requires a huge area.
If we calculate a resistance of 42.7kΩ with a sheet resistance of 30Ω, a resistance width of 6μm, and a resistance interval of 3μm, it will be approximately 320μm□. On the other hand, if the channel resistance of MOS transistors M3, M4, and M5 is used, W/L-
60μm/4μm, M4=M5 W/L=10μm/5μm
This can be achieved with a thickness of approximately 45 μm□, which means that the area will be approximately 1/7th of the original area.

〔Effect of the invention〕

As explained above, the present invention provides M3, M4, M
By utilizing the channel resistance of the MOS transistor No. 5, the chip area of the reference voltage generating circuit section can be reduced, and the larger the resistance value is used, the more effective the chip area can be reduced.

[Brief explanation of the drawing]

FIG. 1a is a circuit diagram showing one embodiment of the present invention, FIG. 1b is a characteristic diagram of the power supply voltage of FIG. 1a, FIG. 2 is a circuit diagram showing another embodiment of the present invention, and FIG. The figure is a circuit diagram showing a conventionally used reference voltage generation circuit. Q1, Q3...Bipolar transistor, Q
2, Q4... Emitter size n of Q1 and Q3
double (n>1) bipolar transistor, M3,
M4, M5...MOS transistor, M1, M2,
M6 to M14...MOS transistor, A1...
Operational amplifier, V _DD ...power supply voltage, OUT...output terminal.

Claims (1)

[Claims] 1 a first bipolar transistor whose collector is connected to a first potential; a second bipolar transistor having an emitter size substantially larger than an emitter size of the transistor;
a first constant current circuit made up of MOS transistors and having one end connected to the second potential; and a second constant current circuit made up of MOS transistors and having one end connected to the second potential.
a constant current circuit, and a first constant current circuit configured of MOS transistors and connected between the emitter of the first bipolar transistor and the other end of the first constant current circuit.
a second MOS resistor composed of a MOS transistor and having one end connected to the emitter of the second bipolar transistor; A third terminal connected between the other end of the current circuit
The connection point between the MOS resistor and the first MOS resistor and the first constant current circuit is a positive phase input, and the second
an operational amplifier that uses a connection point between the MOS resistor and the third MOS resistor as an inverse phase input and outputs as control inputs of the first and second constant current circuits; A reference voltage generation circuit characterized in that an output reference voltage is obtained from a connection point with a MOS resistor.