JPH0578196B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a method of manufacturing a light emitting element used as a light source for optical communication.

[Prior art and its problems] Many double heterojunction light emitting devices using GaAs and GaAlAs have been announced so far. Among these, there has recently been a strong demand for the development of a light source that is close to a point light source and can obtain high brightness by narrowing down the current path flowing in the light emitting element and increasing the current density. For example the magazine IEEE Transactions
on Components Hybrid And Manufacturing
Technology, VOL CHMT-3 NO4 Dec,
In 1980, a light emitting device with the structure shown in Figure 1 was announced. However, the manufacturing methods of these cutting-edge technologies are often kept as trade secrets.
Generally, it is not made public. FIG. 1 shows the structure of the light emitting device shown in the magazine.
In Figure 1, n-type GaAs is placed on p-type GaAs substrate 1.
A layer 2 is grown, a hole 3 is provided in this n-type GaAs layer, and a p-type GaAlAs cladding layer 4, a p-type GaAlAs active layer 5, an n-type GaAlAs
A cladding layer 6 and an n-type GaAs cap layer 7 are provided. A silicon nitride film 8 is provided on the light extraction window, and ohmic electrodes 9 and 10 are provided on the main surface and the back surface. In the manufacturing method in this case, the following problem has been a conventional problem. First, the hole 3 provided in the n-type GaAs layer 2
The holes are filled in by the layers of crystal growth that occur later, making it impossible to confirm the position of the hole from the main surface side. Therefore, it becomes impossible to align the light extraction window of the ohmic electrode 9 provided on the main surface with the upper part of the hole 3.
It was extremely difficult to manufacture the light emitting device shown in FIG.

[Purpose of the invention]

An object of the present invention is to provide a method for manufacturing a light-emitting element that allows easy alignment of an ohmic electrode and a hole provided in a crystal layer for current confinement formed within the light-emitting element.

[Summary of the invention]

This invention includes a step of forming an opposite conductivity type crystal layer on a one conductivity type crystal substrate, a step of selectively providing a plurality of holes in the opposite conductivity type crystal layer, and a step of forming a plurality of holes on the opposite conductivity type crystal layer in the hole portions and on the opposite conductivity type crystal layer. A step of growing p-type and n-type crystal layers to form a double hetero type p, n junction that contributes to light emission, and etching away a part of the p-type crystal layer and n-type crystal growth layer to fill the hole. an exposing process;
forming a first ohmic electrode on the back surface of the one conductivity type crystal substrate; forming a second ohmic electrode on the surface of the p-type or n-type crystal growth layer and in the exposed hole; The present invention provides a method for manufacturing a light emitting element, comprising the step of patterning a second ohmic electrode in alignment with the concave pattern formed by the method.

〔Effect of the invention〕

By exposing the current constriction hole as in the present invention described above, it becomes possible to align the hole and the electrode on the main surface, improving productivity.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to FIGS. 2a to 2f. FIG. 2 is a cross-sectional view of a semiconductor wafer for explaining the manufacturing process. One semiconductor wafer has a circular shape with a diameter of about 5 cm, and about 10,000 light emitting elements can be obtained from this one semiconductor wafer. First, in FIG. 2a, a p-type GaAs substrate wafer 21 is prepared, and an n-type GaAs crystal layer 22 is grown to a thickness of about 5 μm on its main surface. The growth method is liquid phase epitaxial growth, in which a Ga solution containing Te and GaAs is slowly cooled at a temperature of about 850°C while in contact with a p-type GaAs substrate. Next, in b,
A hole 23 is formed in the n-type GaAs growth layer 22. The hole is formed by forming a pattern using the photoengraving process (PEP), which is common in semiconductor manufacturing processes, and then selectively etching the n-type GaAs growth layer with a solution consisting of phosphoric acid, hydrogen peroxide, and methyl alcohol. do. Then in c, b
A p-type GaAlAs cladding layer 24, a p-type GaAlAs active layer 25, an n-type
A GaAlAs cladding layer 26 is formed using a liquid phase epitaxial crystal growth method. For the growth solution, use a Ga solution containing GaAs and Al. For example, if you want to make p-type, use Ge,
When making Zn or n-type, for example, Si, Te, etc. may be added to the Ga solution. The crystal growth temperature is between 850° C. and 800° C., and the operation of slowly cooling the solution while keeping it in contact with the substrate b may be repeated for each growth layer. The p-type GaAlAs active layer 25 grown here has a lower Al concentration than the cladding layer, and becomes a light-emitting layer with high luminous efficiency. Also, the thickness of each grown layer is several micrometers. Next, in step d, the growth layer containing Al is etched away from at least two locations on the edge of the wafer, so that the hole 23 can be seen from the main surface side of the wafer. To remove etching, resin is applied to most of the main surface of the wafer, excluding the edges, and treated with a special solution that etches only the GaAlAs mixed crystal. The etching solution used is first treated with a solution consisting of H ₂ SO ₄ , H ₂ O ₂ and H ₂ O, and then with an aqueous solution containing I ₂ and KI. After the etching process, the holes 23 can be seen from the main surface side of the wafer. Next, in e, an ohmic electrode 27 is placed on the main surface of the wafer,
An ohmic electrode 28 is formed on the back surface. The electrodes are coated with an Au-Zn alloy on the main surface and an AuGe alloy on the back surface using a vacuum evaporation method. Next, in f, the aforementioned PEP
Pattern matching is performed so that at least two portions of the hole portion 23 can be etched away in the process. Hole 23 in the center of the wafer that cannot be seen from the main surface side of the wafer due to this pattern matching process.
1 and the window 29 of the electrode on the main surface of the wafer can be aligned. At this time, it is necessary that the holes 23 and 231 and the electrode windows 29 are arranged at the same pitch. After pattern matching, the hole 231 is substantially
Selective etching is performed so that the window 29 is placed on top to form an ohmic electrode pattern on the main surface of the wafer. Next, the wafer f is subjected to heat treatment at 500° C. for 10 minutes, and then the wafer is cut to complete a light emitting device. FIG. 3 shows a perspective sectional view of the completed light emitting device. FIG. 3 shows a pattern in which the size of the ohmic electrode 31 on the main surface side is smaller than the size of the element, which has the effect of eliminating leakage current on the side surface of the element. By applying a voltage of approximately 2V between the ohmic electrodes 31 and 32 of the light emitting device shown in FIG. Extremely strong light emission is obtained at the center, and sharp light similar to a point light source is emitted from the window 34 of the electrode. Therefore, if the window is coupled to an optical fiber (not shown), the light emitting element becomes suitable as a light source for optical communications.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view for explaining a conventional light-emitting device, FIG. 2 a to f is a cross-sectional view of a wafer for explaining the manufacturing method of the light-emitting device of the present invention, and FIG. FIG. 1, 21; substrate, 2, 22; current confinement layer,
3, 23, 231; hole, 4, 24, 6, 26;
Cladding layer, 5, 25, 33; active layer, 9, 1
0, 27, 28, 31, 32; ohmic electrode, 2
9,34; Light extraction window.

Claims (1)

[Claims] 1. A step of forming a crystal layer of opposite conductivity type on a crystal substrate of one conductivity type; a step of selectively providing a plurality of holes in the crystal layer of opposite conductivity type; A step of growing p-type and n-type crystal layers on the crystal layer to form a double hetero type p, n junction that contributes to light emission, and etching away a part of the p-type and n-type crystal growth layers to perform the above-mentioned step. a step of exposing the hole; a step of forming a first ohmic electrode on the back surface of the one conductivity type crystal substrate; and a step of forming a second ohmic electrode on the surface of the p-type or n-type crystal growth layer and in the exposed hole. A method for manufacturing a light emitting device, comprising the steps of: forming a second ohmic electrode, and patterning a second ohmic electrode in alignment with the concave pattern formed by the hole.