JPH0580856B2 - - Google Patents

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a modulation system that uses the amplitude and phase of a carrier wave as information, and in which the waveform of a communication signal is deformed in advance in order to compensate for the nonlinearity of an amplifier. Regarding equipment.

(Prior Art) In recent years, as radio wave resources are running out, channels in wireless communications are becoming narrower in order to make more effective use of frequencies. If the channel band becomes narrower, a linear modulation method is preferable to a nonlinear modulation method such as FM, which has a wider band. This applies regardless of digital transmission or analog transmission. In the linear modulation method, problems arise such as deterioration of the transmission spectrum and deterioration of reception characteristics due to nonlinearity of the amplifier.

As shown in FIG. 10, the input/output nonlinear characteristics of a normal amplifier include a saturation characteristic of the output amplitude called AM-AM conversion, and a change in the output phase depending on the input amplitude called AM-PM conversion. At a point where the input amplitude is sufficiently small from the saturation point, the amplitude characteristic is linear and there is no change in phase. However, as the input amplitude approaches the saturation point, the output amplitude saturates and the output phase begins to rotate. As a result, the transmission spectrum deteriorates and the reception characteristics deteriorate.

FIGS. 7a to 7d show the influence of such a nonlinear amplifier on a signal using 16-value QAM as an example. FIG. 7a shows the signal point distribution in the phase plane of the transmission signal as it should be, and FIG. 7b shows the transmission stent distribution at that time. FIG. 7c shows the distribution of signal points in the phase plane of the amplifier output when the operating point is near the saturation level. The signal point in FIG. 7c is distorted compared to the signal point in FIG. 7a. In the transmission spectrum at this time, as shown in FIG. 7d, odd-numbered intermodulation components such as 3rd and 5th order appear, causing interference with adjacent channels. Also, since the receiver judges that the signal point shown in Figure 7a has been sent, if the signal point shown in Figure 7c is sent,
Errors occur due to small noises, and reception characteristics deteriorate.

In order to prevent deterioration of transmission spectral characteristics and reception characteristics, it is necessary to compensate for such nonlinearity of the amplifier.

Conventionally, there is a method for digital transmission that compensates for such nonlinearity and also compensates for temporal changes in amplifier characteristics, as disclosed in Japanese Patent Publication No. 105658. FIG. 6 is a block diagram of a conventional modulation device with an adaptive linearization circuit. Transmission data sequences are input in parallel from the input terminal 600. Diagonal lines on the connections in FIG. 6 indicate multiple connections. The transmission data series is stored in a first memory, a random access memory 610 {RAM (Random Access Memory)}.
and read-only memory, which is the second memory.
Memory 620 {ROM (Read Only Memory)}
address. The ROM 620 stores the original signal point arrangement as shown in FIG. ing. RAM610
The output of
35 is band-limited and the modulator 640 is the oscillator 651.
The output is orthogonally modulated and output from terminal 601 to the nonlinear amplifier. To adaptively change the contents of RAM 610, the output of the nonlinear amplifier is connected to terminal 610.
2 and is demodulated by the demodulator 660 using the output of the oscillator 651. The signal demodulated by demodulator 660 is converted into a complex digital signal by analog-to-digital converter 670. This demodulated complex digital signal is subtracted from the original signal read from the ROM 620 in a subtraction circuit 680, and the result is multiplied by a constant coefficient k in a correction amount generation circuit 690 (generally, k is a value sufficiently smaller than 1). ), and is added to the output read from the RAM 610 by an adder circuit 691. If the demodulated value is
When the demodulated value is smaller than the value that should originally come from the ROM 620, the content of the RAM 610 is controlled to be smaller, and when the demodulated value is smaller than the value that should originally come from the ROM 620, the content of the RAM 610 is limited to be made larger. . By doing this, even if the input/output characteristics of the nonlinear amplifier change, the output of the nonlinear amplifier, that is, the terminal 60
The contents of the RAM 610 can be controlled so that the input signal from the RAM 610 has the correct signal point arrangement as shown in FIG. 7a.

(Problems to be Solved by the Invention) However, although such conventional systems can prevent deterioration of reception characteristics, they cannot prevent deterioration of transmission spectrum.

For example, if a band-limited 4-level signal is shown as a solid line in FIG. 8a, when it is distorted by an amplifier, it becomes as shown in a broken line in FIG. 8a. Such trajectory changes lead to spectrum deterioration. The RAM 610 only outputs signal points at each symbol point, and the output of the filter 635 is as shown in FIG. 8b. If distortion is further added to this, the result will become as shown by the solid line in FIG. 8c. However, since it does not match the dashed line in FIG. 8e, which is the original signal trajectory, the transmission spectrum is not sufficiently improved. This is because the linearization circuit shown in FIG. 6 only compensates for the linearity at the symbol point and does not compensate for the intermediate trajectory.

Furthermore, if the configuration shown in FIG. 6 is used, it can only be applied to digital signal transmission.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a modulation device that can overcome such drawbacks and compensate for the nonlinearity of the amplifier so that the transmission spectrum does not deteriorate due to the nonlinearity of the amplifier.

(Means for Solving the Problem) In order to solve the above-mentioned problem, a modulation device provided by the first invention of the present application is provided with a readout address by a sample value signal series, and the sample value signal series is transmitted to an amplifier. a rewritable memory that outputs a sample value sequence of a complex signal that has been predistorted to compensate for the nonlinearity of the memory; a quadrature modulator that generates a signal modulated by the output of the memory and outputs it to the amplifier; an orthogonal demodulator that receives a part of the output of the amplifier and demodulates it into a complex signal; a subtraction circuit that subtracts the output of this orthogonal demodulator from the sample value signal series; and a subtraction circuit that receives the output of this subtraction circuit and demodulates it into a complex signal. It consists of a correction amount generation circuit that calculates the amount of distortion correction; and an addition circuit that adds the output of the memory and the output of the correction amount generation circuit; It is characterized by being rewritten.

In addition, in order to solve the above-mentioned problems, the second part of the present application
The invention provides a modulation device comprising: a rewritable memory that is given a read address by a sample value signal sequence and outputs a complex representation of distortion that compensates for the nonlinearity of an amplifier; the output of this memory and the sample value signal; a first addition circuit that adds the series; a quadrature modulator that generates a signal modulated by the output of the first addition thickness circuit and outputs it to the amplifier; and a quadrature modulator that demodulates a part of the output of the amplifier. an orthogonal demodulator that obtains and outputs a complex signal; a subtraction circuit that subtracts the output of the orthogonal demodulator from the sample value signal series; and a correction amount used to correct the contents of the memory upon receiving the output of the subtraction circuit. a second addition circuit that adds the output of the memory and the output of the correction amount generation circuit; the contents of the memory are calculated by the output of the second addition circuit; It is characterized by adaptive rewriting.

In addition, in order to solve the above-mentioned problem, a modulation device provided by a third invention of the present application includes an amplitude calculation circuit that is given a read address by a sample value signal series and calculates the amplitude of the sample value signal series; a rewritable memory that receives the output of the amplitude calculation circuit and outputs a complex expressed distortion for compensating for the nonlinearity of the amplifier; a signal generation circuit that outputs a pre-distorted signal to compensate for; a quadrature modulator that generates a signal modulated by the output of this signal generation circuit and outputs it to the amplifier; an orthogonal demodulator that demodulates to obtain and output a complex signal; an error detection circuit that detects a signal error that is the difference between the output of this orthogonal demodulator and the sample value signal series; and a correction signal generation circuit that receives the output of the memory and generates a correction signal for rewriting the contents of the memory; the contents of the memory are adaptively rewritten by the output of the correction signal generation circuit. It is characterized by

(Principle of the Invention) Generally, a modulated band signal s(t) is expressed as follows, where f _c is the carrier frequency, s(t)=Re{(a(t)+jb(t))exp(j2πf _c t)}... (1
) can be written. Here a(t)+jb(t) is an equivalent baseband signal. An amplifier with input/output nonlinear characteristics is
(t) passes, the output s′(t) is s′(t)=Re{F[a(t)+jb(t)]exp(j2πf _c t)}…
…(2) becomes. Here, F[a(t)+jb(t)] is a function having input/output amplitude phase characteristics as shown in FIG. Therefore, when the circuit output that realizes the function G(x) that is F(G[a(t)+jb(t)])a(t)+jb(t)...(3) is passed through an amplifier, the amplifier output is A transmission signal that is not subject to distortion can be obtained.

The present invention calculates (3) by taking a(t)+jb(t) in equation (1).
Pass it through a digital circuit that realizes the function G(x) in the equation, and use the nonlinear amplifier output as Re{(a(t)+jb(t))
This is a modulation device that obtains ej2πf _ct , and also has the function of changing the shape of the function G(x) in response to temporal changes in amplifier characteristics.

Therefore, the signal input to the modulation device according to the present invention is an information signal to be transmitted (for example, an audio signal, an N-value digital signal, etc.), and a complex equivalent baseband signal a(t)+jb( determined by the modulation method). The signal is a finely sampled signal of t). For example, an audio signal
When sending by SSB, a(t) is a voice signal as it is, and b(t) is a signal obtained by Hilbert transforming a(t). Furthermore, the shorter the sampling period of a(t)+jb(t), the higher the linearity of the amplifier output. For example, when sampling is performed at a frequency that is four times higher than the signal band, third-order distortion components are sufficiently equalized, and when sampling is performed at a frequency that is six times or higher than the signal band, up to fifth-order distortion components are sufficiently equalized.

(Summary of the Invention) The first invention of the present application is based on G(a) from a(t)+jb(t).
(t)+jb(t)), and then directly convert the input signal a(t)+jb(t) to G(a(t)+jb(t)).
This is a method that outputs . Further, adaptive control of the functional form is performed by rewriting the conversion table.

The second invention of the present application is based on the input signal a(t)+jb
Obtain the value of G(a(t)+jb(t))−(a(t)+jb(t)) from (t),
This method outputs G(a(t)+jb(t)) by adding it to the input signal. The adaptive control of the functional form is a(t)
From +jb(t), [G(a(t)+jb(t))−(a(t)+jb(t)
)]
This is done by rewriting the conversion table.

The third aspect of the present invention utilizes the property of nonlinear characteristics that distortion is determined by amplitude. In response to the amplitude of the input signal, G(a(t)+jb(t))/[a(t)
+jb(t)] and obtains G(a(t)+jb(t)), which is a complex product of this and the input signal.
If a signal is expressed in polar coordinates, G(a(t)
+jb(t)) is obtained. However, regarding the change in the amplitude component, a similar change result can be obtained by addition. Functional adaptive control is performed by rewriting a conversion table that outputs a signal correction component in accordance with the input amplitude.

(Examples) Next, examples of each invention of the present application will be given to explain these inventions in more detail.

First, an embodiment of the first invention will be described with reference to FIG. Input terminals 101 and 102
Signals 111-I and 111-Q input from
represent the real part and false part of a signal sequence obtained by sample-quantizing a complex signal. In FIG. 9, an example of an input signal is shown by a solid line. Signals 111-I and 111-Q
Rewritable memory (RAM) 12
121-I and 121 0 represent the complex signal with distortion added to compensate for the nonlinearity of the amplifier.
- Output Q. In FIG. 9, an example of the signal 111-I is shown by a solid line, and an example of the signal 121-I is shown by a broken line. signal 1
21-I and 121-Q are each converted into an analog signal by a digital-to-analog (DA) converter 130. The quadrature modulator 140 receives the output of the DA converter 130 and modulates the output with an oscillator 141. The modulated signal is input from an output terminal 104 to an amplifier (not shown). A part of the amplifier output is input from the input terminal 103, and the quadrature demodulator 145 generates complex baseband signals 149-I, 149.
−Q. Signals 149-I and 149
-Q is analog-to-digital (AD) converter 1
The samples are quantized at 50. Subtraction circuit 1
60, the signal 111- which is the signal that should originally be transmitted
I, 111-Q to AD converter output 151-I,
151-Q are subtracted from each other. RAM120
signals 111-I, 111-Q to 121
If the conversion to -I, 121-Q is done correctly to compensate for the nonlinearity of the amplifier, the output of subtraction circuit 160 will be zero. When this output is not 0, the output of the subtraction circuit 160 is multiplied by p in the correction amount generation circuit 170 (p is a constant less than or equal to 1).
In the adder circuit 180, the output of the RAM 120 and the output of the correction amount generating circuit are added, and signals 171-I, 171
-Output Q. Signals 171-I, 171-Q are
Input to RAM120 and rewrite the contents of RAM.

In the explanation so far, the subtraction circuit 160 converts the signals 111-I, 111-Q to the signals 151-I, 151-I,
Although the values obtained by subtracting 151-Q are output, values with the opposite sign may be output.
In that case, the addition circuit 180 becomes a subtraction circuit,
A value obtained by subtracting the output of the correction amount generation circuit 170 from the output of the RAM 120 is output.

FIG. 2 is a block diagram showing an embodiment of the second invention of the present application. The structure of the part surrounded by the broken line is different between FIG. 2 and FIG. 1. A rewritable memory (RAM) 210 stores distortion components added to compensate for nonlinearity, and the first adder 2
At 20, input sample value signal sequence and RAM2
10 outputs, the signal 121-
A signal corresponding to I, 121-Q is obtained.
As a method of controlling the contents of the RAM 210, the output of the RAM 210 and the output of the correction amount generating circuit 170 are added to the second adder circuit 2 as in the embodiment of the first invention.
Add by 30. By writing the addition result to the RAM 210, the compensation distortion amount of the RAM 210 can be adaptively controlled.

As described in the first embodiment of the invention (FIG. 1), in the subtraction circuit 160, the signals 111-I, 11
Although it is assumed that the values obtained by subtracting the signals 151-I and 151-Q from 1-Q are output, the opposite values may be output. In that case, the second adder circuit 2
30 is a subtraction circuit that outputs a value obtained by subtracting the output of the correction amount generation circuit 170 from the output of the RAM 210. With the configuration shown in FIG. 2, since the distortion signal level is smaller than the transmission signal level, the number of quantization levels of the distortion signal can be reduced, and the RAM capacity can be reduced.

FIG. 3 is a block diagram showing an embodiment of the third invention of the present application. In the amplitude calculation circuit 310, the input complex sample value signal series 111-I,
A memory that can calculate the amplitude of 111-Q and rewrite the calculated quantized amplitude value as an address.
(RAM) 320 outputs complex-expressed distortions 321 and 322 for nonlinear compensation. signal 321,
322 and 111-I, 111-Q,
The signal generation circuit 330 generates signals 121-I and 121-Q with nonlinear distortion compensated for. signal 12
1-I and 121-Q become analog signals in the DA converter 130, and are modulated in the quadrature modulator 140.
The output terminal 104 inputs the signal to a nonlinear amplifier (not shown). A part of the nonlinear amplifier is a quadrature modulator 1
45, and the demodulated signal is sent to AD converter 1.
Sampled at 50. AD converter 150 output 1
51-I, 151-Q are input signals 111-I,
It is input to the error detection circuit 340 together with 111-Q. The error detection circuit 340 output is input to the correction signal generation circuit 350 together with the RAM 320 outputs 321 and 322. Correction signal generation circuit 35
The zero output adaptively controls the contents of RAM 320.

FIGS. 4a and 4b show a concrete example of the signal generation circuit 330 in block diagram form.

In FIG. 4a, outputs 321 and 32 of RAM 320 are shown.
An example is shown in which 2 is expressed in orthogonal coordinates. Input signals 111-I, 111-Q and RAM 320
Signals 121-I and 121-Q are obtained by complex multiplication of outputs 321 and 322 by multiplier 410.

FIG. 4b shows the outputs 321, 3 of the RAM 320.
An example is shown in which 22 is expressed in polar coordinates. The coordinate conversion circuit 420 converts the input signals 111-I and 111-Q into a signal 421- representing the amplitude of the input signals.
γ and a signal 421-θ representing the phase. Here, signal 321 is the amplitude of the distortion component, signal 3
If 22 represents the phase of the distortion component, then in the adder circuit 430, the signal 321 and the signal 421-
By adding γ, the amplitude component of the signal with nonlinearity compensated for can be found. In addition, the signal 322 and the signal 421-
By adding θ in an adder circuit 435, the phase component of the signal with nonlinearity compensated for is determined. Therefore, signals 121-I and 121-Q are obtained by converting the outputs of addition circuits 430 and 435 into signals expressed in orthogonal coordinates in coordinate conversion circuit 425. However, the addition circuit 430 may be a multiplication circuit.

Specific examples of the signal generation circuit 330 are shown above in FIGS. 4a and 4b. In FIG. 4a, the input terminal 40
If a coordinate conversion circuit from polar coordinate representation to rectangular coordinate representation is provided before 3,404, the signal generation circuit shown in FIG. 4a can be used even if the RAM 320 outputs a distortion signal expressed in polar coordinates. Similarly, input terminals 403, 4
If a coordinate conversion circuit from a signal expressed in orthogonal coordinates to a polar coordinate expression is provided before 04, even if the RAM 320 outputs a distortion signal expressed in orthogonal coordinates, the signal shown in FIG.
signal generation circuits can be used.

5a and 5b show a specific example of the error detection circuit 340 in FIG. 3, and FIGS. 5c and d show a specific example of the correction signal generation circuit 350. FIG. 5a shows an example in which distortion for compensation is stored in the RAM 320 in the form of rectangular coordinates. Division circuit 5
10, AD converter 150 output 151-I,
151-Q, input signals 111-I, 111-Q
Performs division of prime numbers by. Subtraction circuit 515
The result of subtracting (1, 0) from the output of the division circuit 510 is the error. The correction signal generation circuit 350 in this case is configured as shown in FIG. 5c. The output from the subtraction circuit 515 is input from input terminals 503 and 504, and the correction signal generation circuit 560 outputs p (p is 1
constant below) is multiplied. RAM320 output 32
A subtraction circuit 570 subtracts the output of the correction signal generation circuit 560 from 1,322. Save the subtraction result to RAM3
Adaptive control is performed by writing to 20. Note that the input signal 11 in the division circuit 510
When outputting the result of dividing 1-I, 111-Q by 151-I, 151-Q, the configuration of the correction signal generation circuit 350 is as shown in FIG.
Addition circuit 580 replaces subtraction circuit 570 in Figure c.
is used.

FIG. 5b shows an example in which compensation distortion is stored in the RAM 320 in polar coordinate representation. Input signals 111-I, 111-Q are input to coordinate conversion circuit 5
Signals 521-r, 521 expressed in polar coordinates at 20
-θ is converted. Also, AD converter output 151
-I and 151-Q are also converted by the coordinate conversion circuit 540 into signals 541-r and 541-θ expressed in polar coordinates. 54 from 521-r in the subtraction circuit 530
1-r is subtracted, and the subtraction circuit 535 calculates 521-r.
Subtract 541-θ from. The result of the subtraction becomes the error to be detected. The correction signal generation circuit in this case may have the configuration shown in FIG. 5c. In addition, in the subtraction circuits 530 and 535, 521 from 541-r
When subtracting -r and subtracting 521-r from 541-r, a correction signal generation circuit having a configuration as shown in FIG. 5d may be used. In FIG. 5b, a division circuit may be used instead of the subtraction circuit 530. In that case, it is necessary to provide a subtraction circuit between the divider circuit output and the output terminal 501 to subtract 1 from the divider circuit output.

In the above embodiment of FIG. 3, even if the compensation distortion is stored in the RAM 320 in the form of orthogonal coordinates, the coordinate conversion circuit is connected between the output of the correction signal generation circuit 560 and the subtraction circuit 570 or the addition circuit 580. If provided, an error detection circuit having the configuration shown in FIG. 5b can be used. Similar to the above example, if you use a coordinate conversion circuit,
Even if the contents of the RAM are stored in polar coordinates, the error detection circuit configured as shown in FIG. 5b can be used.

Note that the signal 521-r in FIG. 4b is equal to the output of the amplitude calculation circuit 310 in FIG. 3. Therefore, in the signal generation circuit of FIG. 4b and the error detection circuit of FIG. The coordinate conversion circuit 520 in FIG. b may be configured to output only the phase component of the signal.

Further, when signals expressed in rectangular coordinates are inputted from the input terminals 101 and 102, the amplitude calculation circuit 310 is unnecessary, and the amplitude component signal may be inputted to the RAM 320. Further, as the signal generation circuit 330, the coordinate conversion circuit 420
The configuration shown in FIG. 4B without the coordinate conversion circuit 520 may be used, and the configuration of FIG. 5B without the coordinate conversion circuit 520 may be used as the error detection circuit.

If the configuration of the embodiment shown in FIG. 3 is adopted,
Since the RAM address becomes one dimension of the amplitude signal, the RAM capacity can be significantly reduced.

In the embodiments shown in FIGS. 1, 2, and 3, the correction amount generation circuit 170 (correction signal generation circuit in FIG. 3) is multiplied by a constant factor k, but the subtraction circuit 160 (correction signal generation circuit In Figure 3, error detection circuit 3
40) The correction amount generating circuit 17 is a circuit that retains only the sign of the output and makes the magnitude a constant small value.
0 (in FIG. 3, the correction signal generation circuit 350), similar effects can be obtained.

In addition, in the embodiments shown in FIGS. 1, 2, and 3, from the DA converter 130 input to the AD converter 1
50, if there is a delay time between the input terminal and the subtraction circuit 160 (in the embodiments of FIGS. 1 and 2) or between the input terminal and the error detection circuit 340 (the In the case of the embodiment shown in FIG. 3), it is necessary to insert a delay circuit so that the input signal is delayed to the same extent as the output of the AD converter 150. Furthermore, if this delay time is longer than one sample period, it is necessary to similarly delay the write address of the RAM and switch it to the read address.

(Effects of the Invention) As explained above, the modulation device of the present invention automatically makes the output of the nonlinear amplifier have the correct transmission signal waveform in accordance with the characteristics of the nonlinear amplifier, regardless of the modulation method. be able to. Therefore, according to the present invention, it is possible to provide a modulation device that can compensate for the nonlinearity of the amplifier so that the transmission spectrum does not deteriorate due to the nonlinearity of the amplifier. Also,
The modulation device of the present invention is extremely easy to adjust;
It is also possible to follow changes in the characteristics of the amplifier due to temperature.

The modulation device of the first invention of the present application is a device with the simplest configuration. In the modulation device according to the second aspect of the present invention, since the signal level of the distorted signal is sufficiently lower than the level of the signal to be originally transmitted, the number of quantization levels of the signal can be reduced. Therefore, RAM capacity is the first
The number of inventions required is less than that of the invention. In the modulation device of the third invention of the present application, since the address is only the signal amplitude, the RAM capacity can be further reduced than that of the second invention.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the first invention of the present application, Fig. 2 is a block diagram showing an embodiment of the second invention of the present application, and Fig. 3 is a block diagram showing an embodiment of the third invention of the present application. FIGS. 4a and 4b are block diagrams showing a specific example of the signal generation circuit in the embodiment of FIG. 3, and FIGS. 5a and b are block diagrams showing a specific example of the error detection circuit in the embodiment of FIG. 3. Figure 5c,
d is a block diagram showing a specific example of the correction signal generation circuit in the embodiment of FIG. 3, FIG. 6 is a block diagram showing a conventional modulator with an adaptive linearization circuit, and FIGS.
b, c, and d are diagrams showing distortion caused by a 16-value QAM nonlinear amplifier; Figures 8a, b, and c are diagrams showing waveforms at various parts of a conventional modulator with an adaptive linearization circuit; FIG. 10 is a diagram showing memory input/output waveforms in the embodiment, and FIG. 10 is a diagram showing input/output characteristics of the nonlinear amplifier. 101, 102, 103...input terminal, 104
...Output terminal, 120...Writable memory, 130...Digital-to-analog converter, 1
40... Quadrature modulator, 141... Oscillator, 145
... Quadrature demodulator, 150 ... Analog-digital converter, 160 ... Subtraction circuit, 170 ... Correction amount generation circuit, 180 ... Addition circuit, 210 ... Rewritable memory, 220 ... First addition 230...second adder, 310...amplitude calculation circuit, 320...rewritable memory, 3
30... Signal generation circuit, 340... Error detection circuit, 350... Correction signal generation circuit, 410...
Multiplier, 420, 425... Coordinate conversion circuit, 43
0,435...addition circuit, 510...division circuit,
520, 540...Coordinate conversion circuit, 530, 53
5... Subtraction circuit, 560... Correction signal generation circuit,
570... Subtraction circuit, 580... Addition circuit, 60
0,602...Input terminal, 601...Output terminal,
610...RAM, 620...ROM, 630...
...Digital-to-analog converter, 635...Band limit filter, 640...Quadrature modulator, 651
... Oscillator, 660 ... Demodulator, 670 ... Analog-to-digital converter, 680 ... Subtractor, 6
90... Correction amount generation circuit, 691... Adder.

Claims (1)

[Claims] 1. A rewritable memory that is given a read address by a sample value signal sequence and outputs a sample value sequence of a complex signal in which the sample value signal sequence is predistorted to compensate for nonlinearity of an amplifier. a quadrature modulator that generates a signal modulated by the output of the memory and outputs it to the amplifier; a quadrature demodulator that receives a part of the output of the amplifier and demodulates it into a complex signal; an output of the quadrature demodulator. a subtraction circuit that subtracts the value from the sample value signal series; a correction amount generation circuit that receives the output of the subtraction circuit and calculates a distortion correction amount expressed in a complex form; and an output of the memory and an output of the correction amount generation circuit. 1. A modulation device with an adaptive linearization circuit, comprising: an adder circuit for adding up; and adaptively rewriting the contents of the memory based on the output of the adder circuit. 2. a rewritable memory whose read address is given by the sample value signal sequence and which outputs a complex representation of distortion that compensates for the nonlinearity of the amplifier; a first memory which adds the output of this memory and said sample value signal sequence; an adding circuit; a quadrature modulator that generates a signal modulated by the output of the first adding circuit and outputs it to the amplifier; and a quadrature demodulator that demodulates a part of the output of the amplifier to obtain a complex signal and outputs it. a subtraction circuit that subtracts the output of the orthogonal demodulator from the sample value signal sequence; a correction amount generation circuit that receives the output of the subtraction circuit and calculates a correction amount used to correct the contents of the memory; It comprises a second addition circuit that adds the output of the memory and the output of the correction amount generation circuit; characterized in that the content of the memory is adaptively rewritten by the output of the second addition circuit. Modulator with adaptive linear circuit. 3. An amplitude calculation circuit that calculates the amplitude of the sample value signal sequence when a read address is given by the sample value signal sequence; a rewritable memory that outputs distortion; a signal generation circuit that receives the output of this memory and the sample value signal series and outputs a predistorted signal to compensate for the nonlinearity; a quadrature modulator that generates a modulated signal at its output and outputs it to the amplifier; a quadrature demodulator that demodulates a part of the output of the amplifier to obtain a complex signal and outputs it; an output of the quadrature demodulator and the an error detection circuit that detects a signal error that is a difference from a sample value signal series; and a correction circuit that receives the output of this error detection circuit and the output of the memory and generates a correction signal for rewriting the contents of the memory. 1. A modulation device with an adaptive linear writing circuit, comprising: a signal generation circuit; and adaptively rewriting the contents of the memory based on the output of the correction signal generation circuit.