JPH0581055B2 - - Google Patents
Info
- Publication number
- JPH0581055B2 JPH0581055B2 JP60190626A JP19062685A JPH0581055B2 JP H0581055 B2 JPH0581055 B2 JP H0581055B2 JP 60190626 A JP60190626 A JP 60190626A JP 19062685 A JP19062685 A JP 19062685A JP H0581055 B2 JPH0581055 B2 JP H0581055B2
- Authority
- JP
- Japan
- Prior art keywords
- solar cell
- solder
- wafer
- electrodes
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P60/00—Technologies relating to agriculture, livestock or agroalimentary industries
- Y02P60/12—Technologies relating to agriculture, livestock or agroalimentary industries using renewable energies, e.g. solar water pumping
Landscapes
- Die Bonding (AREA)
- Photovoltaic Devices (AREA)
Description
【発明の詳細な説明】 〈技術分野〉 本発明は、太陽電池用ウエーハに関する。[Detailed description of the invention] <Technical field> The present invention relates to a wafer for solar cells.
〈従来技術〉
一般に、太陽電池用ウエーハは、例えば、シリ
コンウエーハに活性不純物が拡散されて表面近く
にPN接合が形成され、太陽光の反射を防止する
ために表面に反射防止膜が形成され、さらに、両
面に複数の太陽電池用の表面電極および裏面電極
が個別に、かつ、所定間隔ごとにそれぞれ形成さ
れている。前記両電極は、焼成電極であるため
に、ポーラス(多孔質)であり、水分の影響を受
けやすく、信頼性に劣る。この信頼性を向上させ
るために、前記両電極に半田がデイツプ付着され
る。このようにして形成された太陽電池用ウエー
ハを角形にダイシングして複数の太陽電池を得て
いる。<Prior art> In general, wafers for solar cells, for example, have active impurities diffused into a silicon wafer to form a PN junction near the surface, and an antireflection film formed on the surface to prevent reflection of sunlight. Furthermore, a plurality of front surface electrodes and back surface electrodes for solar cells are formed on both surfaces individually and at predetermined intervals. Since both of the electrodes are fired electrodes, they are porous, easily affected by moisture, and have poor reliability. To improve this reliability, a dip of solder is applied to both of the electrodes. The solar cell wafer thus formed is diced into square shapes to obtain a plurality of solar cells.
前記半田デイツプは、表面電極および裏面電極
が形成されたウエーハをダイシングした後、一枚
ずつ行なうか、あるいは、ウエーハをダイシング
する前に行なつている。この後者の方法、すなわ
ち、半田デイツプを行なつた後に太陽電池用ウエ
ーハをダイシングする方が、作業効率を高め、コ
ストを低減する上では好ましい。 The solder dipping is performed one by one after dicing the wafer on which the front and back electrodes have been formed, or it is performed before dicing the wafer. The latter method, ie, dicing the solar cell wafer after solder dipping, is preferable in terms of increasing work efficiency and reducing costs.
第4図ないし第6図はこの後者の方法を説明す
るための図であり、第4図は太陽電池用ウエーハ
の一部を拡大して示す表面図、第5図はその裏面
図、第6図は半田デイツプを行なつたときの側面
図である。これらの図において、1は拡散層(図
示せず)が形成された太陽電池用ウエーハとして
のシリコンウエーハ、2は表面電極、3は拡散層
の抵抗を低減するためのグリツド電極、4は裏面
電極である。これらの電極2,3,4は、金属ペ
ースト材料を印刷・焼成して形成される。 4 to 6 are diagrams for explaining the latter method, in which FIG. 4 is a front view showing an enlarged part of the solar cell wafer, FIG. 5 is a back view thereof, and FIG. The figure is a side view of the solder dip. In these figures, 1 is a silicon wafer as a solar cell wafer on which a diffusion layer (not shown) is formed, 2 is a front electrode, 3 is a grid electrode for reducing the resistance of the diffusion layer, and 4 is a back electrode. It is. These electrodes 2, 3, and 4 are formed by printing and firing a metal paste material.
このように表面電極2、グリツド電極3および
裏面電極4が形成されたシリコンウエーハ1を第
6図の矢符Aで示されるように半田槽(図示せ
ず)に浸漬して半田デイツプを行ない、その後、
シリコンウエーハ1の裏面をダイサーのステージ
に真空吸着して第4図および第5図の破線で示さ
れるように角形にダイシングを行なつて複数の太
陽電池6を得ている。 The silicon wafer 1 on which the front surface electrode 2, grid electrode 3, and back surface electrode 4 have been formed is immersed in a solder bath (not shown) as shown by arrow A in FIG. 6 to perform solder dipping. after that,
The back surface of the silicon wafer 1 is vacuum-adsorbed on the stage of a dicer and diced into rectangular shapes as shown by broken lines in FIGS. 4 and 5 to obtain a plurality of solar cells 6.
このような従来例のシリコンウエーハ1では、
半田デイツプの際に、過剰の半田5が第6図に示
されるように裏面電極4の下部に溜まり、裏面が
凹凸となる。このため、ダイシングの際に、前記
真空吸着が円滑にできないという難点がある。 In such a conventional silicon wafer 1,
During solder dipping, excess solder 5 accumulates under the back electrode 4 as shown in FIG. 6, making the back surface uneven. Therefore, there is a problem that the vacuum suction cannot be performed smoothly during dicing.
〈発明の目的〉
本発明は、上述の点に鑑みて成されたものであ
つて、太陽電池用ウエーハに形成された電極に半
田デイツプする際に、半田が局部的に溜まつて太
陽電池用ウエーハの裏面に凹凸ができるのを抑制
してダイシングを円滑に行なえるようにすること
を目的とする。<Object of the Invention> The present invention has been made in view of the above-mentioned points. When solder-dipping is applied to electrodes formed on a wafer for solar cells, solder locally accumulates and The purpose is to suppress the formation of unevenness on the back surface of a wafer so that dicing can be performed smoothly.
〈発明の構成〉
本発明では、上述の目的を達成するために、複
数の太陽電池がダイシングにより個々に分割され
るように個別にかつ所定間隔ごとに形成されると
ともに、前記各太陽電池の表裏面それぞれに表面
電極と裏面電極とが各々形成され、また前記両電
極上に半田がデイツプ付着される太陽電池用ウエ
ーハにおいて、前記太陽電池用ウエーハの裏面に
は、前記デイツプ付着のときに過剰に付着した半
田を逃がして均一にするための細線が、前記各太
陽電池の裏面電極間に、連続するようにデイツプ
処理の引き上げ方向と同一方向に延びて形成され
ている。<Structure of the Invention> In order to achieve the above-mentioned object, in the present invention, a plurality of solar cells are formed individually and at predetermined intervals so as to be individually divided by dicing, and the front surface of each solar cell is In a solar cell wafer in which a front surface electrode and a back surface electrode are respectively formed on each back surface, and in which solder is deposited in a dip on both electrodes, the back surface of the solar cell wafer is coated with an excessive amount of solder during the dip deposition. A thin wire is formed between the back electrodes of each of the solar cells so as to release the adhered solder and make it uniform, extending continuously in the same direction as the pulling direction of the dip process.
〈実施例〉
以下、図面によつて本発明の実施例について詳
細に説明する。第1図は本発明の一実施例の太陽
電池用ウエーハとしてのシリコンウエーハ8の一
部を拡大して示す裏面図であり、第2図は第1図
のシリコンウエーハを半田デイツプした後ダイシ
ングして得られた太陽電池の斜視図であり、第3
図は第1図の側面図である。<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is an enlarged back view of a part of a silicon wafer 8 as a wafer for solar cells according to an embodiment of the present invention, and FIG. 2 shows the silicon wafer shown in FIG. 1 after being solder-dipped and then diced. FIG. 3 is a perspective view of a solar cell obtained by
The figure is a side view of FIG. 1.
この実施例の太陽電池7は、シリコンウエーハ
8に活性不純物を拡散してPN接合を形成し、表
面側に太陽光の反射を防止するためのTiO2など
から成る反射防止膜(図示せず)をCVD
(Chemical Vapor Deposition)などの手法によ
つて形成する。さらに、この反射防止膜上に、第
2図に示されるように矩形の表面電極9および拡
散層の抵抗を低減するためのグリツド電極10を
印刷する。 In the solar cell 7 of this embodiment, active impurities are diffused into a silicon wafer 8 to form a PN junction, and an antireflection film (not shown) made of TiO 2 or the like is provided on the surface side to prevent reflection of sunlight. CVD
(Chemical Vapor Deposition). Furthermore, as shown in FIG. 2, a rectangular surface electrode 9 and a grid electrode 10 for reducing the resistance of the diffusion layer are printed on this antireflection film.
次に、シリコンウエーハ8の裏面には、第1図
に示されるように矩形の裏面電極11とともに、
隣合う太陽電池7の裏面電極11間に連続して同
一方向(第1図の上下方向)に平行に延びる複数
(この実施例では3つ)の細線12がそれぞれ形
成される。これらの細線12は、裏面電極11と
同一の金属ペースト材料から成り、裏面電極11
と同時に、スクリーン印刷された後、焼成されて
形成される。これらの細線12は、例えば、0.2
mm程度の幅に形成されている。 Next, on the back surface of the silicon wafer 8, as shown in FIG.
A plurality (three in this embodiment) of thin wires 12 are formed continuously between the back electrodes 11 of adjacent solar cells 7 and extending in parallel in the same direction (vertical direction in FIG. 1). These thin wires 12 are made of the same metal paste material as the back electrode 11, and are made of the same metal paste material as the back electrode 11.
At the same time, it is screen printed and then fired. These thin lines 12 are, for example, 0.2
It is formed with a width of about mm.
このようにシリコンウエーハ8の裏面には、細
線12が裏面電極11間に連続して同一方向に延
びて形成されているので、第3図の矢符Bで示さ
れるように、シリコンウエーハ8を半田槽に浸漬
して半田デイツプを行なう際に、過剰に付着した
半田は、前記細線12に沿つて鋭直下方(第3図
の下方)に逃げて均一となり、従来例のように裏
面電極の下部に溜まることがなく、シリコンウエ
ーハ8の裏面は均一となる。 In this way, the thin wires 12 are formed on the back surface of the silicon wafer 8 so as to extend continuously in the same direction between the back surface electrodes 11, so that the silicon wafer 8 is When performing solder dip by immersing in a solder bath, the excessively attached solder escapes sharply downward along the thin wire 12 (downward in FIG. 3) and becomes uniform, and unlike the conventional example, the solder adhered to the back side electrode is There is no accumulation at the bottom, and the back surface of the silicon wafer 8 becomes uniform.
このようにして複数の太陽電池7用の表面電極
9、グリツド電極10および裏面電極11が個別
にかつ所定間隔ごとに形成され、また前記両電極
9,11上に半田がデイツプ付着されたシリコン
ウエーハ8の裏面をダイサーのステージに真空吸
着して該ウエーハ8を角形にダイシングして第2
図の太陽電池7を得ている。 In this way, the front surface electrodes 9, the grid electrodes 10, and the back surface electrodes 11 for a plurality of solar cells 7 are formed individually and at predetermined intervals, and solder is deposited in a dip on both the electrodes 9, 11 on the silicon wafer. The back side of the wafer 8 is vacuum-adsorbed on the stage of a dicer, and the wafer 8 is diced into a square shape.
The solar cell 7 shown in the figure is obtained.
本発明では、シリコンウエーハ8の裏面に細線
12を形成したので、上述のように半田デイツプ
の際の過剰の半田は前記細線12に沿つて逃げて
シリコンウエーハ8の裏面は均一となつているの
で、シリコンウエーハ8の裏面をダイサーのステ
ージに円滑に真空吸着させることができ、ダイシ
ングが円滑に行なえる。 In the present invention, since the thin wire 12 is formed on the back surface of the silicon wafer 8, excess solder during solder dipping escapes along the thin wire 12 as described above, and the back surface of the silicon wafer 8 becomes uniform. , the back surface of the silicon wafer 8 can be vacuum-adsorbed smoothly onto the stage of the dicer, and dicing can be performed smoothly.
上述の実施例では、PN接合型の太陽電池用ウ
エーハについて述べたけれども、本発明は、これ
に限るものではなく、その他の太陽電池用ウエー
ハに適用できるのは勿論である。 Although the above-described embodiments have been described with respect to PN junction type solar cell wafers, the present invention is not limited to this and can of course be applied to other solar cell wafers.
〈発明の効果〉
以上のように本発明によれば、複数の太陽電池
がダイシングにより個々に分割されるように個別
にかつ所定間隔ごとに形成されるとともに、前記
各太陽電池の表裏面それぞれに表面電極と裏面電
極とが各々形成され、また前記両電極上に半田が
デイツプ付着される太陽電池用ウエーハにおい
て、前記太陽電池用ウエーハの裏面には、前記デ
イツプ付着のときに過剰に付着した半田を逃がし
て均一にするための細線が、前記各太陽電池の裏
面電極間に、連続するようにデイツプ処理の引き
上げ方向と同一方向に延びて形成されたので、半
田デイツプの際の過剰の半田が従来例のように裏
面電極の下部に溜まることがなく、太陽電池用ウ
エーハの裏面が均一となるので、ダイシングのと
きに、該ウエーハの裏面をダイサーのステージに
円滑に真空吸着させることが可能となり、ダイシ
ングを円滑に行なうことができる。<Effects of the Invention> As described above, according to the present invention, a plurality of solar cells are formed individually and at predetermined intervals so as to be individually divided by dicing, and the front and back surfaces of each of the solar cells are In a solar cell wafer in which a front surface electrode and a back surface electrode are each formed and solder is deposited in a dip on both electrodes, the back surface of the solar cell wafer is free from the solder excessively deposited during the dip deposition. A thin wire was formed between the back electrodes of each of the solar cells, extending continuously in the same direction as the pulling direction of the dip process, so that the excess solder during the solder dip process was removed. Unlike the conventional example, it does not accumulate at the bottom of the back electrode, and the back surface of the solar cell wafer becomes uniform, making it possible to smoothly vacuum-adsorb the back surface of the wafer to the stage of the dicer during dicing. , dicing can be performed smoothly.
第1図は本発明の一実施例のシリコンウエーハ
の一部を拡大して示す裏面図、第2図は第1図の
シリコンウエーハを半田デイツプした後ダイシン
グして得られる太陽電池の斜視図、第3図は第1
図の側面図、第4図は従来例のシリコンウエーハ
の一部を拡大して示す表面図、第5図は第4図の
裏面図、第6図は従来例の側面図である。
7…太陽電池、8…シリコンウエーハ(太陽電
池用ウエーハ)、11…裏面電極、12…細線。
FIG. 1 is an enlarged back view of a part of a silicon wafer according to an embodiment of the present invention, FIG. 2 is a perspective view of a solar cell obtained by solder-dipping and dicing the silicon wafer of FIG. Figure 3 is the first
4 is an enlarged front view of a part of a conventional silicon wafer, FIG. 5 is a rear view of FIG. 4, and FIG. 6 is a side view of the conventional example. 7...Solar cell, 8...Silicon wafer (wafer for solar cells), 11...Back electrode, 12...Thin wire.
Claims (1)
割されるように個別にかつ所定間隔ごとに形成さ
れるとともに、前記各太陽電池の表裏面それぞれ
に表面電極と裏面電極とが各々形成され、また前
記両電極上に半田がデイツプ付着される太陽電池
用ウエーハにおいて、 前記太陽電池用ウエーハの裏面には、前記デイ
ツプ付着のときに過剰に付着した半田を逃がして
均一にするための細線が、前記各太陽電池の裏面
電極間に、連続するようにデイツプ処理の引き上
げ方向と同一方向に延びて形成されることを特徴
とする太陽電池用ウエーハ。 2 前記細線は、裏面電極と同一材料から成る特
許請求の範囲第1項に記載の太陽電池用ウエー
ハ。[Scope of Claims] 1. A plurality of solar cells are formed individually and at predetermined intervals so as to be individually divided by dicing, and a front electrode and a back electrode are respectively provided on the front and back surfaces of each solar cell. In the solar cell wafer in which solder is deposited in a dip on both electrodes, a layer is provided on the back surface of the solar cell wafer to release and make the solder uniformly adhered in excess during the dip deposition. A wafer for a solar cell, characterized in that a thin wire is formed between the back electrodes of each of the solar cells so as to extend continuously in the same direction as the pulling direction of the dip treatment. 2. The solar cell wafer according to claim 1, wherein the thin wire is made of the same material as the back electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60190626A JPS6248032A (en) | 1985-08-28 | 1985-08-28 | Wafer for solar battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60190626A JPS6248032A (en) | 1985-08-28 | 1985-08-28 | Wafer for solar battery |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6248032A JPS6248032A (en) | 1987-03-02 |
| JPH0581055B2 true JPH0581055B2 (en) | 1993-11-11 |
Family
ID=16261198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60190626A Granted JPS6248032A (en) | 1985-08-28 | 1985-08-28 | Wafer for solar battery |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6248032A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0272639A (en) * | 1988-09-07 | 1990-03-12 | Rohm Co Ltd | Method for forming solder layer for die bonding |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60239067A (en) * | 1984-05-11 | 1985-11-27 | Hitachi Ltd | solar cell element |
-
1985
- 1985-08-28 JP JP60190626A patent/JPS6248032A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6248032A (en) | 1987-03-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |