JPH0582769B2 - - Google Patents
Info
- Publication number
- JPH0582769B2 JPH0582769B2 JP59243638A JP24363884A JPH0582769B2 JP H0582769 B2 JPH0582769 B2 JP H0582769B2 JP 59243638 A JP59243638 A JP 59243638A JP 24363884 A JP24363884 A JP 24363884A JP H0582769 B2 JPH0582769 B2 JP H0582769B2
- Authority
- JP
- Japan
- Prior art keywords
- measured
- impedance
- input
- terminal
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Description
【発明の詳細な説明】
産業上の利用分野
本発明は、各種フイルター及び中間周波変成器
あるいは、高周波変成器の電気特性測定装置に関
するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an apparatus for measuring electrical characteristics of various filters and intermediate frequency transformers or high frequency transformers.
従来例の構成とその問題点
従来、この種の測定方式としては、第1図に示
すように被測定物の入力インピーダンスRa及び
出力インピーダンスRbが使用される回路により
整合されることが多いため、測定回路にも個々の
被測定物に対して、インピーダンス整合する必要
があり、測定部Yより、リード線Pで、被測定端
子へ接続して測定していた。Conventional configuration and its problems Conventionally, in this type of measurement method, the input impedance R a and output impedance R b of the measured object are often matched by the circuit used, as shown in Figure 1. Therefore, it is necessary for the measurement circuit to perform impedance matching for each object to be measured, and measurement is performed by connecting the measurement section Y to the terminal to be measured using a lead wire P.
このため、リード線の引き回し等により被測定
物の電気特性の測定値に誤差が非常に生じ易かつ
た。 For this reason, errors are very likely to occur in the measured values of the electrical characteristics of the object to be measured due to the routing of lead wires and the like.
発明の目的
本発明は、このような従来の欠点を解決するも
ので、電気特性測定精度向上を図ると共に、他品
種対応性の向上を図ることを目的とするものであ
る。OBJECTS OF THE INVENTION The present invention is intended to solve these conventional drawbacks, and aims to improve the accuracy of measuring electrical characteristics and to improve compatibility with other types of products.
発明の構成
この目的を達成するために本発明は、入力イン
ピーダンス及び出力インピーダンスを有する被測
定物の入力端子、出力端子が接続される接触端子
ピンを配設した測定回路ユニツト基板と、この測
定回路ユニツト基板に配設されかつ前記被測定物
の出力が入力される電界効果トランジスタを用い
たインピーダンス整合回路とを具備したものであ
る。Structure of the Invention In order to achieve this object, the present invention provides a measuring circuit unit board having a contact terminal pin to which an input terminal and an output terminal of a device to be measured having an input impedance and an output impedance are connected, and the measuring circuit unit board. The device is equipped with an impedance matching circuit using a field effect transistor disposed on the unit board and into which the output of the object to be measured is input.
実施例の説明
第2図に示すように被測定物Xの入力インピー
ダンスRa及び出力インピーダンスRbの整合を、
入力インピーダンスの非常に高い電界効果トラン
ジスタで受けたインピーダンス整合回路Zで行な
い、外部からの影響が少ない低インピーダンスに
変換し測定部Yへ入力するように構成している。Description of Examples As shown in FIG. 2, the input impedance R a and output impedance R b of the object under test X are matched by
The impedance matching circuit Z receives the signal from a field effect transistor with a very high input impedance, converts it to a low impedance that is less affected by external influences, and inputs it to the measuring section Y.
第3図に電界トランジスタを用いたインピーダ
ンス整合回路Zの具体例を示しており、Tr1は電
界効果トランジスタ、Tr2はトランジスタ、C1〜
C7コンデンサ、R1〜R9は抵抗である。 Figure 3 shows a specific example of an impedance matching circuit Z using field transistors, where T r1 is a field effect transistor, T r2 is a transistor, and C 1 to
C7 capacitor, R1 to R9 are resistors.
また、本発明では、第4図に示すようにこのイ
ンピーダンス整合回路Zを、被測定物Xの入力端
子X1、出力端子X2、アース端子X3が自由自在に
着脱可能な接触端子ピン1〜3を有する測定回路
ユニツト基板4に組込んで、接触端子ピン1〜3
との間で所定の配線を行なつている。5は測定回
路ユニツト基板4が取付けられる補強用のベース
板である。すなわち、この構成により、被測定物
Xを測定回路ユニツト基板4に、入力端子X1、
出力端子X2、アース端子X3が接触端子ピン1〜
3に接続されるように取付けることにより、被測
定物Xの特性の測定を行なうことができる。 In addition, in the present invention, as shown in FIG. 4, this impedance matching circuit Z is connected to a contact terminal pin 1 to which the input terminal X 1 , output terminal X 2 , and ground terminal X 3 of the object under test X can be freely attached and detached. .about.3 is incorporated into the measuring circuit unit board 4 having contact terminal pins 1 to 3.
Predetermined wiring is performed between the 5 is a reinforcing base plate to which the measuring circuit unit board 4 is attached. That is, with this configuration, the object to be measured X is connected to the measurement circuit unit board 4, and the input terminals X 1 ,
Output terminal X 2 , ground terminal X 3 are contact terminal pins 1~
3, the characteristics of the object to be measured X can be measured.
発明の効果
以上のように本発明によれば、個々のインピー
ダンス整合が電界効果トランジスタよる回路の交
換により、簡単に行なえ、また被測定物の測定端
子からインピーダンス整合回路までの引き回し
が、かなり短くなり、測定値の誤差が非常に少な
くなり、更に、測定のための接触端子ピンの位置
精度が向上して、接触不良が削減され、その上被
測定物の形状や端子位置の変更等の対応性が向上
し、量産測定が可能になるという効果が得られ
る。Effects of the Invention As described above, according to the present invention, individual impedance matching can be easily performed by replacing circuits using field effect transistors, and the wiring from the measurement terminal of the DUT to the impedance matching circuit can be considerably shortened. , errors in measurement values are extremely reduced, the positioning accuracy of contact terminal pins for measurement is improved, contact failures are reduced, and moreover, it is more adaptable to changes in the shape of the object to be measured and the terminal position. This has the effect of improving performance and making mass production measurement possible.
第1図は従来のフイルター等の電気特性測定装
置の回路図、第2図は本発明の一実施例によるフ
イルター等の電気特性測定装置の回路図、第3図
は同装置に使用のインピーダンス整合回路を示す
回路図、第4図は同装置の構成を示す分解斜視図
である。
X……被測定物、Ra……入力インピーダンス、
Rb……出力インピーダンス、Z……インピーダ
ンス整合回路、X1……入力端子、X2……アース
端子、X3……出力端子、1,2,3……接触端
子ピン、4……測定回路ユニツト基板。
Fig. 1 is a circuit diagram of a conventional electrical characteristic measuring device such as a filter, Fig. 2 is a circuit diagram of an electrical characteristic measuring device such as a filter according to an embodiment of the present invention, and Fig. 3 is an impedance matching used in the same device. A circuit diagram showing the circuit, and FIG. 4 is an exploded perspective view showing the configuration of the device. X...Object to be measured, R a ...Input impedance,
R b ... Output impedance, Z ... Impedance matching circuit, X 1 ... Input terminal, X 2 ... Earth terminal, X 3 ... Output terminal, 1, 2, 3 ... Contact terminal pin, 4 ... Measurement Circuit unit board.
Claims (1)
を有する被測定物の入力端子、出力端子が接続さ
れる接触端子ピンを配設した測定回路ユニツト基
板と、この測定回路ユニツト基板に配設されかつ
前記被測定物の出力が入力される電界効果トラン
ジスタを用いたインピーダンス整合回路とを具備
したフイルター等の電気特性測定装置。1. A measurement circuit unit board provided with contact terminal pins to which input terminals and output terminals of the object to be measured having input impedance and output impedance are connected, and an output terminal of the object to be measured arranged on this measurement circuit unit board. A device for measuring electrical characteristics of a filter, etc., which is equipped with an impedance matching circuit using a field-effect transistor that receives input.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59243638A JPS61121610A (en) | 1984-11-19 | 1984-11-19 | Equipment for measuring electrical characteristics of filters, etc. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59243638A JPS61121610A (en) | 1984-11-19 | 1984-11-19 | Equipment for measuring electrical characteristics of filters, etc. |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61121610A JPS61121610A (en) | 1986-06-09 |
| JPH0582769B2 true JPH0582769B2 (en) | 1993-11-22 |
Family
ID=17106795
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59243638A Granted JPS61121610A (en) | 1984-11-19 | 1984-11-19 | Equipment for measuring electrical characteristics of filters, etc. |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61121610A (en) |
-
1984
- 1984-11-19 JP JP59243638A patent/JPS61121610A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61121610A (en) | 1986-06-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |