JPH0585088B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a PUT oscillation circuit, and more particularly to a PUT oscillation circuit that has a wide duty variable range of oscillation output, has a simplified configuration, and has little frequency fluctuation.

[Conventional technology]

Conventionally, there is a PUT oscillation circuit of this type as shown in FIG. This is a basic trigger circuit consisting of a so-called monostable multivibrator, three resistors 7, 8, and 13 that trigger it, a capacitor 14, and PUT6, and the cathode output of PUT6 is applied to the base of transistor 10 to trigger it. .

Note that a well-known method of simply triggering the monostable multivibrator is to apply an intermittent negative external pulse to the collector-emitter of the transistor 10. In these cases, the time limit of the intermittent external pulse (determined by the gate bias voltage of PUT6, resistor 13, and capacitor 14) and the time limit of the monostable multivibrator (determined by resistor 3 and capacitor 4) are determined independently. In other words, it consisted of an independent multivibrator and an external oscillation trigger circuit.

FIG. 5 shows another conventional example.

The oscillation period of this circuit is when PUT6 is off.
Charging time of resistor 5 and capacitor 4 and PUT6
is the sum of the discharge time of resistor 3 and capacitor 4 when capacitor 4 is on, and when capacitor 4 is charging, transistor 1 is off, and when capacitor 4 is discharging, the base of transistor 1 is reverse biased and turns off, and the time constant of this charging and discharging is By varying , the duty of the oscillation output can be varied. The duty limit of this oscillation circuit is the minimum limit of the charging time constant of the resistor 5 and capacitor 4. In other words, after PUT6 is turned on and capacitor 4 finishes discharging,
The current of PUT6 is determined by the current flowing from power supply 11 through resistor 5. If this current becomes larger than the valley point current I _V of the PUT 6, that is, if the resistor 5 is made smaller, the PUT 6 cannot be turned off and malfunctions in that it remains on. Therefore, there is a limit to the range in which the resistor 5 can be set. For example, if resistor 7 is 10KΩ, resistor 8 is 2KΩ, capacitor 4 is 0.033μF, and the voltage of power supply 11 is 12V DC, the usable range of resistor 5 is approximately 100KΩ or more, and the upper limit is 500KΩ or less depending on the environment such as surrounding humidity. Then, only a range of 5 times is allowed.

[Problem that the invention seeks to solve]

As described above, the conventional PUT oscillation circuit described above is complicated because it requires the time limit of the monostable multivibrator, the period of the external oscillation circuit, and the output pulse width. In addition, circuits that utilize PUT on and off times had the disadvantage that the PUT was likely to remain on for a long time, and the time range was narrow.

[Means for solving problems]

The PUT oscillator circuit of the present invention shares the time capacitor of the monostable multivibrator and the time capacitor and time resistor of the PUT trigger oscillation circuit, and the PUT is connected in parallel with the transistor.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows a circuit of one embodiment of the present invention. 1st
In the figure, transistors 1 and 10, resistor 2,
The circuit composed of capacitors 3, 5, 9 and capacitor 4 is a so-called monostable multivibrator. The anode and cathode of PUT 6, whose gate is biased by resistors 7 and 8, are connected in parallel to transistor 10.

Now, to explain the operation from the initial state when the power supply 11 is turned on, since the capacitor 4 is not charged,
Transistor 1 whose base is biased by resistor 3 is turned on and its collector potential is approximately zero, so transistor 10 whose base is not biased
is off. At this time, since the charge of the capacitor 4 is zero, the collector potential of the transistor 10, that is, the anode potential of PUT6 is almost zero (more precisely,
Base-emitter potential of transistor 1 approximately 0.6V)
becomes. Here, the gate of PUT6 is resistor 7, 8
is maintained at the bias voltage given by , a reverse bias is applied to the gate anode, and PUT6 is off.

Next, capacitor 4 is connected to power supply 11 in the base-emitter circuit of resistor 5, capacitor 4, and transistor 1.
As the voltage increases, the offset voltage of PUT6 increases.
When V _T + gate bias voltage V _G is exceeded, PUT6
turns on. Therefore, the charging voltage of capacitor 4 (peak value V _T +
A voltage obtained by subtracting the voltage drop VF of PUT 6 from V _G ) is applied as a reverse bias, transistor 1 is turned off, and as a result, resistors 2 and 9
The base of the transistor 10 is biased from , and the transistor 10 is turned on. Then, the current that has been flowing to PUT6 flows to transistor 10, cutting off the anode current of PUT6, and PUT6 can no longer remain on and turns off. On the other hand, the capacitor 4 is discharged through the collector-emitter circuit of the resistor 3, the capacitor 4, and the transistor 10, and when the base of the transistor 1 changes from reverse bias to forward bias, transistor 1 is turned on again, transistor 10 is turned off, and again. Charging of the capacitor 4 begins in a base-emitter circuit of the resistor 5, the capacitor 4, and the transistor 1.

The above operation is shown in operation waveforms as shown in FIG. In the figure, during the period _t1 when the collector potential of transistor 1 is at a high level, resistor 3 and capacitor 4
Similarly, the low level period _t2 is determined by the time constant determined by the resistor 5 and capacitor 4, and the gate bias potential _VG of PUT6. i.e. V _G
The smaller the value, the lower the charging voltage of capacitor 4.
PUT6 is turned on, and therefore transistor 1 is also applied with a low reverse bias voltage, and charging and discharging are completed in a short time.

After PUT6 is turned on, it is instantly turned off as described above, so the gate of PUT6 momentarily drops to _zero potential for about 10 μs during the on time of PUT6.

As described above, if the collector of transistor 1 is used as an output, its duty can be set by varying t ₁ /(t ₁ +t ₂ ). The limit of this duty variable range is not affected by the valley point current of PUT6. That is, the PUT 6 is completely cut off by the transistor 10 as described above, turns off instantly, and can wait for the next operation. According to experiments, the variable range of resistors 3 and 5 is transistors 1 and 1.
Depending on h _FE of 0, when the voltage of the power supply 11 is 12V and the capacitor 4 is 0.033μF, a variable duty range of 1KΩ to 500KΩ is possible, and the duty variable range is approximately 99.8% to 0.2%.

As explained above, in order to fix the capacitance of capacitor 4 and vary the duty, it is necessary to use resistors 3 and 5.
The value of must be changed. However, resistance 3,
If only 5 is changed independently, the synchronization will change. Therefore, if the sum of resistors 4 and 5 is kept constant and varied, the period can be made almost constant.

FIG. 3 shows another embodiment of the present invention, in which the slider of the variable resistor 12 is connected to the (+) side of the power supply 11, and resistors 3 and 5 are connected through the other two terminals. This solves the aforementioned problem that when the resistance on the resistor 5 side is large, the resistance on the resistor 3 side is small.

[Effects of the Invention] As explained above, the PUT shares the time capacitor of the monostable multivibrator, providing a simple self-oscillation circuit, and after the PUT is turned on, the PUT is instantaneously activated by the parallel transistors. The current is cut off and the PUT is completely turned off, so the variable range of the timed resistor is extremely wide.Also, the frequency can be adjusted by connecting a variable resistance slider to the power supply and connecting charge/discharge timed resistors to the other two terminals. It has the advantage of being able to vary only the duty without changing it. Although the monostable multivibrator was explained above using two NPN bipolar transistors, it is also possible to use an N-channel FET.
The same operation can be performed using . In this case, the resistor 9 can be omitted.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
FIG. 3 is a circuit diagram showing another embodiment of the present invention, and FIGS. 4 and 5 are respectively conventional circuit diagrams.
It is a PUT oscillation circuit diagram. 1, 10...transistor, 2, 3, 5, 7...
...Resistor, 8,9,13...Resistor, 4,14...Capacitor, 6...PUT, 11...Power supply, 12...
...variable resistance.

Claims (1)

[Claims] 1. A series circuit of a first resistor and a collector-emitter path of a first transistor, and a series circuit of a second resistor and a collector-emitter path of a second transistor are connected to the first and second power supplies. A third resistor is connected in parallel between the terminals, a third resistor is connected between the collector of the first transistor and the base of the second transistor, and the third resistor is connected between the first power supply terminal and the base of the first transistor. A fourth resistor is connected between the collector of the second transistor and the base of the first transistor, and a fifth and a fourth resistor are connected between the first and second power supply terminals. 6 resistors are connected in series, and the gate of PUT is connected to these connection points, and the PUT
A PUT oscillation circuit, the anode and cathode of which are connected to the collector of the second transistor and the second power supply terminal, respectively. 2. Claim 1, wherein a sliding piece of a variable resistor is connected to the first power supply terminal, and one end of each of the second and fourth resistors is connected to the other two terminals of the variable resistor. PUT oscillator circuit described.