JPH0586678B2 - - Google Patents
Info
- Publication number
- JPH0586678B2 JPH0586678B2 JP58000831A JP83183A JPH0586678B2 JP H0586678 B2 JPH0586678 B2 JP H0586678B2 JP 58000831 A JP58000831 A JP 58000831A JP 83183 A JP83183 A JP 83183A JP H0586678 B2 JPH0586678 B2 JP H0586678B2
- Authority
- JP
- Japan
- Prior art keywords
- base
- emitter
- collector
- electrode
- light receiving
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/24—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only two potential barriers, e.g. bipolar phototransistors
- H10F30/245—Bipolar phototransistors
Landscapes
- Photovoltaic Devices (AREA)
- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】
［発明の技術分野］
本発明はフオトトランジスタ（受光素子とい
う）を形成する半導体受光装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor light receiving device forming a phototransistor (referred to as a light receiving element).
［発明の技術的背景とその問題点］
従来の受光素子は、エミツタ−コレクタ間に伸
びようとするチヤネル（反転層）の防止用とし
て、ベース−コレクタ間接合（以下ベース接合と
いう）上にアルミニウム配線を行つている。第１
図はその従来の受光素子を示し、１はコレクタ
層、２はベース層、３はエミツタ層、４はSiO2
膜（絶縁膜）、５はベース電極、５1はこのベース
電極に接続されたアルミニウム配線、６はエミツ
タ電極である。すなわち従来は、ベース接合上に
アルミニウム配線５1及びベース電極５を配置し、
該配線電極５1とベース層２間を同電位にしてチ
ヤネル防止を行つていた。[Technical background of the invention and its problems] Conventional light receiving elements use aluminum on the base-collector junction (hereinafter referred to as base junction) to prevent a channel (inversion layer) from extending between the emitter and collector. I'm doing the wiring. 1st
The figure shows the conventional photodetector, where 1 is a collector layer, 2 is a base layer, 3 is an emitter layer, and 4 is a SiO 2
A film (insulating film), 5 is a base electrode, 51 is an aluminum wiring connected to this base electrode, and 6 is an emitter electrode. That is, conventionally, the aluminum wiring 51 and the base electrode 5 are arranged on the base junction,
The wiring electrode 51 and the base layer 2 were kept at the same potential to prevent channels.
受光素子は一般的にコレクタ、エミツタ間にバ
イアスをかけ、ベースを受光部として動作させて
いる。よつてコレクタ、エミツタ間のリーク電流
ICEOが高いと、光を感知する前にオン状態とな
り、問題である。従来技術のものだと、コレク
タ、エミツタ間にバイアスをかけても、ベース側
はノンバイアス状態となることがあり（非受光期
間）、チヤネル防止も不完全で、エーク電流ICEO
も高くなるものであつた。 Generally, a light-receiving element has a collector and an emitter with a bias applied thereto, and the base operates as a light-receiving section. Therefore, leakage current between collector and emitter
If I CEO is high, it will turn on before sensing light, which is a problem. With conventional technology, even if a bias is applied between the collector and emitter, the base side may be in a non-biased state (during the non-light receiving period), channel prevention is incomplete, and the ake current I CEO
It was also expensive.
［発明の目的］
本発明は上記実情に鑑みてなされたもので、チ
ヤネル防止の効果をおとすことなく、リーク電流
ICEOを低減させることができる半導体受光装置を
提供しようとするものである。[Object of the Invention] The present invention has been made in view of the above-mentioned circumstances.
The present invention aims to provide a semiconductor photodetector that can reduce ICEO .
［発明の概要］
本発明は、製品を組み立てる際にベースの電極
を取り出すものは少なく、エミツタの電極はすべ
ての製品で取り出すことから、エミツタの電位を
ベース接合上の配線へ供給させることで、終始チ
ヤネル防止に加え、リーク電流の減少が実現でき
て、ダブル効果を発揮できるようにしたものであ
る。[Summary of the Invention] The present invention provides a method for supplying the potential of the emitter to the wiring on the base junction, since there are few products in which the base electrode is taken out when assembling the product, and the emitter electrode is taken out in all products. In addition to preventing channels from beginning to end, it also reduces leakage current, providing a double effect.
［発明の実施例］
以下図面を参照して本発明の一実施例を説明す
る。第２図は同実施例を示す断面構成図である
が、これは第１図のものと対応させた場合の例で
あるから、対応箇所には同一符号を付して説明を
省略し、特徴とする点の説明を行う。[Embodiment of the Invention] An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a cross-sectional configuration diagram showing the same embodiment, but since this is an example in which it corresponds to that in FIG. The following points will be explained.
同実施例の特徴は、受光素子１１の主表面のベ
ース接合の絶縁膜４上で、前記ベース接合に沿つ
て設けられ受光素子１１のエミツタ電極６に接続
された電極（アルミニウム）配線６1を具備させ
た点である。この場合、ベース接合（ベース−コ
レクタ接合）は、平面的にみれば環状であるた
め、これに対応する電極配線６1も環状となる。 The feature of this embodiment is that an electrode (aluminum) wiring 6 1 is provided on the insulating film 4 of the base junction on the main surface of the light receiving element 11 and is provided along the base junction and connected to the emitter electrode 6 of the light receiving element 11 . This is a point that has been made possible. In this case, since the base junction (base-collector junction) is annular in plan view, the corresponding electrode wiring 6 1 is also annular.
上記のごとく構成された受光素子にあつては、
コレクタ、エミツタ間バイアスにより、エミツタ
には終始バイアス電圧がかかつているから、これ
がコレクタ、エミツタ間のベースで発生しようと
するチヤネル（反転層）の伸びを、電極６1で押
さえるように作用し、従つて終始チヤネル防止効
果を発揮できる。またエミツタ層３に負のバイア
ス電圧がかかり、この時エミツタ、ベース間に順
方向バイアス電圧がかかつて、ベース層２と電極
配線６1とがほぼ同電位となり、従つてベース層
２に、リーク電流（ベース、エミツタ間に流れて
リーク電流ICEOのもとになる電流）の原因となる
キヤリア（例えば電子）が、ベース層２内にほと
んど誘起されず、リーク電流ICEOの発生を防止で
きる。実験によれば、第３図に示すごとく、リー
ク電流ICEOをほぼ1/10に減少できた。 In the light receiving element configured as above,
Since a bias voltage is applied to the emitter from beginning to end due to the bias between the collector and the emitter, this acts to suppress the elongation of the channel (inversion layer) that is about to occur at the base between the collector and the emitter with the electrode 61 . Therefore, the channel prevention effect can be exhibited throughout. Further, a negative bias voltage is applied to the emitter layer 3, and at this time, a forward bias voltage is applied between the emitter and the base, so that the base layer 2 and the electrode wiring 61 have almost the same potential, so that leakage occurs in the base layer 2. Carriers (e.g., electrons) that cause current (current that flows between the base and emitter and become the source of leakage current ICEO ) are hardly induced in the base layer 2, and the generation of leakage current ICEO can be prevented. . According to experiments, as shown in Figure 3, the leakage current I CEO was reduced to approximately 1/10.
［発明の効果］
以上説明したごとく本発明によれば、エミツタ
電極に接続されるベース接合上の電極配線に終始
バイアス電圧をかけられるから、チヤネル防止効
果が完全化され、また上記電極配線とベース層を
同電位化できて、リーク電流ICEOの発生原因とな
るキヤリアの発生をおさえるから、リーク電流
ICEOを減少化し得る半導体受光装置が提供でき
るものである。[Effects of the Invention] As explained above, according to the present invention, since a bias voltage is applied to the electrode wiring on the base junction connected to the emitter electrode from beginning to end, the channel prevention effect is perfected. Since the layers can be made to have the same potential and the generation of carriers that cause the leakage current I CEO can be suppressed, the leakage current can be reduced.
A semiconductor light receiving device capable of reducing ICEO can be provided.
第１図は従来装置の構成を示す断面図、第２図
は本発明の一実施例の構成を示す断面図、第３図
は同構成の効果を示す特性図である。
１……コレクタ層、２……ベース層、３……エ
ミツタ層、４……絶縁膜、５……ベース電極、６
……エミツタ電極、６1……エミツタ電極につな
がる電極配線、１１……受光素子（フオトトラン
ジスタ）。
FIG. 1 is a sectional view showing the structure of a conventional device, FIG. 2 is a sectional view showing the structure of an embodiment of the present invention, and FIG. 3 is a characteristic diagram showing the effect of the same structure. DESCRIPTION OF SYMBOLS 1... Collector layer, 2... Base layer, 3... Emitter layer, 4... Insulating film, 5... Base electrode, 6
... Emitter electrode, 6 1 ... Electrode wiring connected to the emitter electrode, 11 ... Light receiving element (phototransistor).
Claims (1)
スを、そのベース内にエミツタをそれぞれ積層形
成した縦型トランジスタ構成の層構成を有するフ
オトトランジスタと、該トランジスタの光電変換
面の最外周のベース−コレクタ間接合の絶縁膜上
で前記ベース−コレクタ間接合に沿つて環状に設
けられ前記フオトトランジスタのエミツタ電極に
接続されて、前記トランジスタのコレクタ−エミ
ツタ間リーク電流の抑制、チヤネル抑制を行う電
極配線とを具備したことを特徴とする半導体受光
装置。1 A phototransistor having a layer structure of a vertical transistor structure in which a collector is used as a base, a base is stacked inside the collector, and an emitter is stacked inside the base, and a base-collector junction at the outermost periphery of the photoelectric conversion surface of the transistor. an electrode wiring provided in a ring shape along the base-collector junction on the insulating film and connected to the emitter electrode of the phototransistor to suppress collector-emitter leakage current and channel suppression of the transistor. A semiconductor light receiving device characterized by the following.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58000831A JPS59125672A (en) | 1983-01-07 | 1983-01-07 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58000831A JPS59125672A (en) | 1983-01-07 | 1983-01-07 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59125672A JPS59125672A (en) | 1984-07-20 |
| JPH0586678B2 true JPH0586678B2 (en) | 1993-12-13 |
Family
ID=11484565
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58000831A Granted JPS59125672A (en) | 1983-01-07 | 1983-01-07 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59125672A (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5641186B2 (en) * | 1972-03-03 | 1981-09-26 | ||
| JPS5538835B2 (en) * | 1974-05-09 | 1980-10-07 |
-
1983
- 1983-01-07 JP JP58000831A patent/JPS59125672A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59125672A (en) | 1984-07-20 |
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