JPH0586689B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital signal transmission system, and particularly to a demodulation system for a digital sub-signal that is transmitted while being superimposed on a digital main signal.

[Conventional technology]

Conventionally, in digital signal transmission systems using optical fiber cables as transmission paths, it is necessary to simultaneously transmit a main signal, which is the information to be transmitted, and a sub-signal, which is used for monitoring the transmission path, etc. In order to achieve this, a method is generally used in which a pulse train for sub-signal transmission is time-division multiplexed on a pulse train of a main signal, which is information to be transmitted.

[Problem that the invention seeks to solve]

According to the conventional method, the digital sub-signal is transmitted by being time-division multiplexed with the main signal pulse train, which is the information to be transmitted, which requires a complex pulse signal multiplexing/demultiplexing circuit, and There are many disadvantages, such as the large circuit scale of the system, which increases the power consumption of the device, and there has been a strong desire for a system that can transmit a sub signal by superimposing it on the main signal system with a simple configuration.

[Means for solving problems]

In the present invention, the repetition period is t ₀ and the pulse occupation rate is
A digital sub signal is transmitted by superimposing a digital sub signal whose pulse occupation time matches the above remaining time with a repetition period of nt ₀ (n is an integer) in the 50% remaining time portion of the 50% main signal pulse train. Assuming a signal pulse train, the pulse train obtained by identifying and reproducing the pulse signal in the remaining time portion after the main signal pulse is occupied by a timing signal that matches the repetition period of the main signal pulse train from this pulse train is defined as nt ₀ . digital sub-signal information is obtained by passing it through a time expansion circuit.

〔Example〕

FIG. 1 is a block diagram of a digital sub-signal demodulation circuit showing one embodiment of the present invention, and FIG.
It is a timing chart for explaining the operation status of each part in the figure.

To simplify the explanation, in FIG. 2, the insertion repetition period of the superimposed sub signal information pulse is 3t ₀ with respect to the period t ₀ of the main signal information pulse train to be transmitted.
It is said that Further, in the circuit configuration shown in FIG. 1, the time required for signal movement and processing will be explained as ideally zero, but it goes without saying that in a practical circuit, consideration must be given to the time required for these steps.

In FIG. 2, when the main signal information pulse train as shown in FIG. 2a is transmitted on a transmission path, it is transmitted as a pulse signal with a pulse occupancy rate of 50% as shown in FIG. 2c. However, there is no particular need for it to be exactly 50%. This method is a pulse signal transmission method that is often adopted in conventional optical communication systems.

Therefore, as is clear from FIG. 2c, _{the time during which the pulse signal is transmitted is t 0 /}
The remaining time t ₀ /2 does not contribute to the transmission of digital information. Therefore,
Now, after sampling the digital sub-signal as shown in Figure 2b with a pulse of pulse occupancy rate t ₀ /2, the remaining time portion of the main signal pulse t ₀ /2 is sampled as shown in Figure 2d. It is possible to overlap with a repetition period of 3t ₀ . In Figure d, the shaded part A indicates the presence of sub-signal information, and the thick-lined part B indicates the absence of sub-signal information, as shown in Figure b. Matches the sub signal information.

In this way, the transmission pulse train d, in which the sub-signal pulse train is superimposed on the main signal pulse train, is input to the input terminal 1 in FIG. It is input to input terminal D of No. 4. On the other hand, the transmission pulse train d passes through the timing signal extraction circuit 5 and is extracted as a timing pulse train e having a period t ₀ as shown in FIG. 2e. This timing pulse train e passes through the signal distribution circuit 6, and one side is D
The input signal is input to the input terminal C of the type flip-flop circuit 3, and the other _one is inputted to the input terminal C of the flip-flop circuit 3, and the other input terminal is inputted to the input terminal C of the type flip-flop circuit 3, and the other input terminal is inputted to the input terminal C of the type flip-flop circuit 3.
The signal is inputted to the input terminal C of the D-type flip-flop circuit 4 as a timing pulse train f as shown in FIG.

In this state, when comparing the time relationships of the pulse signals input to the D-type flip-flop circuits 3 and 4, the D-type flip-flop circuit 3 has the following characteristics.
A transmission pulse train d and a timing pulse train e are applied to the D-type flip-flop circuit 4 in the time relationship shown in FIG. A transmission pulse train d and a timing pulse train f are applied.

Therefore, according to the operating principle of the D-type flip-flop circuit, a pulse train g as shown in FIG. A main signal information pulse train can be obtained.

On the other hand, at the output terminal Q of the D-type flip-flop circuit 4, a pulse train h as shown in FIG. 2h is periodically reproduced. By passing this pulse train h through a pulse expansion circuit 9 (in this embodiment, _t0 is expanded to _3t0 ), a pulse train i as shown in FIG. A pulse train can be obtained.

〔Effect of the invention〕

As described above, according to the digital sub-signal demodulation method according to the present invention, it can be implemented with an extremely simple circuit configuration and does not require a special synchronization pulse circuit. It is possible to configure a demodulation circuit of 1, and an increase in the power consumption of the device can also be prevented.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a demodulation circuit showing one embodiment of the present invention, and FIG. 2 is a timing chart for explaining the circuit operation in FIG. 1. 1... Input terminal of demodulation circuit, 2, 6... Signal distribution circuit, 3, 4... D type flip-flop circuit, 5... Timing signal extraction circuit, 7...
t ₀ /2 delay circuit, 8, 10...output terminal, 9...
Pulse stretching circuit.

Claims (1)

[Claims] 1 For a main signal pulse train with a repetition period of t ₀ and a pulse occupancy of 50%,
A timing signal that matches the repetition period of the main signal pulse train is applied to a digital sub-signal pulse train that is transmitted with a digital sub-signal superimposed with a repetition period of nt ₀ (n is an integer) and whose pulse occupation time matches the remaining time. A digital sub-signal is obtained by passing the pulse train obtained by identifying and reproducing the pulse signal of the remaining time portion after the main signal pulse occupies the main signal pulse through a time expansion circuit of nt ₀ . Digital sub-signal demodulation method.