JPH06101054B2 - Coin sorter - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coin sorting device used for a vending machine, a money changing machine, a service device, etc., and particularly an electronic coin for electronically discriminating a type of coin. Regarding the improvement of the sorting device

(Prior Art) Conventionally, a coin sorting device mechanically sorts coins by mechanically checking the properties of the coins, and a coin sorting device that electronically detects the properties of the coins and detects the coins based on the detected output. An electronic coin sorting device for sorting is known.

Here, the use range of the electronic type coin sorting device is expanded because of its good sorting accuracy and its miniaturization.

The general structure of an electronic coin sorting device is that an oscillating coil excited by a signal of a predetermined frequency is arranged on one side of a coin passage and a receiving coil electromagnetically coupled to the oscillating coil on the other side. It is also possible to dispose a coil, determine the authenticity and type of the coin based on the output of the receiving coil generated when the coin passes, and sort the coin based on the determination result.

That is, note that the peak value of the envelope waveform of the signal generated in the receiving coil when a coin passes is different for each coin A, B, C, D as shown in FIG. A range (window) is determined in advance for each sorted coin (see FIG. 16), and whether the coin is authentic or false and the type is determined by whether the peak value of the envelope waveform of the signal generated in the receiving coil falls within the allowable range. It is configured to make a determination.

However, according to the above configuration, in the case of a coin having a large peak value of the envelope waveform of the signal generated in the receiving coil, since the envelope waveform crosses the allowable range (window) of other coins, the true coin determination signal is generated for each coin. Will occur.

That is, in the case of a coin having a large peak value of the envelope waveform of the signal generated in the receiving coil, a plurality of true coin determination signals are generated for one coin insertion.

Therefore, conventionally, a peak value detection circuit for detecting that the envelope waveform of the signal generated in the receiving coil has reached the peak value is provided, and the peak signal (first
(See Fig. 17), the envelope waveform of the signal generated in the receiving coil is determined.

(Problems of the prior art) However, here, the peak value detection circuit is a circuit that sequentially stores the envelope waveform of the signal generated in the receiving coil, a circuit that detects that the envelope waveform is inverted from attenuation and starts rising. However, there is a problem in that the entire circuit configuration is very complicated due to the peak value detection circuit.

In addition, since the peak signal output from the peak value detection circuit is a discontinuous signal that occurs only at the peak of the envelope waveform of the signal generated in the receiving coil, noise equivalent to this peak signal is generated at times other than this peak of the envelope waveform. If it occurs, there is a problem that it malfunctions due to this noise.

Therefore, an object of the present invention is to provide a coin sorter having a simple structure with few malfunctions.

(Means for Solving Problems) In order to achieve the above object, a coin sorting device according to the first aspect of the present invention includes an oscillating coil disposed in a coin passage and excited by a signal of a predetermined frequency, and the coin. A receiving coil disposed across the passage and facing the oscillation coil; and a detection and amplification circuit that outputs an envelope signal of the output signal by detecting and amplifying the output signal of the receiving coil.
Different windows corresponding to the types of coins are set, a plurality of window circuits that respectively generate a pulse signal that rises when the envelope signal enters the window and falls when the envelope signal exits the window, and the plurality of window circuits. A plurality of timer circuits that respectively input the pulse signals output from the window circuits and output signals when the pulse width of the pulse signals exceeds a predetermined pulse width, and pulse signals output from the plurality of window circuits It is characterized by comprising a counter circuit for counting and a judging circuit for judging whether the coin is true or false and the type based on the output of the mimmer circuit and the count value of the counter circuit.

The coin sorting device according to the second aspect of the invention includes a first oscillating coil disposed in the coin passage and excited by a signal of a first frequency, and the first oscillating coil that sandwiches the coin passage. A first receiving coil disposed to face each other, a first detecting and amplifying circuit that outputs a first envelope signal by detecting and amplifying an output signal of the first receiving coil, and a type of coin. A plurality of different window circuits corresponding to the first envelope signals, the first envelope signal rising when the first envelope signal enters the window, and the first plurality of window circuits that generate a pulse signal falling when the first envelope signal exits the window circuit, A plurality of timer circuits that respectively input the pulse signals output from the first plurality of window circuits and output signals when the pulse widths of the pulse signals exceed a predetermined pulse width, and are provided in the coin passage. Is the first A second oscillating coil excited by a signal having a frequency of, a second receiving coil disposed across the coin passage and facing the second oscillating coil, and a second receiving coil of the second receiving coil. A second detection / amplification circuit that outputs a second envelope signal by detecting and amplifying the output signal and a different window corresponding to the type of coin are set, and the second envelope signal enters the window. A second plurality of window circuits each of which generates a pulse signal which sometimes rises and falls when it goes out of the window; a counter circuit which counts the pulse signals output from the second plurality of window circuits; It is characterized by comprising a judging circuit for judging whether the coin is true or false and the type thereof based on the output of the timer circuit and the count value of the counter circuit.

(Operation) According to the first aspect of the invention, the authenticity and type of coins are determined based on the outputs of the timer circuit and the counter circuit.
For example, when the detected coin is a true coin, the output of the detection amplification circuit gradually decreases as the coin passes, and after reaching the peak value corresponding to the detected coin, that is, a preset allowable range (window). When it rises again, it returns to the original level. Here, the pulse width of the pulse signal output from the window circuit is different when the output of the receiving coil reaches the above-mentioned allowable range (window) and when it simply crosses another window. Therefore, in the present invention, the pulse width of the pulse signal is monitored by the timer means.

Also, before the output of the detection amplification circuit reaches the peak value, n
If the number of windows is crossed, the window circuit generates n pulses until this peak value is reached, and one pulse is generated in the window corresponding to this peak value. N pulses are generated and the count value of the counter circuit becomes an odd number (2n + 1). Here, the value (2n + 1) differs depending on the type of detected coin.

On the other hand, when the detected coin is a false coin, the output of the detection amplification circuit does not reach any window or only crosses the window as the coin passes, so the count value of the counter circuit in this case is It is an even number of 2m (m is 0 or an integer).

Therefore, in the present invention, the authenticity of the detected coin and the type of the detected coin are determined based on both the output of the timer circuit and the count value of the counter circuit.

According to the second invention, the coin passage is provided with a first oscillation coil exemplified by the signal of the first frequency and a second oscillation coil excited by the signal of the second frequency. The first receiving coil and the second receiving coil are provided so as to face the first oscillating coil and the second oscillating coil, and the authenticity of the coin and the type of the coin are determined by the output of the timer circuit based on the output of the first receiving coil Further, the authenticity of the coin and the type are determined by the output of the counter circuit based on the output of the second receiving coil. Then, a comprehensive determination is made by the determination circuit corresponding to the determination results of both based on the output of the timer circuit and the output of the counter circuit. With such a configuration, it is possible to discriminate the authenticity / counterfeit and the type of coins using these two different frequencies, and it is possible to discriminate the authenticity / counterfeit and the type of coins with high accuracy.

(Embodiment) FIG. 1 shows an embodiment of the coin sorting device of the present invention. In FIG. 1, an oscillating coil 4 excited by an output of an oscillator 3 is arranged on one side of a coin passage 1. Here, the oscillation frequency of the oscillator 3 varies depending on the property of interest (material, shape, etc.) with respect to the coin 2 to be detected.

A receiving coil 5 is arranged on the other side of the coin passage 1 so as to face the oscillation coil 4. In this embodiment, the coin 2 is output based on the envelope signal of the output signal of the receiving coil 5, that is, the output signal of the receiving coil 5, which is generated when the coin 2 passes through the arrangement portion of the oscillation passage 4 and the receiving coil 5 of the coin passage 1. The authenticity and the type are discriminated.

The output signal of the reception coil 5 is detected and amplified by the detection amplification circuit 6, and the envelope signal of the output signal of the reception coil 5 is extracted. This envelope signal has window circuits 7, 8, 9,
Added to 10. A for each of the window circuits 7, 8, 9 and 10
An allowable range of peak values of envelope signals corresponding to coins, B coins, C coins, and D coins, that is, windows are set, and window circuits 7, 8, 9, and 10 are envelope signals output from the detection amplification circuit 6. Generates a pulse signal that rises when it enters the window and falls when it exits the window. The window circuits 7, 8, 9 and 10 can be configured by known window comparators.

The outputs of the window circuits 7, 8, 9, 10 are applied to timers 11, 12, 13, 14 respectively.

The timer circuits 11, 12, 13, and 14 start timing operation when the input pulse rises, and set the timer time respectively.
If the pulse signal does not fall even after the passage of T ₁ , T ₂ , T ₃ , and T ₄ , a high level signal is output.

Here, when a high-level signal is output from the timer circuit 11 as the coin 2 passes through the arrangement portion of the oscillation coil 4 and the receiving coil 5, it is determined that the coin is an A coin, and the timer circuit 12 outputs the high-level signal. When the signal is output, it is determined to be a B coin, when the timer circuit 13 outputs a high level signal, it is determined to be a C coin, and when the timer circuit 14 outputs a high level signal, it is determined to be a D coin. .

If no high-level signal is output from any of the timer circuits 11, 12, 13, and 14, the coin 2 is determined to be a fake coin in this case.

2 to 5 show envelope signals output from the detection and amplification circuit 6 as genuine coin A, coin B, coin C, and coin D pass through the arrangement part of the oscillation coil 4 and the reception coil 5, respectively. The output pulses of the window circuits 7, 8, 9 and 10 are shown. 2 to 5, windows A, B, C and D are A coins, B coins, C coins,
The allowable range of the peak value of the envelope signal corresponding to the D coin is shown. Moreover, FIG. 2 (b) (c) (d) (e), FIG.
Figures (b) (c) (d) (e) and Figures 4 (b) (c)
(D) (e) and FIGS. 5 (b) (c) (d) (e) show the output pulses of the window circuits 7, 8, 9 and 10, respectively.

First, in the case of A coin, as shown in FIG. 2, the output of the detection / amplification circuit 6 is attenuated to the window A, and then returns to the original level even if it rises. That is, in this case, the output of the detection amplification circuit 6 does not cross the windows B, C and D corresponding to other coins at all, so that the window circuit 7 outputs only one pulse.

Since the pulse width of the output pulse of the window circuit 7 in this case is larger than the set pulse width T ₁ of the timer circuit 11,
Only 11 will output a high level signal.

In the case of a B coin, as shown in FIG.
Output decays to window B and then rises back to its original level. Here, the output of the detection / amplification circuit 6 crosses the window A once when it attenuates and when it rises.

In this case, since the pulse width of the output pulse of the window circuit 7 is smaller than the set pulse width T _{1 of the} timer circuit 11, no high level signal is generated from the timer circuit 11.

However, since the pulse width of the pulse output from the window circuit 8 becomes larger than the set pulse width T _{2 of} the timer circuit 12, a high level signal is generated from the timer circuit 12. Eventually, the high-level signal is generated only from the timer circuit 12.

In the case of C coin, as shown in FIG.
Output decays to window C and then rises back to its original level. Here, the output of the detection / amplification circuit 6 crosses the windows A and B when it attenuates, and crosses the windows A and B again when it rises.

In this case, since the pulse widths of the output pulses of the window circuits 7 and 8 are both smaller than the set pulse widths T ₁ and T _{2 of} the timer circuits 11 and 12, high-level signals are generated from the timer circuits 11 and 12. Absent.

However, since the pulse width of the pulse output from the window circuit 9 is larger than the set pulse width T _{3 of} the timer circuit 13, a high level signal is generated from the timer circuit 13. Eventually, the high level signal is generated only from the timer circuit 13.

Further, in the case of a D coin, as shown in FIG. 5, the output of the detection / amplification circuit 6 is attenuated to the window D and then returns to the original level. Here, the output of the detection / amplification circuit 6 crosses the windows A, B and C when it attenuates, and again crosses A, B and C when it rises.

In this case, the pulse widths of the output pulses of the window circuits 7, 8 and 9 are all set pulse widths T ₁ , T _{2 of} the timer circuits 11, 12 and 13,
Since it is smaller than T _3, no high level signal is generated from the timer circuits 11, 12 and 13.

However, since the pulse width of the pulse output from the window circuit 10 becomes larger than the set pulse width T _{4 of} the timer circuit 14, a high level signal is generated from the timer circuit 14. Eventually, the high level signal is generated only from the timer circuit 14.

Thus, when the coin passing through the coin passage 1 is the coin A, a high level signal is generated only from the timer circuit 11,
In the case of a coin, a high level signal is generated only from the timer circuit 12, in the case of a C coin, a high level signal is generated only from the timer circuit 13, and in the case of a D coin, a high level signal is generated only from the timer circuit 14.

FIG. 6 shows a case where the coin 2 passing through the coin passage 1 is a false coin. If the coin 2 passing through the coin passage 1 is a false coin, the peak value of the output of the detection amplification circuit 6 is the window A,
Neither B, C nor D can be entered. For example, as shown in FIG. 6, the output of the detection amplification circuit 6 returns to the original level when it crosses the windows A and B. In this case, the pulse widths of the pulses output from the window circuits 7 and 8 are the timer circuits 11 and 12, respectively.
The pulse width becomes smaller than the set pulse widths T ₁ and T _{2 of} , and eventually, no high level signal is generated from any of the timer circuits.

In this way, when the coin passing through the coin passage 1 is a false coin, no high-level signal is generated from any of the timer circuits 11, 12, 13, and 14.

The outputs of the timer circuits 11, 12, 13, and 14 are AND circuits AN, respectively.
Added to 1, AN2, AN3, AN4.

The outputs of the window circuits 7, 8, 9 and 10 are applied to the counter 15 via the OR circuit OR1. The counter 15 is provided with a suitable means before the coins enter the oscillating coil 4 and the receiving coil 5. The count value is reset, and the number of pulses generated from the window circuits 7, 8, 9, 10 is counted as the coin 1 passes through the arrangement portion of the oscillation coil 4 and the reception coil 5. .

FIGS. 7 to 10 show envelope signals output from the detection amplification circuit 6 as the true coin A, B coin, C coin, and D coin pass through the arrangement portion of the oscillation coil 4 and the reception coil 5, respectively. The output pulses of the window circuits 7, 8, 9 and 10 are shown. In FIGS. 7 to 10, windows A, B, C, D are coins A, B, C,
The allowable range of the peak value of the envelope signal corresponding to the D coin is shown. In addition, FIG. 7 (b) (c) (d) (e), FIG.
Figures (b) (c) (d) (e) and Figures 9 (b) (c)
(D) (e) and FIGS. 10 (b) (c) (d) (e) show the output pulses of the window circuits 7, 8, 9 and 10, respectively.

First, in the case of A coin, as shown in FIG. 7, the output of the detection / amplification circuit 6 is attenuated to the window A, and then returns to the original level even if it rises. That is, in this case, the envelope signal output from the detection amplification circuit 6 does not cross the windows B, C, and D corresponding to other coins at all, so that only one pulse is output from the window circuit 7.

Therefore, the count value of the counter 15 in this case is "1".

In the case of a B coin, as shown in FIG.
Output decays to window B and then rises back to its original level. Here, the output of the detection / amplification circuit 6 crosses the window A once when it attenuates and when it rises.

Therefore, in this case, two pulses are output from the window circuit 7 and one pulse is output from the window circuit 8, and the count value of the counter 15 becomes "3".

In case of C coin, as shown in FIG.
Output decays to window C and then rises back to its original level. Here, the output of the detection / amplification circuit 6 crosses the windows A and B when it attenuates, and crosses the windows A and B again when it rises.

Therefore, in this case, two pulses are output from each of the window circuits 7 and 8 and one pulse is output from the window circuit 9, and the count value of the counter 15 becomes "5".

Further, in the case of a D coin, as shown in FIG. 10, the output of the detection / amplification circuit 6 is attenuated to the window D and then returns to the original level. Here, the output of the detection / amplification circuit 6 crosses the windows A, B, and C when it attenuates, and crosses the windows A, B, and C again when it rises.

Therefore, in this case, each of the window circuits 7, 8 and 9 outputs two pulses and the window circuit 10 outputs one pulse, and the count value of the counter 15 becomes "7".

As described above, when the coin passing through the coin passage 1 is the A coin, the count value of the counter 15 is "1", the count value of the counter 15 is "3" when the coin is B coin, and the count value of the counter 15 is C coin. The count value of the counter 15 is "5", and the count value of the counter 15 is "7" for the D coin. Then, the count values are all odd numbers.

FIG. 11 shows a case where the coin passing through the coin passage 1 is a false coin. When the coin 2 passing through the coin passage 1 is a false coin, the peak of the output of the detection amplification circuit 6 is the windows A and B,
Neither in C nor D. For example, as shown in FIG. 11, the output of the detection amplification circuit 6 returns to the original level when it crosses the windows A and B.

In this case, two pulses are output from each of the window circuits 7 and 8 and the count value of the counter 15 becomes "4".

In this way, when the coin passing through the coin passage 1 is a false coin, the count value of the counter 15 becomes an even number.

The output of the counter 15 is added to the decoder 16. decoder
When the count value of the counter 15 is "1", 16 outputs a signal indicating the detection of A coin, "3" outputs a signal indicating the detection of B coin, and "5" indicates a C coin. The signal indicating the detection of D coin is output when it is "7". Further, the decoder 16 outputs a false coin signal indicating that the inserted coin is a false coin when the count value of the counter 15 is an even number.

A signal output from the decoder 16 indicating the detection of A coin, B
A signal indicating the detection of coins, a signal indicating the detection of C coins, and a signal indicating the detection of D coins are AND circuits AN1, AN2, AN, respectively.
3, Added to other inputs of AN4.

Therefore, from AND circuit AN1
The A coin signal indicating the detection of the A coin is output only when the coin is determined and the counter 15 and the decoder 16 determine the A coin.

The AND circuit AN2 outputs the B coin signal indicating the detection of the B coin only when the timer 12 determines the B coin and the counter 15 and the decoder 16 determine the B coin.

The AND circuit AN3 outputs the C coin signal indicating the detection of the C coin only when the timer 13 determines that the coin is a C coin and the counter 15 and the decoder 16 determine that the C coin is a C coin.

Further, the AND circuit AN4 outputs the D coin signal indicating the detection of the D coin only when the timer 14 determines the D coin and the counter 15 and the decoder 16 determine the D coin.

In this way, the A coin signal, the B coin signal, the C coin signal, the D coin signal output from the AND circuits AN1 to AN4 and the false coin signal output from the decoder 16 are added to the coin sorting unit (not shown), and the true coins are transferred. Used for sorting counterfeit coins and denominations.

In the embodiment shown in FIG. 1, the timer circuits 11,1
Although the set times of 2, 13, and 14 are set separately as T ₁ , T ₂ , T ₃ , and T ₄ , respectively, they may be set to the same value.

Further, in the embodiment shown in FIG. 1, the false coin signal is obtained from the even output of the decoder 16.
It is also possible to provide an AND circuit (not shown) that takes the AND condition of each inverted output of ~ 14, and generate a false coin signal from the output of this AND circuit. You may make it obtain a fake coin signal from.

FIG. 12 shows another embodiment of the present invention.

In this embodiment, an oscillating coil 4 excited by an oscillator 3 is arranged on one side of the coin passage 1 and an oscillating coil 4'excited by an oscillator 3'is arranged on the other side of the coin passage 1. The receiving coil 5 is arranged facing the oscillation coil 4 and the receiving coil 5'is arranged facing the oscillation coil 4 '. Then, the output of the receiving coil 5 is applied to the window circuits 7, 8, 9, 10 via the detection / amplification circuit 6, and the receiving coil 5 '
Output from the window circuit 7 ', 8',
Add to 9 ', 10'. That is, in this embodiment, two pairs of the oscillating coil and the receiving coil are provided along the coin passage 1, and the window circuits 7 to 10 and the window circuits 7 'to 7' 10 'is provided. Here, the oscillating coils 4 and 4'are excited at different frequencies, and the window circuits 7 to 10 and the window circuits 7'to 10 'have different windows corresponding to the respective frequencies.

In this embodiment, window circuits 7,8,9,10 and timer circuits 11,12,1
3,14 determine A coin, B coin, C coin, D coin, and window circuit 7 ', 8', 9 ', 10', counter 15, decoder 16 A coin, B coin, C coin , D coin is determined and AND condition of the output of the timer circuit 11, 12, 13, 14 and the output of the decoder 16 is taken. From the AND circuit AN1, AN2, AN3, AN4, respectively, A coin signal, B coin signal, C coin. Signal, D coin signal is obtained.

The basic operation of the embodiment shown in FIG. 12 is the same as that shown in FIG. 1 except that the oscillating coils 4 and 4'excited at different frequencies and the receiving coils 5 and 5'opposed thereto are used. It is the same as shown.

However, according to the embodiment shown in FIG. 12, the window circuit 7,8,9,1
0, the timer circuits 11, 12, 13, and 14 and the window circuits 7 ', 8', 9 ', 10', the counter 15, and the decoder 16 use different frequencies.
Highly accurate discrimination can be expected as compared with the embodiment shown in FIG.

FIGS. 13 and 14 show another embodiment in which a part of the circuit is configured by using a central processing unit (CPU). The embodiment shown in FIGS. 13 and 14 functionally performs the same function as that shown in FIG.

That is, the embodiment shown in FIG. 13 is different from the embodiment shown in FIG. 1 in that the timer circuits 11-14, the OR circuit OR1, the counter 15,
The decoder 16 and AND circuits AN1 to AN4 are replaced by a CPU 17.

In the embodiment shown in FIG. 14, the output of the detection / amplification circuit 6 is converted into a digital signal by the analog-digital converter 18 and added to the CPU 17. In this embodiment,
In addition to the timer circuits 11 to 14, the OR circuit OR1, the counter 15, the decorer 16, and the AND circuits AN1 to AN4 shown in FIG. 1, the CPU 17 is provided with the functions of the window circuits 7 to 10.

In each of the above examples, the coins to be sorted are A coins and B coins.
There are four denominations of coins, C coins and D coins, but the number of denominations is arbitrary.

(Effects of the Invention) As described above, according to the present invention, it is possible to provide a coin sorting device with few malfunctions, and it is possible to greatly simplify the configuration by eliminating the need for a peak value detection circuit. Moreover, since the authenticity and the type of the coin are determined based on the output of the timer circuit and the output of the counter circuit, the determination can be performed with high accuracy. Further, by performing the determination based on the output of the timer circuit and the output of the counter circuit by using different frequencies, it is possible to further improve the accuracy of determining the authenticity and type of coins.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 to 11 are waveform charts for explaining the operation of the embodiment shown in FIG. 1, FIG. 12, FIG. 13, and FIG. Is a block diagram showing another embodiment of the present invention, and FIGS. 15 to 17 are waveform charts for explaining the operation of the conventional device. 1 ... coin passage, 2 ... coins, 3 ... oscillator, 4 ... oscillation coil, 5 ... reception coil, 6 ... detection amplification circuit, 7,
8,9,10 …… Window circuit, 11,12,13,14 …… Timer circuit, 15
…… Counter, 16 …… Decoder, 17 …… CPU, 18 …… A / D
converter.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Osamu Kobayashi 25-22-22 Gomigaya, Tsurugashima-cho, Iruma-gun, Saitama Prefecture (56) References JP-A-58-20281 (JP, A) JP-A-51-2498 (JP) , A) Japanese Patent Publication No. 58-6985 (JP, B2)

Claims (2)

[Claims] 1. An oscillating coil disposed in a coin passage and excited by a signal of a predetermined frequency; a receiving coil disposed across the coin passage and facing the oscillating coil; By detecting and amplifying the output signal of
A detection / amplification circuit that outputs an envelope signal of the output signal and a different window corresponding to the type of coin are set, and the pulse rises when the envelope signal enters the window and falls when the envelope signal exits the window. A plurality of window circuits that respectively generate signals, and a plurality of timer circuits that respectively input the pulse signals output from the plurality of window circuits and output the signals when the pulse width of the pulse signals exceeds a predetermined pulse width A counter circuit that counts pulse signals output from the plurality of window circuits, and a determination circuit that determines the authenticity and type of coins based on the output of the timer circuit and the count value of the counter circuit. A coin sorting device. 2. A first oscillating coil arranged in the coin passage and excited by a signal of a first frequency; and a first oscillating coil sandwiching the coin passage and facing the first oscillating coil. A first receiver coil, a first detector / amplifier circuit that outputs a first envelope signal by detecting and amplifying an output signal of the first receiver coil, and different windows corresponding to the types of coins are set. A plurality of window circuits that generate pulse signals that rise when the first envelope signal enters the window and fall when the first envelope signal exits the window; and the first plurality of window circuits. A plurality of timer circuits each of which receives a pulse signal output from each of them and outputs a signal when the pulse width of the pulse signal exceeds a predetermined pulse width; and a signal of a second frequency disposed in the coin passage. By A second oscillating coil which is magnetized; a second receiving coil which is disposed so as to sandwich the coin passage and which faces the second oscillating coil; and an output signal of the second receiving coil is detected and amplified. By doing so, a second detection amplification circuit that outputs a second envelope signal and a different window corresponding to the type of coin are set, and rises when the second envelope signal enters the window, A second plurality of window circuits each generating a pulse signal that falls when exiting from a window, a counter circuit that counts the pulse signals output from the second plurality of window circuits, and an output of the timer circuit and A coin sorting device, comprising: a determination circuit for determining whether the coin is authentic or false based on the count value of the counter circuit.