JPH06105863B2 - Attenuator for signal generator - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an attenuation device for a signal generator used as a measurement signal source or the like in electronic measurement.

2. Description of the Related Art FIG. 4 shows the configuration of a conventional signal generator attenuator. In FIG. 4, reference numeral 1 is a signal generating circuit, which is connected to the output level adjusting circuit 100 via a resistor 2.
The output level adjusting circuit 100 is composed of a relay 3 for output level control in which two contacts move and operates and a π-type attenuating circuit 4, and the similar output level adjusting circuit 100 is provided according to the required output level range and resolution of this device. A plurality of output level adjusting circuits having a configuration are connected in series. In FIG. 4, the intermediate output level adjusting circuit is omitted, and only the first stage output level adjusting circuit 100 and the last stage output level adjusting circuit 200 are shown. Therefore, the output level adjusting circuit 200 at the final stage is also composed of the output level controlling relay 5 and the π-type attenuating circuit 6 in which the two contacts move to operate, and the output level controlling relay 5 outputs the output signal. It is connected to the breaking relay 8. A resistor 7 is selectively connected to the relay 8,
It is connected to the output terminal 10 via the internal circuit protection relay 9. An electronic measuring device (not shown) connected to the outside of the device is connected to the output terminal 10.
The measurement signal is output to the electronic measuring instrument. Reference numeral 11 denotes a reverse input signal detection circuit, which detects that an excessive signal is erroneously input to the output terminal 10 from the external electronic measuring instrument, and the detection signal C is supplied to the read driver 12. The relays 3, 5 and 8 are controlled by relay drivers 13, 14 and 15 which receive control signals D, E and F, respectively, and the relay 9 is controlled by a relay driver 12.

FIG. 5 shows an embodiment of the reverse input detection circuit 11. In FIG. 5, one end of the resistor 21 is connected to the output terminal 10 in FIG. The other end of resistor 21 is ground resistor 2
2. Connected to the anode of the detection diode 23 and the cathode of the detection diode 29. The cathode of the diode 23 includes a detection capacitor 24, a resistor 25 and a comparator 28.
Is connected to the-terminal. Similarly, the anode of the diode 29 is connected to the detection capacitor 30, the resistor 31, and the + terminal of the comparator 34. The voltage dividing points of the resistors 26 and 27 connected between + V and ground are connected to the + terminal of the comparator 28 and −.
The voltage dividing points of the resistors 32 and 33 connected between V and ground are connected to the minus terminal of the comparator 34, respectively. Comparators 28 and 34
Is output to the relay driver 12 shown in FIG. 4 as a detection signal C.

Next, the operation of the above conventional example will be described. In the reverse input signal detection circuit 11 shown in FIG. 5, the signal B is divided by the resistors 21 and 22, and the positive peak is generated by the diode 23, the capacitor 24, and the resistor 25, and the diode 29, the capacitor 30, and the resistor 31.
The negative peak is detected by. The detected positive peak value and the comparison voltage determined by the resistors 26 and 27 are compared by the comparator 28, and when the detected positive peak value is higher than the comparison voltage, the output C of the comparator 28 becomes zero. . Similarly, the detected negative peak value and the comparison voltage determined by the resistors 32 and 33 are compared by the comparator 34, and when the detected negative peak value is lower than the comparison voltage, the output C of the comparator 34 is It becomes 0. Therefore, the detection signal C is normally + V, but when an excessively large signal is erroneously applied to the output terminal 10 in FIG. 4, the detection signal C becomes 0. At this time, the resistor 21 in FIG.
Is set to a sufficiently high value to prevent the reverse input signal detection circuit 11 from being damaged by an excessive signal. Further, when the detection signal C becomes 0 in FIG. 4, the relay 9 is opened and the signal applied to the output terminal 10 is not transmitted to the circuit before the relay 8. Therefore, even if an excessive signal is erroneously applied to the output terminal 10, the internal circuit of the device is not damaged.

In FIG. 4, an excessive signal is not applied to the output terminal 10,
When the control signals D and E are set to 0 and F is set to + V, the signal A of the signal generating circuit 1 is supplied to the output terminal 10 via the resistor 2. In this state, the output level of the device is the maximum value, and the output impedance is the resistance 2 value. When the output level control signals D and E are set to + V from this state, the π-type attenuation circuits 4 and 6 are provided between the resistor 2 and the output terminal 10.
Is inserted, the output impedance of the device becomes equal to the value of resistor 2. Therefore, an output level adjusting circuit similar to the output level adjusting circuit 100 composed of the relay 3 and the π-type attenuating circuit 4 is connected in multiple stages between the resistor 2 and the relay 8 and the respective control signals are combined. Due to
The output impedance is constant and an arbitrary output level can be obtained.

When the output signal cutoff control signal F is set to 0, the signal generation circuit 1
Signal A is not transmitted to the output terminal 10 and only the resistor 7 is connected to the output terminal 10. At this time, if the value of the resistor 7 is made equal to the value of the resistor 2, the output impedance becomes constant even if the output signal of this device is cut off.

As described above, even in the conventional signal generator attenuator, the output signal interruption relay 8 and the internal circuit protection relay 9 are provided so that the output impedance of the signal obtained from the output terminal 10 is not limited in any case. Is constant,
When an excessive input is applied to the output terminal 10 by mistake, the internal circuit can be automatically protected.

DISCLOSURE OF INVENTION Problems to be Solved by the Invention However, in the above-described conventional signal generator attenuation device,
In addition to the output level control relays 3 and 5, it was necessary to add two relays, an output signal interruption relay 8 and an internal circuit protection relay 9. For this reason, the number of relays increases, and there are problems that reliability is reduced, costs are increased, an occupied space is increased, and an output level with a large amount of attenuation cannot be easily obtained.

The present invention solves such conventional problems,
It is an object of the present invention to provide an excellent attenuator for a signal generator having the same function as a conventional device without adding an output signal interruption relay and an internal circuit protection relay.

Means for Solving the Problems In order to achieve the above object, the present invention provides a signal generating circuit for generating a measurement signal of an electronic measuring instrument connected to an output terminal, and a plurality of stages connected in series to the signal generating circuit. Output level adjusting circuit, and first switch means for disconnecting the signal generating circuit and the output level adjusting circuits of the plurality of stages from the output terminal when an excessive signal is applied to the output terminal from the electronic measuring instrument. A second switch means for blocking the measurement signal to the output terminal and connecting the π-type attenuation circuit to the output terminal; and a detection signal when an excessive signal is applied from the electronic measuring instrument to the output terminal. By the detection means for outputting, the detection signal from the detection means and the cutoff signal for cutting off the measurement signal, and the control signal for controlling the output level,
It is provided with a control means for controlling the first switch means and the second switch means.

Action The present invention has the following actions due to the above configuration. That is, in a normal state, the two relays in the output level adjusting circuit at the final stage are interlocked by the relay control means and operate as an output level adjusting circuit. When the output signal is cut off, each of these relays operates independently to cut off the signal of the signal generating circuit from the output terminal.
When an excessive signal is erroneously applied to the output terminal, each of these relays operates independently to prevent the excessive signal applied to the output terminal from being transmitted to the internal circuit.

Embodiment FIG. 1 shows the structure of an embodiment of the present invention. In FIG. 1, the same elements as those in the conventional example are denoted by the same reference numerals, and a signal generation circuit 1, a resistor 2, a relay 3, π-type attenuation circuits 4 and 6, an output terminal 10, a reverse input signal detection circuit. 11. The relay driver 13 has the same configuration and operation as the conventional example shown in FIGS. 4 and 5, and the control of the control signals D, E, F is also the same. Output level adjustment circuit at the final stage
201 is composed of independent relays 41 and 42 and a π-type attenuation circuit 6, and the relays 41 and 42 are individually controlled by relay drivers 45 and 44. Control signals J and H for individually controlling the relay drivers 45 and 44
Is an output signal of the relay control means 43 which receives the detection signal C and the control signals E and F as inputs.

FIG. 2 shows an embodiment of the relay control means 43. In FIG. 2, the NAND circuit 51 receives the detection signal C and the control signal F, and the NOT circuit 52 receives the output of the NAND circuit 51. The NOT circuit 53 receives the control signal E as an input. N
The AND circuit 54 receives the outputs of the NOT circuits 52 and 53, and the NAND circuit 55 receives the control signal E and the output of the NOT circuit 52. N
The AND circuit 56 receives the detection signal C and the output of the NAND circuit 54, and the NAND circuit 57 receives the detection signal C and the output of the NAND circuit 54. The NOT circuit 58 receives the output of the NAND circuit 56 as an input, and the output signal H of the NOT circuit 58 and the output signal J of the NAND circuit 57 become the control signals of the relay drivers 44 and 45 in FIG.

Next, the operation of the above embodiment will be described. A truth table of the relay control means 43 shown in FIG. 2 is shown in FIG. In FIG. 3, the part "1" indicates + V. In FIG. 1, when an excessive input is mistakenly applied from an electronic measuring device (not shown) connected to the output terminal 10, the detection signal C of the reverse input signal detection circuit 11 is 0 as described in the description of the conventional example. become. When the detection signal C becomes 0, the output signal H of the relay control means 43 becomes 0 and J becomes + V as shown in FIG. Therefore, the relay 41 is connected to the lower contact, the relay 42 is connected to the upper contact, respectively, the excessive signal applied to the output terminal 10 is not transmitted to the internal circuits other than the reverse input signal detection circuit 11, It is possible to prevent damage to the internal circuit.

When the excessive input is not applied to the output terminal 10, the detection signal C becomes + V. When the control signals D and E are set to 0 and F is set to 1 in this state, the output signals H and J of the relay control means 43 become 0 according to FIG. Therefore, relays 3 and 4
1, 42 are all connected to the upper contact, and the signal A of the signal generating circuit 1 is supplied to the output terminal 10 via the resistor 2. In this state, the output signal of the device has the maximum value, and the output impedance has the value of the resistor 2. Similar to the conventional device, if the output level control signals D and E are set to + V from this state, the π-type attenuation circuits 4 and 6 are inserted between the resistor 2 and the output terminal 10 to make the output impedance of the device constant. The output level is attenuated while keeping it. Therefore,
Between the resistor 2 and the relay 41, the relay 3 and the π-type attenuation circuit 4
By connecting a circuit equivalent to the output level adjusting circuit 100 composed of and in multiple stages and combining the respective control signals, it is possible to set an arbitrary output level without changing the output impedance.

When the signal from the signal generating circuit 1 is cut off to the electronic measuring device (not shown) connected to the output terminal 10 from the above state, the output signal cut-off signal F is set to 0, and the relay control is performed according to FIG. The output signal H of the means 43 becomes + V and J becomes 0. Therefore, the relay 41 is connected to the upper contact and the relay 42 is connected to the lower contact. Therefore, the signal A from the signal generating circuit 1 is not supplied to the output terminal 10, and the π-type attenuating circuit 6 is simply connected to the output terminal 10. At this time, assuming that the value of the resistor 2 is R [Ω] and the attenuation amount of the π-type attenuation circuit 6 is A [dB], the combined resistance value R _A [Ω] of the π-type attenuation circuit 6 viewed from the output terminal 10 is It is calculated by the following equation (1).

It can be seen that the combined resistance R _A is approximately equal to the value of R. For example, assuming that the attenuation amount A is 20 dB, the combined resistance value R _A can be calculated from the equation (1).
Is calculated as follows.

That is, the combined resistance value of the π-type attenuation circuit 6 is only + 2% different from the value of the resistor 2. Therefore, even if the output signal of the device is cut off, the output impedance can be kept substantially constant.

As described above, according to the above-described embodiment, the output level control relay at the final stage, which is conventionally linked, is divided into two independent relays 41 and 42, and these relays 41 and 42 are separated by the relay control means 43. By controlling, it is possible to save the output signal interruption relay and the internal circuit protection relay, which have been required in the past, and to keep the impedance of the output signal constant in any case. Even if an excessive signal is applied, the internal circuit can be automatically protected. Further, since the output level control relay at the final stage is divided, it is possible to easily realize an output level adjusting circuit with a large amount of attenuation.

EFFECTS OF THE INVENTION The present invention has the following effects, as is apparent from the above-mentioned embodiments.

(1) Since the number of relays can be reduced as compared with the conventional device, reliability is improved.

(2) Since the number of relays can be reduced, it can contribute to lower prices.

(3) Since the output level control relay at the final stage is divided, an output level adjusting circuit with a large amount of attenuation can be realized relatively easily.

[Brief description of drawings]

FIG. 1 is a schematic block diagram of an attenuator for a signal generator in an embodiment of the present invention, FIG. 2 is a circuit diagram showing an embodiment of a relay control means in the same, and FIG. 3 is a truth value in the same. FIG. 4 is a schematic block diagram of a conventional signal generator attenuator, and FIG. 5 is a circuit diagram of a reverse input signal detection circuit in the conventional device. 1 ... Signal generation circuit, 2 ... resistor, 3,41,42 ... output level control relay, 4,6 ... attenuation circuit, 10 ... output terminal, 11 ... reverse input signal detection circuit, 13, 44, 45 …… Relay driver, 43 …… Relay control means, 100 …… First stage output level adjusting circuit, 201 …… Final stage output level adjusting circuit.

Claims (1)

[Claims] 1. A signal generating circuit connected to an output terminal for generating a measuring signal of an electronic measuring instrument, a plurality of stages of output level adjusting circuits connected in series to the signal generating circuit, and the electronic terminal connected to the output terminal. First switch means for disconnecting the signal generating circuit, the output level adjusting circuits of the plurality of stages, and the output terminal when an excessive signal is applied from a measuring device;
Second switch means for blocking the measurement signal to the output terminal and connecting the π-type attenuation circuit and the output terminal, and outputting a detection signal when an excessive signal is applied from the electronic measuring instrument to the output terminal Control means for controlling the first switch means and the second switch means by means of a detection means for controlling the first switch means and a control signal for controlling the output level and a control signal for controlling the output signal and the detection signal from the detection means. An attenuator for a signal generator, comprising: