JPH061308B2 - Matrix display - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an improvement of a so-called “active matrix display device” having a switching element in each pixel, and relates to a technique of obtaining stable display with a simple electric circuit.

[Conventional technology and problems]

In recent years, active matrix type display devices have been actively developed. This method is described in the following paper (Bernard.J.Lech
ner et al .; proceedings of the IEEE, 59p. 1566 ~ 1579 (19
71)) is known, and switching elements such as transistors and non-linear resistance elements of the storage type are connected to the display elements of each pixel to create high resolution even for display elements with poor threshold characteristics such as liquid crystals. The matrix display can be made possible. The driving method is roughly classified into a dot-sequential method and a line-sequential method. J. It is known in the paper by Lechner et al. (P. 1570), and the dot-sequential method is described in detail in JP-A-49 / 49
-748Fig. 6, etc., but FIG. 1, FIG.
The prior art will be described with reference to FIG.

First, the dot-sequential method will be described with reference to FIGS. 1 and 2.
The figure is a block circuit diagram of a conventional display device, in which 1 is a display unit, and row electrodes C1, C2, ..., CN and column electrodes R1, R
2, ..., RM, and active elements 2 and display elements 3 arranged corresponding to the intersections. Reference numeral 8 denotes a row driving unit, which supplies the time-divided scanning signals to the row electrodes. A column driving unit 9 supplies a data signal to the column electrodes. In the case of the dot-sequential method, the column driving unit 9 includes the sampling pulse generating circuit 7, the switch gate 6, and the storage capacitor 5.

FIG. 2 is a timing chart thereof, in which the serial image signal VD has sampling pulses S1, S2, ...
..., 1 by SM and scan signals C1, C2, ..., CN
It is transmitted to the display element of one pixel.

Next, a driving method based on the line sequential method will be described with reference to FIG.

The difference from FIG. 1 is the portion of the column driving unit 9 indicated by 30. In the dot-sequential method, the video signal VD is directly transmitted to the column electrode by the switch gate 6, but in the line-sequential method, the first analog latch 31 is first latched on the basis of the sampling pulse generator 7 for timing adjustment. It latches in the 2nd analog latch 32 collectively. The latched data is supplied to each column electrode through the amplifier 33.

In the above-mentioned conventional techniques, the dot-sequential driving method has a simple circuit, but on the other hand, the writing time for each column electrode is not constant and the writing time for each display element is short. On the other hand, in the line-sequential driving method, the writing time is constant and can be sufficiently long, but the circuit becomes complicated. The driving method of the previous application (Japanese Patent Application No. 58-032169) has been proposed as a method of solving these drawbacks.

FIG. 4 is a block diagram of an NLR type active matrix display device of Japanese Patent Application No. 58-032169 using a non-linear resistance element.

113 is a display unit, the row electrodes _Y I to Y _N column electrodes _{X I}
A display element 118 consisting to X _M and the display device 117 and the NLR elements 116 are connected to each matrix electrodes. FIG. 5 is an explanatory diagram of the non-linear resistance element, and the NLR element 12
5 is 126, 127, 12 in Japanese Patent Application No. 58-032169.
A diode ring such as 8 is used.

FIG. 6 is a typical current-voltage characteristic diagram of a non-linear resistance element, which is substantially symmetrical in positive and negative, and changes in an exponential law in a low voltage region and in a proportional law in a higher voltage region.

In FIG. 4, 112 is a column electrode drive circuit, and 119 is a video modulation circuit. A block diagram thereof and an example of electric waveforms are shown in FIGS. 7 and 8. VD is the input video signal, _{V S} is approximately half the reference potential maximum Fuhaba of VD, CL1
Is a clock signal that is inverted at the selection timing for each row. The video signal VD becomes a signal which is inverted every 1H centered around 0 such as VD 'by the amplifiers 146 and 147 and the switches 141 and 142, and is like a _VIN signal by the amplifier 143 whose gain is controlled by the compensation circuit output. Become a signal.

A timing pulse generation circuit 144 sequentially selects the switch group 145 based on the clock signal CL2, connects the video signal line V _IN to each column electrode X ₁ , X ₂ , X ₃ , ..., and outputs a signal to each electrode capacitance. Accumulate. FIG. 11 is a drive waveform diagram, an example of the accumulated data signal is X _m ,
-V _d is non-lighting level in a row timing, if V _d is lit level, next V _d is non-lighting level in row timing, signal -V _d is the polarity inverted every 1H and so lighting levels and Has become.

9 and 10 are a block diagram and a waveform diagram of the row electrode drive circuit. The circuit 11 to the row electrodes FIG Y _a-2,
A scanning signal whose polarity is inverted row by row such as Y _n-1 , Y _n and Y _{n + 1} is supplied. Reference numeral 161 is a shift pulse generator configured by a shift register, a decoder, or the like.
B1, B2, ... Are generated based on 1, A2. According to the clock pulses A1, A2, CL1 and B1, B2, ..., The logic circuit 162 has C (1,1-4), C (2,1).
4) and other pulses are supplied to the potential selection circuit 163.

163 shows the potentials ± V _a and ± shown at Y _n-2 in FIG.
V _b or a potential proportional to this is supplied, and C (n,
1 to 4).

164 is an output stage buffer amplifier, and Y _{I to} Y _n are applied to the display unit 113.

One of the features of Japanese Patent Application No. 58-032169 lies in the scanning signal. For example, regarding Y _n , the selection periods 181 and 182
And non-selection periods 183 and 184, and the former is ± V _a ,
In the latter case, the potential is ± V _b . The selection period is line-sequentially scanned for each row electrode, but not for all 1H allocated to each, but only for the horizontal blanking interval. In the remaining horizontal scanning period, all scanning signals are not selected, and signals are written in the column electrode capacitors line-sequentially as described with reference to FIGS. 7 and 8. With such a configuration, the line-sequential drive does not require a sample-hold circuit as in the dot-sequential drive, and the difference in the charged electric charge occurs due to the difference in the effective writing time in each column like the dot-sequential drive. Absent.
Especially in the NLR matrix, the difference in writing time is a fatal drawback, and the point sequential method is impossible and the circuit is complicated, but according to Japanese Patent Application No. 58-032169, a circuit equivalent to the point sequential method is sufficient, which is very advantageous. became.

However, Japanese Patent Application No. 58-032169 also had some problems. That is, the column electrodes X ₁ , X ₂ , X _{3 in} FIG.
Each has an electrode capacitance and can store a data signal, but this electrode capacitance is generally provided as an external capacitor in the drive circuit or is substituted by the stray capacitance of the electrode itself. The former has a complicated circuit, and the latter is easily affected by the potential change of the adjacent electrode forming the stray capacitance and is unstable.

[Object of the Invention]

The gist of the present invention is to provide a reference electrode on the opposite side across the liquid crystal layer and to provide an appropriate reference signal to the liquid crystal in which a DC voltage is hard to be applied. The purpose is to give.

Example of Invention

FIG. 12 is a block diagram of an embodiment of the display device of the present invention. A display unit 113 is a liquid crystal panel in which liquid crystal is sandwiched between two substrates. Row electrodes Y ₁ , Y ₂ , ..., Y _N and NLR elements 116 are formed on one substrate, and column electrodes X ₁ , X ₂ , ..., X _M are formed on the other substrate. . The feature of this embodiment is that the row electrodes Y ₁ , Y ₂ ,
..., example electrodes X ₁ , X ₂ , ... on the substrate on which Y _N is formed.
The reference electrode 191 is provided at the portion facing X _M. Reference numeral 192 is a means for applying a reference signal to the reference electrode 191. By doing so, a capacitance having liquid crystal as a dielectric is added to each column electrode.

FIG. 13 is a block diagram of another embodiment of the display device of the present invention. Unlike the previous embodiment, in this embodiment, the row driving circuit is divided into the left half 111L and the right half 111R, and the column driving circuit is divided into the upper half 112V and the lower half 112D.
It is pulled out alternately for each book. Along with this, the reference electrode is also divided into two, 191L and 191R, and reference signals are supplied from the respective drive circuits 192L and 192R.

FIG. 14 is a plan view of the embodiment shown in FIG. 201 is an active substrate on which switching elements 207, display electrodes 206, row electrodes Y ₁ and Y ₂ are formed, 202 is a counter substrate on which column electrodes X ₁ , X ₂ , ... X _M are formed, 203
Is a sealing part, and the liquid crystal is enclosed in this inner part. Reference numeral 191 denotes a reference electrode, which is the active substrate 20.
The column electrode _X 1 on _1, X 2, ... _{X M} and a capacitor _C 1 by the opposing sides of the liquid crystal layer, ..., form a _{C M.}
The capacitance section 204 may be sufficiently smaller than the matrix section 205, and the area load is not large. Moreover, a uniform liquid crystal layer thickness has been sufficiently achieved by the current technology, and the variation in capacitance is sufficiently small. In this way, a uniform capacity is realized without any additional process.

If the reference electrode potential is constant, any value can act as a capacitance. However, because liquid crystal is used as the dielectric layer, care must be taken so that direct current is not applied to the liquid crystal. Moreover, in order to reduce the area of the capacitance portion, it is desired to use a large effective dielectric constant.

In the present invention, the reference signal φ as shown in FIG. 15 is used to satisfy the above requirements. That is, odd field F
1 and even field F2 are rectangular wave signals which are mutually inverted. The signal level is ± V _a . Such a reference signal φ
There is almost no direct current component between the column signal and the column signal, for example, X _m in FIG. 11, and a voltage sufficient to excite the liquid crystal is applied.

FIG. 16 is a characteristic diagram showing the relationship between the dielectric constant ε of the liquid crystal layer and the effective voltage V. When V <V _th with respect to the threshold voltage V _{th of the} liquid crystal, εε ₁ but ε increases and approaches ε ₁₁ in response to the application of V <V _th . In the drive waveform of FIG. 11, the bias voltage V _b
Since ε is set to the median value of the optical change of the liquid crystal, ε is not yet sufficiently large as shown in FIG. 16, but V _{a obtained} by adding the writing voltage to V _b is a voltage sufficient to excite the liquid crystal.

As described above, according to the present invention, it is possible to provide a sufficient capacitance in a small area by applying a signal having an effective voltage sufficient to excite the liquid crystal as the reference signal. In the present invention, as shown in FIG. 15, the selection potentials ± V _{a of the} scanning signals Y _{I to} Y _N.
Although a rectangular wave having a value of V _th is used, it is of course effective if other potentials are larger than V _th . However, the use of ± V _a is convenient because it is not necessary to increase the number of power supplies. Further, in the present invention, a signal that does not include a direct current component is used as the reference signal. This makes it possible to minimize the deterioration of the liquid crystal layer.

Alternatively, as the reference signal, for example, the zero potential 0 in the drive waveform of FIG. 11 may be used. In this case, the permittivity ε is not large but does not include the DC component.

〔The invention's effect〕

As described above, the present invention enables stable display by effectively using the liquid crystal layer as a capacitor, and enables high-density display with a simple drive circuit without any additional process.

Although a non-linear resistance element is used as the switching element in the embodiment, the same effect can be obtained by using a transistor.

[Brief description of drawings]

FIG. 1 is a block diagram of a conventional display device, FIG. 2 is a drive waveform diagram of the display device of FIG. 1, FIG. 3 is a block diagram of a display device using a conventional line-sequential method, and FIGS. Figure 11 shows the Japanese patent application
FIG. 4 is a block diagram of an NLR type active matrix display device using a nonlinear resistance element, and FIGS. 5 and 6 are explanatory diagrams of the nonlinear resistance element and its characteristics. FIGS. 7, 7 and 8 are circuit diagrams and waveform diagrams showing a video modulation circuit and a column electrode drive circuit, FIGS. 9 and 10 are row electrode drive circuits and waveform diagrams, FIG. 11 is a drive waveform diagram, FIG. 12 is a block diagram of one embodiment of the display device of the present invention, FIG. 13 is a block diagram of another embodiment of the display device of the present invention, and FIG. 14 is a plan view of the embodiment of FIG.
FIG. 15 is a waveform diagram of a reference signal used in the present invention, and FIG. 16 is a characteristic diagram of liquid crystal dielectric constant vs. effective voltage. X _{I to} X _N ... Column electrodes, Y _{I to} Y _M ... Row electrodes, 2 and 1
16 ... Switching element, 3, 117 ... Display element,
191 ... Reference electrode, φ ... Reference signal.

Claims (1)

[Claims] 1. A matrix display panel comprising a plurality of row electrodes, a plurality of column electrodes, and switching elements provided at respective intersections of the electrodes, a liquid crystal display element connected to the switching elements, and the row electrodes. In a matrix display device having a row driving circuit for supplying a line-sequential scanning signal and a column electrode driving circuit for supplying a data signal to the column electrodes, the column electrodes are provided via a liquid crystal layer constituting the liquid crystal display element. A matrix display device having a reference electrode opposed to the reference electrode, and a reference signal having an effective voltage value larger than a threshold voltage of liquid crystal is supplied between the reference electrode and the column electrode.