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JPH0613465A - Semiconductor device - Google Patents
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JPH0613465A - Semiconductor device - Google Patents

Semiconductor device

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Publication number
JPH0613465A
JPH0613465A JP16786292A JP16786292A JPH0613465A JP H0613465 A JPH0613465 A JP H0613465A JP 16786292 A JP16786292 A JP 16786292A JP 16786292 A JP16786292 A JP 16786292A JP H0613465 A JPH0613465 A JP H0613465A
Authority
JP
Japan
Prior art keywords
fuse
terminals
poly
cut
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16786292A
Other languages
Japanese (ja)
Other versions
JP2982497B2 (en
Inventor
Masanori Kobayashi
正典 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP4167862A priority Critical patent/JP2982497B2/en
Publication of JPH0613465A publication Critical patent/JPH0613465A/en
Application granted granted Critical
Publication of JP2982497B2 publication Critical patent/JP2982497B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

(57)【要約】 (修正有) 【目的】半導体集積回路内において安定して確実に切断
でき、かつ高い信頼性を有するヒューズを提供する。 【構成】ヒューズ102の構造はヒューズ材を交差させ
4つの端子104〜106を有し、対面する一対の端子
に高電圧を印加し別のもう一方の端子を電気的に切断す
るものである。高電圧により流れる電流経路にそってそ
の経路の両側にできる絶縁層で電流経路に交差するヒュ
ーズ材を電気的に切断する。 【効果】絶縁層の厚さは0.2μmほどあるので絶縁耐
圧も充分で高い長期信頼性を有しかつプロセス的にも特
殊工程を必要としない安価なヒューズである。
(57) [Summary] (Correction) [Purpose] To provide a fuse that can be stably and reliably cut in a semiconductor integrated circuit and that has high reliability. [Structure] The structure of a fuse 102 is such that a fuse material is crossed and has four terminals 104 to 106, a high voltage is applied to a pair of terminals facing each other, and another terminal is electrically cut. A fuse material intersecting the current path is electrically cut by insulating layers formed on both sides of the current path flowing by the high voltage. [Effect] Since the thickness of the insulating layer is about 0.2 μm, the fuse is an inexpensive fuse having a sufficient withstand voltage, high long-term reliability, and no special process step.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体集積回路のヒュー
ズ回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fuse circuit for a semiconductor integrated circuit.

【0002】[0002]

【従来の技術】半導体集積回路(以下ICと称す。)に
おいてICの外部より何らかの操作を行なうことによっ
てICの特性や機能を変更することがある。たとえばプ
ログラマブル・ロジック・デバイスやPROMは書き込
み操作によりユ−ザ−自身の思いのままの機能を達成す
ることができる。また、アナログICの特性を合わせ込
む場合にもそのIC特有の操作により個々に特性を合わ
せ込むことができるものがある。この様にICができあ
がった後に調整、あるいは機能の変更を行なう場合、従
来の主な技術としてはFAMOSやヒュ−ズがあった。
ヒュ−ズとしては従来昇華のしやすい金属NiCr、T
iW、PtSi等を用いている。図6に代表的なヒュ−
ズ回路を示す。ここで600はAL配線、601はPO
LY Siヒュ−ズで602はコンタクトである。AL
配線600の両端に高電圧を印加するとPOLY Si
ヒュ−ズ601に大電流が流れヒュ−ズは溶断する。
2. Description of the Related Art In a semiconductor integrated circuit (hereinafter referred to as an IC), the characteristics and functions of the IC may be changed by performing some operation from outside the IC. For example, a programmable logic device or a PROM can perform a user's own desired function by a write operation. Further, even when the characteristics of the analog ICs are matched, there is one in which the characteristics can be matched individually by an operation peculiar to the IC. When the adjustment or the change of the function is performed after the IC is completed in this way, there have been FAMOS and fuses as the conventional main techniques.
As a fuse, conventional metal such as NiCr, T, which is easily sublimated,
iW, PtSi, etc. are used. Fig. 6 shows a typical view
Circuit. Here, 600 is AL wiring and 601 is PO.
In the LY Si fuse, 602 is a contact. AL
When a high voltage is applied to both ends of the wiring 600, POLY Si
A large current flows through the fuse 601 and the fuse blows.

【0003】[0003]

【発明が解決しようとする課題】この従来のヒュ−ズは
最も一般的なものであるがヒュ−ズの材質としては前述
した様に昇華しやすい金属としてICの標準プロセスに
は無い工程が必要となる場合、または標準プロセス工程
内での導電物質(たとえばPOLY Si)を使う場合
の二通りの手段がある。しかし、ここで特殊な金属を用
いる場合はプロセスの工程が増加しウェファコストのア
ップにつながる。さらに特殊金属工程の為に新たな設備
投資が必要となりほんの数ビットのヒュ−ズについては
非常に不向きである。またCMOSのIC等におけるヒ
ュ−ズでPOLY Siを用いる場合ヒュ−ズがCVD
等の保護膜で覆われている時には、POLY Siは非
常に溶断しにくくなる。したがってヒュ−ズ部分のPO
LY Siの上はCVDをオ−プンとしておく。この場
合信頼性上の問題からCVDオ−プン部分の周囲は充分
広くスペ−スをとる必要があるのでヒュ−ズ回路が非常
に大きくなってしまう。またウェファ検査でヒュ−ズを
切る場合には問題ないがモ−ルド実装後はモ−ルド材が
ヒュ−ズ部のCVDオ−プンをふさいでしまい POL
Y Siが溶断しなくなってしまう。この様に従来の技
術は少数ビットでかつモ−ルド実装後プログラムする製
品に対しては最適ではなかった。また従来のPOLY
Siヒュ−ズでは大電流で切断しようとすると電子の流
れに押されてヒュ−ズ内の電流経路にそってAL原子が
走り切断するどころかショ−トすることがあった。本発
明はかかる問題点を解決するためのもので標準プロセス
の工程内で特殊な工程を設ける必要がなく、確実に電気
的に切断でき信頼性のある安価なヒュ−ズを提供するも
のである。
This conventional fuse is the most general one, but the material of the fuse is, as mentioned above, a metal that easily sublimes, and requires a step which is not in the standard IC process. There are two ways to do this, or to use a conductive material (eg, POLY Si) in standard process steps. However, when a special metal is used here, the number of process steps increases and the wafer cost increases. Furthermore, a new capital investment is required for the special metal process, which is very unsuitable for fuses of only a few bits. When POLY Si is used as a fuse in a CMOS IC or the like, the fuse is CVD.
When it is covered with a protective film such as POLY Si, it becomes very difficult to melt down. Therefore, the PO of the fuse part
CVD is left open on LY Si. In this case, because of the reliability problem, the space around the CVD open part needs to be wide enough to make the fuse circuit very large. Also, there is no problem when cutting the fuse in the wafer inspection, but after mounting the mold, the mold material blocks the CVD open of the fuse part, so POL
Y Si will not melt. Thus, the prior art was not optimal for products with a small number of bits and to be programmed after mounting in the mold. Also the conventional POLY
In the Si fuse, when an attempt is made to cut with a large current, the flow of electrons pushes the AL atom along the current path in the fuse, causing a shot rather than a break. The present invention is intended to solve such a problem, and provides a reliable and inexpensive fuse that can be electrically cut without requiring a special step in the standard process. .

【0004】[0004]

【課題を解決するための手段】ヒューズにおいてヒュー
ズ材を交差させ4端子をもつヒューズ形状をなし、一対
の端子間に切断電圧を加えロジック的な切断、非切断の
判定をもう一対の端子間で行うことを特徴とする。
[Means for Solving the Problems] In a fuse, a fuse material is crossed to form a fuse shape having four terminals, and a disconnection voltage is applied between a pair of terminals to make a logical disconnection / non-disconnection determination between another pair of terminals. It is characterized by performing.

【0005】ヒューズにおいてヒューズ材を交差させ4
端子をもつヒューズ形状をなし、交点を前記4端子のい
ずれか1つの端子側に片寄らせることを特徴とする。
In the fuse, the fuse material is crossed 4
It is characterized in that it has a fuse shape having a terminal, and the intersection is offset to one of the four terminals.

【0006】ヒューズにおいてヒューズ材と接続する配
線用金属を有し、前記ヒューズ材はヒューズ切断時に正
の電圧を印加する配線用金属と接続する部分と負の電圧
を印加する配線用金属と接続する部分と切断するヒュー
ズの部分を有し、前記負の電圧を印加する配線用金属と
接続する部分を前記正の電圧を印加する配線用金属と接
続する部分を面積的に大きくすることを特徴とする。
The fuse has a wiring metal that is connected to the fuse material, and the fuse material is connected to a portion that is connected to the wiring metal that applies a positive voltage and a wiring metal that applies a negative voltage when the fuse is cut. A fuse portion for disconnecting the portion and a portion for connecting with the wiring metal for applying the negative voltage, and a portion for connecting with the wiring metal for applying the positive voltage is increased in area. To do.

【0007】ヒューズにおいて負の電圧を印加する配線
用金属とヒューズの接続部分を接続するコンタクトの大
きさを6μm×4μm以上とし、ヒューズ部分に対し垂
直方向に横ながの形状とすることを特徴とする。
In the fuse, the size of the contact for connecting the wiring metal to which a negative voltage is applied and the connection portion of the fuse is set to 6 μm × 4 μm or more, and the shape of the contact is vertical to the fuse portion. And

【0008】[0008]

【実施例】本発明を実施例を用いて具体的に説明する。
本発明の一実施例を図1に示す。図1において101は
配線用AL、102はヒュ−ズでここではPOLY S
iを用いている。103はAL101とPOLY Si
102を接続するコンタクトを示している。ここで10
4、105、106、107は各信号との接続端子であ
りPOLY Si102の低抵抗を介して各々接続され
る。本発明のヒュ−ズは端子104と106の間に高電
圧を印加し電流を流すことにより端子105と107の
間を電気的に切断することができる。図2に本発明を用
いたヒュ−ズに電流を流した後の上面からみた状態を示
す。104から107は図1の同番号の各端子に対応す
る。ここで201は電流の走った跡で202は電流経路
の側面の絶縁層である。また203の一点鎖線の部分の
断面構造を図3に示す。図3(a)はヒュ−ズ切断前の
断面図で、図3(b)は切断後の断面図を示す。本発明
のヒュ−ズを切断した後を観察すると図2の201の様
な跡を明確にみとめることができる。またこの電流経路
の両側面に溝の様なラインが走っているのが分かる。こ
の電流経路と溝がどのようになっているかを断面を拡大
観察する。図3において301はLOCOSで302は
POLY Si、303はPOLY SiLIGHT
OXIDE、304はCVD保護膜である。305・3
07は電流の通らないPOLY Si部分、306は電
流の通った後のPOLY Si部分である。POLY
Siに大電流を流すと部分的に1000度以上の高温に
なり不純物濃度の高いPOLY Siは溶融温度が10
00度近くに低下しているため溶融する。溶融すること
によって膨張し、この膨張する力により電流の流れてい
る部分は丸くなり周囲の酸化膜に均等に圧力をかける。
電流を切ると膨張していた部分は冷却し収縮する。膨張
により圧力を受けていた周囲の酸化膜はPOLY Si
を押し込み電流の流れなかったPOLY Si305・
307と電流の流れたPOLY Si306との間に入
り込み両者を完全に分離し電気的に切断する。この様な
現象により大電流の流れたあとはその電流経路が他のP
OLYSi部分より盛り上がりその側面に絶縁層を成
す。この絶縁層が上面からみると電流経路の側面の溝に
みえたわけである。この絶縁層の厚さはほぼ0.2から
0.3umほどであり通常使用電圧に対する絶縁耐圧は
充分といえる。図2で端子107は絶縁層202によっ
て他の端子104、105、106から完全に分離され
電気的に切断される。図4に本発明のヒュ−ズを利用し
た回路例を示す。この回路は外部端子に高電圧を印加し
内部の選択スイッチによりヒュ−ズをセレクトして切断
する。切断後そのヒュ−ズの前後のpull up P
ch MOSトランジスタとpull down Pc
h MOSトランジスタによりHIGHもしくはLOW
の信号を判定する。具体的に説明すると401は本発明
のヒューズであり、406で示す外部端子に高電圧を印
加しヒュ−ズのセレクト用のスイッチ402(ここでは
NPNバイポ−ラトランジスタを用いている)をONさ
せる。VDDから選択スイッチ402、ヒュ−ズ401
を経て外部端子406に至る経路で大電流が流れる。ま
たpull up PchMOSトランジスタ404と
ヒュ−ズ401が接続されさらにヒュ−ズ401にpu
ll downPch MOSトランジスタを介してV
SSにつながる。ここでヒュ−ズ401の端子104が
選択スイッチ402のエミッタに、端子106が外部端
子406に接続される。また端子107はpullup
Pch MOS トランジスタ404に接続され、端
子105はpull down Pch MOS トラ
ンジスタ403に接続される。プログラム時選択スイッ
チ402をONさせVDD−選択トランジスタ402−
ヒュ−ズ401−外部端子406に大電流が流れ前述し
た現象によりヒュ−ズ401の端子107と他端子10
4・105・106が電気的に切断される。ここでpu
ll up Pch MOS トランジスタ404とヒ
ュ−ズ401の端子107との接続点を407で示す。
接続点407の電位はpull up Pch MOS
トランジスタ404とヒュ−ズ401とpull d
own Pch MOS トランジスタ403の各抵抗
の比で決まる。pull up Pch MOS トラ
ンジスタ404のON抵抗をpull down Pc
h MOS トランジスタ403のON抵抗に比べて大
きくしておくことによりヒュ−ズ切断前は接続点407
の電位はLOWとなり、ヒュ−ズ切断後はヒュ−ズのイ
ンピ−ダンスが無限大となるためHIGHとなる。この
ように本発明を用いたヒュ−ズは従来の蒸発してPOL
Y Siに亀裂をいれて電気的に切断するタイプに比べ
切断部分に厚い絶縁層が入り込むことにより絶縁される
ので確実に絶縁されかつ非常に高い信頼性を得る事がで
きる。
EXAMPLES The present invention will be specifically described with reference to examples.
One embodiment of the present invention is shown in FIG. In FIG. 1, 101 is a wiring AL, 102 is a fuse, and here is POLY S.
i is used. 103 is AL101 and POLY Si
The contacts connecting 102 are shown. Where 10
Reference numerals 4, 105, 106, and 107 denote connection terminals for respective signals, which are connected to each other via the low resistance of POLY Si 102. The fuse of the present invention can electrically disconnect the terminals 105 and 107 by applying a high voltage between the terminals 104 and 106 and passing a current. FIG. 2 shows a state of the fuse according to the present invention as seen from the top surface after passing a current. Reference numerals 104 to 107 correspond to the terminals having the same numbers in FIG. Here, 201 is a trace of current flow and 202 is an insulating layer on the side surface of the current path. Further, FIG. 3 shows a cross-sectional structure of a portion indicated by a dashed-dotted line 203. FIG. 3A is a sectional view before fuse cutting, and FIG. 3B is a sectional view after cutting. When the fuse of the present invention is cut and then observed, a trace such as 201 in FIG. 2 can be clearly seen. You can also see that a groove-like line runs on both sides of this current path. The cross section is enlarged and observed to see how the current path and the groove are formed. In FIG. 3, 301 is LOCOS, 302 is POLY Si, and 303 is POLY SiLIGHT.
OXIDE and 304 are CVD protective films. 305.3
Reference numeral 07 denotes a POLY Si portion where current does not pass, and 306 denotes a POLY Si portion after passing current. POLY
When a large current is applied to Si, the temperature rises partly to 1000 ° C. or higher, and POLY Si having a high impurity concentration has a melting temperature of 10
It melts because the temperature is close to 00 degrees. It expands due to melting, and due to this expanding force, the current flowing portion becomes round and evenly applies pressure to the surrounding oxide film.
When the electric current is cut off, the expanded part cools and contracts. The surrounding oxide film, which was under pressure due to expansion, is POLY Si
POLY Si305, in which the electric current did not flow
It enters between the 307 and the POLY Si 306 where the current has flowed, and completely separates them and electrically cuts them. After a large current flows due to such a phenomenon, the current path is
The insulating layer is formed on the side surface of the OLYSi portion. When viewed from above, this insulating layer looks like a groove on the side surface of the current path. The thickness of this insulating layer is about 0.2 to 0.3 μm, and it can be said that the withstand voltage with respect to a normal operating voltage is sufficient. In FIG. 2, the terminal 107 is completely separated from the other terminals 104, 105 and 106 by the insulating layer 202 and electrically disconnected. FIG. 4 shows an example of a circuit using the fuse of the present invention. In this circuit, a high voltage is applied to the external terminal, and the fuse is selected and cut by an internal selection switch. After cutting, pull up P before and after the fuse
ch MOS transistor and pull down Pc
h HIGH or LOW by MOS transistor
Signal is determined. More specifically, reference numeral 401 denotes a fuse of the present invention, which applies a high voltage to an external terminal indicated by 406 to turn on a fuse selection switch 402 (here, an NPN bipolar transistor is used). . Select switch 402 from VDD, fuse 401
A large current flows through the path to the external terminal 406 via. Further, the pull-up PchMOS transistor 404 and the fuse 401 are connected to each other, and the fuse 401 is connected to the pull-up PchMOS transistor 404.
ll downPch MOS transistor V
Connect to SS. Here, the terminal 104 of the fuse 401 is connected to the emitter of the selection switch 402, and the terminal 106 is connected to the external terminal 406. The terminal 107 is pullup
It is connected to the Pch MOS transistor 404, and the terminal 105 is connected to the pull down Pch MOS transistor 403. VDD-selection transistor 402-
Fuse 401-A large current flows to external terminal 406, and terminal 107 of fuse 401 and other terminal 10
4.105.106 are electrically disconnected. Where pu
The connection point between the ll up Pch MOS transistor 404 and the terminal 107 of the fuse 401 is indicated by 407.
The potential of the connection point 407 is pull up Pch MOS
Transistor 404, fuse 401, and pull d
It is determined by the ratio of each resistance of the down Pch MOS transistor 403. pull up Pch MOS transistor 404 ON resistance is pulled down Pc
By making it larger than the ON resistance of the hMOS transistor 403, the connection point 407 is set before the fuse is disconnected.
Potential becomes LOW and becomes HIGH after the fuse is cut off because the fuse impedance becomes infinite. In this way, the fuse using the present invention is the conventional POL
As compared with a type in which YSi is cracked and electrically cut, a thick insulating layer enters into the cut portion for insulation, so that insulation is surely performed and extremely high reliability can be obtained.

【0009】図1において端子104・105・106
・107をつなぐPOLY Siが直交する様な場合、
電流の走り具合によっては完全に切断されないことがま
れに有り得る。すなわち図1の端子104から端子10
6に接続するPOLY Siのほぼ中央部を電流が走っ
た場合、端子近傍で絶縁されず低インピ−ダンスの領域
ができてしまう。
In FIG. 1, terminals 104, 105 and 106
・ When the POLY Si connecting 107 is orthogonal,
In rare cases, it may not be completely disconnected depending on the running condition of the electric current. That is, the terminals 104 to 10 in FIG.
When a current runs through the central portion of POLY Si connected to 6, the area near the terminals is not insulated and a low impedance region is formed.

【0010】ここで本発明のヒューズの切断状態につい
て図2を用いて説明する。電流はインピ−ダンスの最も
低い経路を走るので形状的に工夫することにより電流を
走らせる場所をある程度コントロ−ルすることができ
る。図2に示す様に端子104と端子106をつなぐP
OLY Siと端子105と端子107をつなぐPOL
YSiの交点を端子104・106に対し切断したい端
子107の反対側に片寄らせると端子104から端子1
06に至る最もインピ−ダンスの低い経路は201のよ
うな経路となり切断したい端子は確実に切断される。ま
た従来のヒュ−ズの切断形状は場合によってさまざまに
変化し時には切断しないようなこともあったがこの様に
ヒューズの形状を工夫して電流経路をコントロ−ルする
ことにより確実にかつほぼ同様な切断形状を得ることが
できる。
The cut state of the fuse of the present invention will be described with reference to FIG. Since the current runs along the path with the lowest impedance, it is possible to control the place where the current runs to some extent by devising the shape. As shown in FIG. 2, P connecting the terminal 104 and the terminal 106
POL connecting OLY Si, terminal 105 and terminal 107
When the intersection point of YSi is biased to the opposite side of the terminal 107 to be cut with respect to the terminals 104 and 106, the terminals 104 to 1
The path with the lowest impedance to 06 is a path like 201, and the terminal to be cut is surely cut. In addition, the cutting shape of the conventional fuse may change in various cases depending on the case, and sometimes it is not cut, but by devising the shape of the fuse and controlling the current path in this way, it can be surely and almost the same. It is possible to obtain various cut shapes.

【0011】ところでヒュ−ズ切断において、より高電
圧・高電流を印加するほど確実に切断できるわけであ
る。しかし従来の様なヒュ−ズ形状では前述した様にA
Lのマイグレ−ション等によりヒュ−ズPOLY Si
の中を電流経路にそってALが走りショ−トする現象が
しばしば起こる。この現象はヒュ−ズの形状によっては
かなり低電圧でも簡単に起こる。
By the way, in fuse cutting, the higher the voltage and the higher the current applied, the more reliably the fuse can be cut. However, in the conventional fuse shape, A
Fuse POLY Si due to L migration
The phenomenon that the AL runs and runs along the current path in the inside often occurs. This phenomenon easily occurs at a considerably low voltage depending on the shape of the fuse.

【0012】この状況の改善を本発明の別の実施例とし
て図5に示す。ここで501はAL配線、502はAL
とPOLY Siを接続するコンタクトで503、50
5、506は同一のPOLY Siであるが説明の便宜
上部分によって番号をふりわけた。503はヒュ−ズ部
分を示し505は高電圧の負側の電圧、506は高電圧
の正側の電圧がかかるPOLY Si部分を示す。50
4はPOLY Si部505とAL配線を接続するコン
タクトで502で示すコンタクトに比べ電界が集中しな
い様に電流経路に対し直交方向にフラットで横長の広い
形状のコンタクトオ−プンとしてある。マイグレ−ショ
ンは高い電流密度によって起こるのでALとの接続部分
での電流密度を下げればマイグレ−ションは非常に起こ
りにくくなる。ここで電流はPOLY Si部分506
側からPOLY Si部分505側へ流れるが電子はこ
の逆方向に移動するのでPOLY Si部分505側で
の電流密度を下げるためにPOLY Siの部分505
の抵抗を下げる。またALとのコンタクトまでの距離を
離しさらにコンタクトオ−プンは前述したように横なが
で広くする。これによってコンタクト504を介してP
OLY Siと接触するALに流れる電流の電流密度は
低くなり従来のヒュ−ズ構造に比べ非常にマイグレ−シ
ョンが起こりにくくなる。尚筆者の実験によるとコンタ
クトの大きさを6μm×4μm以上にすると非常に効果
があることがわかった。その結果として本来切断したい
ヒューズ部分503にかなり高い高電圧を印加すること
が可能になりより確実に切断することができる。
An improvement of this situation is shown in FIG. 5 as another embodiment of the present invention. Here, 501 is AL wiring and 502 is AL wiring.
And 503, 50 by the contact connecting POLY Si
Although 5 and 506 are the same POLY Si, the numbers are assigned according to the parts for convenience of explanation. Reference numeral 503 denotes a fuse portion, 505 denotes a high voltage negative side voltage, and 506 denotes a POLY Si portion to which a high voltage positive side voltage is applied. Fifty
Reference numeral 4 denotes a contact that connects the POLY Si portion 505 and the AL wiring, and is a contact opening that is flat and wide in the direction orthogonal to the current path so that the electric field is not concentrated as compared with the contact 502. Since the migration occurs due to the high current density, if the current density at the connection portion with the AL is lowered, the migration becomes very difficult to occur. Here, the current is the POLY Si portion 506.
From the side to the POLY Si portion 505 side, but the electrons move in the opposite direction. Therefore, in order to reduce the current density on the POLY Si portion 505 side, the POLY Si portion 505 side
Lower the resistance of. Further, the distance to the contact with AL is increased, and the contact opening is widened by the lateral side as described above. This causes P via contact 504.
The current density of the current flowing through the AL in contact with OLY Si is low, and migration is much less likely to occur as compared with the conventional fuse structure. According to an experiment conducted by the author, it was found that the contact size of 6 μm × 4 μm or more is very effective. As a result, a considerably high voltage can be applied to the fuse portion 503 which is originally desired to be cut, and the fuse portion 503 can be cut more reliably.

【0013】[0013]

【発明の効果】この様に本発明のヒュ−ズを用いれば新
たに特殊なプロセス工程を付け加える必要がないので、
ほんの少数bitのヒュ−ズでも充分にコストパフォ−
マンスが良く非常に安価にできる。また、これは特殊な
ヒュ−ズ用金属を用いた場合比べ面積的にもその小ささ
は遜色のないもので大容量のヒュ−ズアレイにも容易に
適用できる。またプログラム特性としても通常のPOL
Y Siヒュ−ズに比べ確実な書き込み特性が実現でき
る。さらに従来のほとんどコントロ−ルのできない破壊
的切断をするヒュ−ズに比べ電流経路のコントロ−ルに
よって切断を常に同じ切断形状にできるため安定した特
性を得ることができる。切断が厚い絶縁層がヒュ−ズ内
に入り込むことによって成されるため長期にわたり非常
に高い信頼性が得られる。またヒュ−ズの切断条件も比
較的低電圧から高電圧まで広範囲に設定できる。さらに
切断が比較的低いエネルギ−のために保護膜(CVD)
への破壊的影響を与えないのでICの信頼性にとっても
非常に有益である。
As described above, when the fuse of the present invention is used, it is not necessary to newly add a special process step.
Cost performance is sufficient even with only a few bit of fuse
Good monthly cost and very cheap. Further, this is comparable in size to the case where a special fuse metal is used, and can be easily applied to a large-capacity fuse array. Also as a program characteristic, a normal POL
A more reliable writing characteristic can be realized as compared with the Y Si fuse. Further, compared with the conventional fuse which makes a destructive cut which hardly allows control, the control of the current path allows the cutting to always have the same cutting shape, so that stable characteristics can be obtained. A very high reliability is obtained for a long period of time because a thick insulating layer is inserted into the fuse. Also, fuse cutting conditions can be set in a wide range from relatively low voltage to high voltage. Furthermore, because of the relatively low energy of cutting, a protective film (CVD)
It is also very beneficial to the reliability of the IC since it does not have a destructive effect on the IC.

【0014】以上の様に本発明を用いれば簡単にできる
ヒュ−ズとして価格的にも、特性的、品質的にも非常に
よいものを提供できる。
As described above, by using the present invention, it is possible to provide a fuse which can be easily manufactured in terms of price, characteristics and quality.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例のヒューズの構成図。FIG. 1 is a configuration diagram of a fuse according to an embodiment of the present invention.

【図2】本発明のヒューズの切断状態図。FIG. 2 is a cut state diagram of a fuse of the present invention.

【図3】ヒューズの切断状態の断面図。FIG. 3 is a sectional view of the fuse in a cut state.

【図4】本発明を用いたヒューズ回路図。FIG. 4 is a fuse circuit diagram using the present invention.

【図5】本発明の別の実施例のヒューズの構成図。FIG. 5 is a configuration diagram of a fuse of another embodiment of the present invention.

【図6】従来のヒューズの構成図。FIG. 6 is a configuration diagram of a conventional fuse.

【符号の説明】[Explanation of symbols]

101 AL配線 102 ヒューズ 103 コンタクト 104 ヒューズの一端子 105 ヒューズの一端子 106 ヒューズの一端子 107 ヒューズの一端子 101 AL wiring 102 Fuse 103 Contact 104 One terminal of fuse 105 One terminal of fuse 106 One terminal of fuse 107 One terminal of fuse

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】ヒューズにおいて3つ以上の端子を具備す
ることを特徴とする半導体装置。
1. A semiconductor device comprising a fuse having three or more terminals.
【請求項2】ヒューズにおいてヒューズ材を交差させ4
端子をもつヒューズ形状をなし、一対の端子間に切断電
圧を加えロジック的な切断、非切断の判定をもう一対の
端子間で行うことを特徴とする半導体装置。
2. A fuse material is crossed in a fuse.
A semiconductor device having a fuse shape having terminals, wherein a disconnection voltage is applied between a pair of terminals to perform logical disconnection / non-disconnection determination between the other pair of terminals.
【請求項3】ヒューズにおいてヒューズ材を交差させ4
端子をもつヒューズ形状をなし、交点を前記4端子のい
ずれか1つの端子側に片寄らせることを特徴とする半導
体装置。
3. The fuse material is crossed in a fuse.
A semiconductor device having a fuse shape having a terminal, wherein the intersection is offset to one of the four terminals.
【請求項4】ヒューズにおいてヒューズ材と接続する配
線用金属を有し、前記ヒューズ材はヒューズ切断時に正
の電圧を印加する配線用金属と接続する部分と負の電圧
を印加する配線用金属と接続する部分と切断するヒュー
ズの部分を有し、前記負の電圧を印加する配線用金属と
接続する部分を前記正の電圧を印加する配線用金属と接
続する部分より面積的に大きくすることを特徴とする半
導体装置。
4. A fuse has a wiring metal that is connected to a fuse material, and the fuse material includes a portion that is connected to a wiring metal that applies a positive voltage when the fuse is cut and a wiring metal that applies a negative voltage. It has a connecting portion and a fuse portion for disconnecting, and the area for connecting to the wiring metal for applying the negative voltage is made larger than the area for connecting to the wiring metal for applying the positive voltage. Characteristic semiconductor device.
【請求項5】請求項4記載のヒューズにおいて負の電圧
を印加する配線用金属とヒューズの接続部分を接続する
コンタクトの大きさを6μm×4μm以上とし、ヒュー
ズ部分に対し垂直方向に横ながの形状とすることを特徴
とする半導体装置。
5. The fuse according to claim 4, wherein the size of the contact for connecting the wiring metal to which a negative voltage is applied and the connecting portion of the fuse is 6 μm × 4 μm or more, and the contact is perpendicular to the fuse portion. A semiconductor device having the shape of.
JP4167862A 1992-06-25 1992-06-25 Semiconductor device Expired - Fee Related JP2982497B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4167862A JP2982497B2 (en) 1992-06-25 1992-06-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4167862A JP2982497B2 (en) 1992-06-25 1992-06-25 Semiconductor device

Publications (2)

Publication Number Publication Date
JPH0613465A true JPH0613465A (en) 1994-01-21
JP2982497B2 JP2982497B2 (en) 1999-11-22

Family

ID=15857467

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4167862A Expired - Fee Related JP2982497B2 (en) 1992-06-25 1992-06-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JP2982497B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006514782A (en) * 2003-04-11 2006-05-11 インターナショナル・ビジネス・マシーンズ・コーポレーション Programmable semiconductor device
JP2007305939A (en) * 2006-05-15 2007-11-22 Nec Electronics Corp Semiconductor device and electrical fuse cutting method
JP2011009745A (en) * 2009-06-29 2011-01-13 Internatl Business Mach Corp <Ibm> Electrically programmable fuse using anisometric contact and fabrication method
JP2012532451A (en) * 2009-07-01 2012-12-13 インターナショナル・ビジネス・マシーンズ・コーポレーション Circuit structure and method for programming and reprogramming low power multi-state electronic fuses (e fuses)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006514782A (en) * 2003-04-11 2006-05-11 インターナショナル・ビジネス・マシーンズ・コーポレーション Programmable semiconductor device
US7872897B2 (en) 2003-04-11 2011-01-18 International Business Machines Corporation Programmable semiconductor device
US8184465B2 (en) 2003-04-11 2012-05-22 International Business Machines Corporation Programmable semiconductor device
US8724365B2 (en) 2003-04-11 2014-05-13 International Business Machines Corporation Programmable semiconductor device
JP2007305939A (en) * 2006-05-15 2007-11-22 Nec Electronics Corp Semiconductor device and electrical fuse cutting method
US8372730B2 (en) 2006-05-15 2013-02-12 Renesas Electronics Corporation Method for cutting an electric fuse
JP2011009745A (en) * 2009-06-29 2011-01-13 Internatl Business Mach Corp <Ibm> Electrically programmable fuse using anisometric contact and fabrication method
JP2012532451A (en) * 2009-07-01 2012-12-13 インターナショナル・ビジネス・マシーンズ・コーポレーション Circuit structure and method for programming and reprogramming low power multi-state electronic fuses (e fuses)

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