Deprecated: The each() function is deprecated. This message will be suppressed on further calls in /home/zhenxiangba/zhenxiangba.com/public_html/phproxy-improved-master/index.php on line 456
JPH0614481B2 - Side-by-side resistor device - Google Patents
[go: Go Back, main page]

JPH0614481B2 - Side-by-side resistor device - Google Patents

Side-by-side resistor device

Info

Publication number
JPH0614481B2
JPH0614481B2 JP60070235A JP7023585A JPH0614481B2 JP H0614481 B2 JPH0614481 B2 JP H0614481B2 JP 60070235 A JP60070235 A JP 60070235A JP 7023585 A JP7023585 A JP 7023585A JP H0614481 B2 JPH0614481 B2 JP H0614481B2
Authority
JP
Japan
Prior art keywords
resistors
resistor
juxtaposed
resistor device
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60070235A
Other languages
Japanese (ja)
Other versions
JPS61229302A (en
Inventor
光一郎 見崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP60070235A priority Critical patent/JPH0614481B2/en
Publication of JPS61229302A publication Critical patent/JPS61229302A/en
Publication of JPH0614481B2 publication Critical patent/JPH0614481B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Non-Adjustable Resistors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は絶縁基板上に等間隔で並置された複数の抵抗体
からなる並置型抵抗体装置に関する。
The present invention relates to a juxtaposed resistor device composed of a plurality of resistors juxtaposed at equal intervals on an insulating substrate.

〔従来の技術〕[Conventional technology]

従来、この種の並置型抵抗体装置では、高い抵抗値と高
い抵抗比精度が要求され、高抵抗を満たすように幅に対
して長さの長い抵抗体が用いられてきた。
Conventionally, in this type of juxtaposed resistor device, a high resistance value and a high resistance ratio accuracy are required, and a resistor having a length longer than a width has been used so as to satisfy the high resistance.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

上述した従来の並置型抵抗体装置では並置された長い高
抵抗体は、その長さのために製造時、特に抵抗パターン
を形成するとき、マスクを用いてフオトレジストを露光
する工程の影響を大きく受ける、すなわち、ウエハ基板
とガラスマスクを密着する時にウエハが受ける密着度の
粗密の波がパターン精度に大きなばらつきを与えるとい
う問題点があった。
In the conventional juxtaposed type resistor device described above, the long high resistors juxtaposed in parallel have a large influence on the step of exposing the photoresist using a mask during manufacturing, particularly when forming a resistance pattern because of its length. That is, there is a problem that the wave of the closeness of the adhesion which the wafer receives when the wafer substrate and the glass mask are brought into close contact gives a large variation in the pattern accuracy.

本発明の目的は、抵抗パターンの精度のばらつきを低く
押えることができる並置型抵抗体装置を提供することで
ある。
It is an object of the present invention to provide a juxtaposed resistor device capable of suppressing variations in accuracy of resistance patterns.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の並置型抵抗体装置は、各抵抗体が、複数の単位
抵抗と、これら単位抵抗を直列に接続する電極と、両端
に接続された取出し用配線電極で構成されていることを
特徴とする。
The juxtaposed resistor device of the present invention is characterized in that each resistor is composed of a plurality of unit resistors, electrodes connecting these unit resistors in series, and extraction wiring electrodes connected to both ends. To do.

このような構成により、抵抗パターンの長大化に帰因す
る抵抗パターン形成時の精度のばらつきを低く押えるこ
とができる。
With such a configuration, it is possible to suppress variations in accuracy at the time of forming the resistance pattern due to the lengthening of the resistance pattern.

〔実施例〕〔Example〕

図面を参照して本発明の実施例について説明する。 Embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の並置型抵抗体装置の一実施例の平面図
である。本実施例の並置型抵抗体装置は、絶縁基板101
の上に高抵抗体を形成する金属被膜単位抵抗体102が電
極103により直列に接続され配線電極104により高抵抗体
組立体として取り出す構成となっている。金属被膜単位
抵抗体105はダミー抵抗体である。
FIG. 1 is a plan view of an embodiment of the juxtaposed resistor device of the present invention. The juxtaposed resistor device according to the present embodiment has an insulating substrate 101.
The metal film unit resistors 102 forming a high resistance element are connected in series by electrodes 103 and are taken out as a high resistance assembly by the wiring electrodes 104. The metal film unit resistor 105 is a dummy resistor.

ダミー抵抗体105をこのように配置することにより、
両端の高抵抗体の比精度の低下を防止することができ
る。
By arranging the dummy resistor 105 in this way,
It is possible to prevent a decrease in the specific accuracy of the high resistance bodies at both ends.

このように高抵抗体を単位抵抗体に分割してさらにこれ
を直列に接続することにより長い抵抗パターンを形成す
るために、ホトマスクをウエハに密着する際、密着度の
粗密を生じることがなく良好な抵抗パターンの精度を得
ることができる。
In this way, the high resistance body is divided into unit resistance bodies and further connected in series to form a long resistance pattern. Therefore, when the photomask is adhered to the wafer, the adhesion degree does not occur and good. It is possible to obtain accurate resistance pattern accuracy.

さらに、直列に接続された個々の抵抗体の長さが異って
いても、所定の全抵抗値が維持される限り本発明の効果
に影響がない。
Furthermore, even if the lengths of the individual resistors connected in series are different, the effect of the present invention is not affected as long as a predetermined total resistance value is maintained.

本実施例においては、抵抗体として金属被膜抵抗体を用
いたが、これに限定されるものではなく、抵抗体として
拡散抵抗体、ポリシリコン抵抗体を用いても同様な並置
型抵抗体装置を得ることができる。
In this embodiment, the metal film resistor is used as the resistor, but the present invention is not limited to this, and a similar juxtaposed resistor device can be used even if a diffused resistor or a polysilicon resistor is used as the resistor. Obtainable.

〔発明の効果〕〔The invention's effect〕

以上説明したように、本発明は高抵抗体を単位抵抗に分
割し、それらを直列に接続することにより抵抗パターン
の長大化によるパターン精度のばらつきを低く押えるこ
とができる。
As described above, according to the present invention, by dividing the high resistance body into unit resistances and connecting them in series, it is possible to suppress variation in pattern accuracy due to the lengthening of the resistance pattern.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の並置型抵抗体装置の一実施例の平面図
である。 101……絶縁基板 102……金属被膜単位抵抗体 103……金属電極 104……金属配線 105……ダミー金属被膜単位抵抗体
FIG. 1 is a plan view of an embodiment of the juxtaposed resistor device of the present invention. 101 …… Insulating substrate 102 …… Metal film unit resistor 103 …… Metal electrode 104 …… Metal wiring 105 …… Dummy metal film unit resistor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】基板上に同一抵抗値を持つ複数の直線状抵
抗体を隣接して並置した並置型抵抗体装置において、各
直線状抵抗体直線状に配置された複数の単位抵抗体と、
これら単位抵抗体を直列に接続する導体と、直線状に配
置された前記複数の単位抵抗体のうち両端に位置する単
位抵抗体に接続された取出し用配線とをそれぞれ含んで
おり、前記並置された複数の直線状抵抗体の両端の直線
状抵抗体を構成する前記単位抵抗体のそれぞれの外側に
は前記単位抵抗体からなるダミー用抵抗体がそれぞれ隣
接して配置されていることを特徴とする並置型抵抗体装
置。
1. A juxtaposed resistor device in which a plurality of linear resistors having the same resistance value are juxtaposed side by side on a substrate, wherein each linear resistor has a plurality of unit resistors linearly arranged,
The unit resistors are connected in series, and the extraction wirings connected to the unit resistors located at both ends of the plurality of linearly arranged unit resistors are respectively included and arranged in parallel. A plurality of linear resistors, the dummy resistors consisting of the unit resistors are arranged adjacent to each other outside each of the unit resistors constituting the linear resistors at both ends. Side-by-side resistor device.
JP60070235A 1985-04-03 1985-04-03 Side-by-side resistor device Expired - Lifetime JPH0614481B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60070235A JPH0614481B2 (en) 1985-04-03 1985-04-03 Side-by-side resistor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60070235A JPH0614481B2 (en) 1985-04-03 1985-04-03 Side-by-side resistor device

Publications (2)

Publication Number Publication Date
JPS61229302A JPS61229302A (en) 1986-10-13
JPH0614481B2 true JPH0614481B2 (en) 1994-02-23

Family

ID=13425700

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60070235A Expired - Lifetime JPH0614481B2 (en) 1985-04-03 1985-04-03 Side-by-side resistor device

Country Status (1)

Country Link
JP (1) JPH0614481B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0521718A (en) * 1991-07-10 1993-01-29 Mitsubishi Electric Corp R-2R ladder resistance device
JP5041724B2 (en) * 2006-04-17 2012-10-03 ラピスセミコンダクタ株式会社 Semiconductor device
JP4741624B2 (en) * 2008-03-21 2011-08-03 京セラ株式会社 Wiring board
JP2010109233A (en) * 2008-10-31 2010-05-13 Renesas Technology Corp Semiconductor device

Also Published As

Publication number Publication date
JPS61229302A (en) 1986-10-13

Similar Documents

Publication Publication Date Title
JPH0320041B2 (en)
JPH0614481B2 (en) Side-by-side resistor device
KR920022029A (en) MIM device array and display device manufacturing method and active matrix addressed display device forming such array
US5169493A (en) Method of manufacturing a thick film resistor element
US3489980A (en) Resistive device
JP3753252B2 (en) Multi-element type chip device and manufacturing method thereof
JPS57202774A (en) Semiconductor device
JPH04127401A (en) Manufacture of chip-shaped thermistor
JPH05235279A (en) Semiconductor integrated circuit device
JPS5678148A (en) Resistance temperature compensation circuit
JPS595934Y2 (en) thick film printed circuit
JPS61288402A (en) Manufacture of resistor array
JPS5680152A (en) Thin-film type integrated circuit device
JPS62117358A (en) Semiconductor resistor device
JPS57128949A (en) Electric resistance device
GB1583684A (en) Electrical layer resistor and a method for its manufacture
JPH0622271B2 (en) Semiconductor integrated circuit device
JPS55148453A (en) Semiconductor device
JP2585679B2 (en) Method for manufacturing substrate in resistor
JPH0427122Y2 (en)
JPH04273401A (en) Resistance train for dividing reference voltage
JPS57210656A (en) Manufacture of hybrid integrated circuit
JPS63100767A (en) Manufacturing method of thin film resistor
JP2639599B2 (en) Semiconductor integrated circuit device
JP2694843B2 (en) Method for manufacturing substrate piece in chip variable resistor