JPH0616510B2 - Method for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a bipolar transistor.

[Conventional technology]

An example of a conventional method for manufacturing a semiconductor device having a bipolar transistor will be described with reference to FIGS.

First, as shown in FIG. 2A, an isolation oxide film 15 made of a thick silicon oxide film that isolates an element region is formed on the N-type epitaxial layer 10. Next, after forming the base region 16 by the ion implantation method, the graft base region 20 is formed by the ion implantation method using the photoresist film as the mask 14B.

Next, as shown in FIG. 2B, an opening portion 23 for impurity diffusion is formed in the thin oxide film on the surface, and the impurity is diffused through the opening portion 23 to form an emitter region 22.

Next, as shown in FIG. 2 (c), after forming a contact hole in the oxide film on the base region, a base electrode 24A and an emitter electrode 24B are formed to complete the transistor.

[Problems to be solved by the invention]

In a semiconductor device having a bipolar transistor, the second factor is an element that determines the area of the base region.
As shown in FIG. 6C, the distance A between the contact holes for forming the emitter and the base electrode, the distance B between the contact hole for forming the base electrode and the isolation oxide film 15 and the contact hole for forming the base electrode. There is a width C of
The smaller B and C are, the smaller the base area is, and the performance of the transistor is improved.

However, in the above-described conventional bipolar transistor, the distance A is the sum of the alignment margin between the contact holes for forming the emitter and base electrodes and the metal electrode and the distance between the metal electrodes, as shown in FIG. 2 (c). Further, the distance B can be set to the alignment margin between the contact hole for forming the base electrode and the isolation oxide film 15.

Furthermore, since the width C of the contact hole is limited by the resolution of the photoresist, the base area of the transistor becomes very large, resulting in an increase in the junction capacitance between the base and collector. In addition, since the distance A is large as described above, the base resistance of the transistor is large, which is a problem in improving performance.

An object of the present invention is to solve the above problems and to provide a method of manufacturing a semiconductor device having a bipolar transistor in which the base area is reduced to reduce the junction capacitance between the base and collector and the base resistance.

[Means for solving problems]

A method of manufacturing a semiconductor device of the present invention comprises a step of sequentially forming a first insulating film including an oxidation resistant film and a second insulating film formed of an oxide film on one main surface of a one conductivity type semiconductor substrate, The second
After forming a mask made of a photoresist film on the insulating film, the first and second insulating films other than the lower part of the mask are etched and removed, and then the side surface of the second insulating film is formed to a predetermined width. Side etching, a step of removing the mask, and then performing thermal oxidation using the first and second insulating films as a mask to form an isolation oxide film for isolating an element formation region on the surface of the semiconductor substrate; Removing the exposed portion of the first insulating film by using the second insulating film and the isolation oxide film as a mask to expose the surface of the semiconductor substrate;
The second insulating film used as a mask is removed, the first insulating film underneath is exposed, and then impurities of opposite conductivity type are ion-implanted into the entire surface to form a base region in the element formation region on the surface of the semiconductor substrate. And a step of forming a polycrystalline silicon film on the entire surface, adding an impurity of opposite conductivity type except the emitter formation region and its peripheral portion, and then removing the undoped impurity-containing polycrystalline silicon film, Forming a third insulating film on the surface of the polycrystalline silicon film left after the heat treatment and forming a graft base region in the semiconductor substrate at the same time; and using the third insulating film as a mask, the first insulating film And removing the film to expose the semiconductor substrate in the emitter formation region.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

1 (a) to 1 (h) are cross-sectional views of a semiconductor chip showing the order of steps for explaining a manufacturing method according to an embodiment of the present invention, particularly when applied to a bipolar transistor.

First, as shown in FIG. 1A, a silicon oxide film 11 having a thickness of 500 Å and a thickness of 1000 is formed as a first insulating film on the surface of an N-type epitaxial layer 10 constituting a semiconductor substrate.
A Å silicon nitride film 12 and a 1000 Å thick silicon oxide film are sequentially deposited as a second insulating film.

Next, as shown in FIG. 1B, a mask 14 made of a photoresist film is formed, and then the silicon oxide film 1 is formed.
3. After removing the silicon nitride film 12 by the reactive ion etching method, the silicon oxide film 13 is side-etched by about 1.0 μm with a hydrofluoric acid solution.

Next, as shown in FIG. 1C, the mask 14 is removed and then thermally oxidized to form an isolation oxide film 15 having a thickness of about 1.0 μm in the element isolation region.

Next, as shown in FIG. 1D, the exposed silicon nitride film 12 is removed with a phosphoric acid solution heated to, for example, 160 ° C., and then the remaining silicon oxide film 13 and the removed silicon oxide film 13 are removed with a hydrofluoric acid solution. The silicon oxide film 11 immediately below the silicon nitride film 12 is removed to expose the epitaxial layer 10. After that, boron is added to the element formation region by the ion implantation method to form the P-type base region 16.

Next, as shown in FIG. 1 (e), after forming a first polycrystalline silicon film 17 having a thickness of about 5000Å, a mask 14A made of a photoresist film is formed in a region to be a window for forming an emitter region. After that, a high concentration of boron is added into the first polycrystalline silicon film 17 by an ion implantation method.

Next, as shown in FIG. 1 (f), after removing the mask 14A, the polycrystalline silicon film 17 in the region to which boron is not added is removed by selective etching with, for example, an aqueous solution of potassium hydroxide, and nitriding immediately below. The silicon film 12 is exposed and heated to form a silicon oxide film 19 having a thickness of about 3000 Å on the surface of the first polycrystalline silicon film 17. At this time, the boron added into the first polycrystalline silicon film 17 is diffused into the epitaxial layer 10 and the graft base region 20.
Is formed.

Then, as shown in FIG. 1G, the exposed silicon nitride film 12 and the silicon oxide film 11 immediately below the exposed silicon nitride film 12 are removed to form an opening portion reaching the base region 16.

Subsequently, as shown in FIG. 1 (h), a second polycrystalline silicon film 21 having arsenic added as an impurity, for example, is formed in the emitter region to a thickness of 2500 Å and then heat-treated to form the emitter region 22. Form to complete the bipolar transistor. At this time, the first and second polycrystalline silicon films 17 and 21 become a base electrode and an emitter electrode, respectively.

In the above embodiment, as shown in FIG.
After forming the mask 14A, the first polycrystalline silicon film 1 is formed.
Although the impurities are implanted into the first polycrystalline silicon film 17 by the ion implantation method, the holes may be provided for forming the emitter region after the impurities are implanted into the first polycrystalline silicon film 17. Further, as shown in FIG. 1 (f), after forming an opening in the first polycrystalline silicon film 17, heat treatment was performed to form the silicon oxide film 19 and simultaneously form the graft base region 20. After forming the base region, the opening and the oxide film 19 may be provided.

In the bipolar transistor thus formed, as shown in FIG. 1 (g), the distance B between the contact hole for forming the base electrode and the isolation oxide film 15 is equal to that of the isolation oxide film 15 for the contact hole. However, since it is formed by self-alignment, it can be zero. Further, the width C of the contact hole for forming the base electrode is determined by the side etching amount of the silicon oxide film 13 and can be set to a desired value as small as possible. Further, the distance A between the contact holes for forming the emitter and the base electrode is determined only by the alignment accuracy of the mask 14A as shown in FIG. 1 (e), and the conventional one shown in FIG. 2 (c). Can be very short compared to. Therefore, according to this embodiment, the base area of the transistor can be significantly reduced as compared with the conventional case.

〔The invention's effect〕

As described above, according to the present invention, the contact hole for forming the base electrode of the transistor is formed by self-alignment with the isolation oxide film, and the base area is reduced to reduce the junction capacitance between the base and collector and the base resistance. A semiconductor device having a bipolar transistor can be obtained.

[Brief description of drawings]

1 (a) to 1 (h) are sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention, and FIGS. 2 (a) to 2 (c) are conventional semiconductor device manufacturing methods. FIG. 6 is a cross-sectional view of the semiconductor chip in the order of steps for explaining. 10 ... N-type epitaxial layer, 11 ... Silicon oxide film, 12 ... Silicon nitride film, 13 ... Silicon oxide film, 14, 14A, 14B ... Mask, 15 ... Isolation oxide film, 16 ... Base region , 17 ... First polycrystalline silicon film, 19 ... Silicon oxide film, 20 ... Graft base region, 22 ... Emitter region, 23 ... Opening portion, 2
4A: base electrode, 24B: emitter electrode.

Claims (1)

[Claims] 1. A step of sequentially forming a first insulating film including an oxidation resistant film and a second insulating film made of an oxide film on one main surface of a one conductivity type semiconductor substrate, and the second insulating film. After forming a mask made of a photoresist film on the film, the first and second insulating films other than the lower part of the mask are etched and removed, and then the side surface of the second insulating film is removed by a predetermined width. A step of side-etching; a step of removing the mask and then thermally oxidizing the first and second insulating films as a mask to form an isolation oxide film for isolating an element formation region on the surface of the semiconductor substrate; Of the insulating film and the isolation oxide film as a mask to remove the exposed part of the first insulating film to expose the surface of the semiconductor substrate, and the second insulating film as a mask to remove the underlying part of the second insulating film. After exposing the first insulating film, reverse the entire surface A step of ion-implanting an electric conductivity type impurity to form a base region in an element formation region on the surface of the semiconductor substrate, and a polycrystalline silicon film is formed on the entire surface, and then an opposite conductivity type impurity is added except for the Emi region and its peripheral portion. After that, a step of removing the polycrystalline silicon film to which no impurity is added, and a step of heat treating the semiconductor substrate to form a third insulating film on the surface of the remaining polycrystalline silicon film, and at the same time, a graft base region in the semiconductor substrate. And a third step of forming
And the step of exposing the semiconductor substrate in the emitter formation region by removing the first insulating film using the insulating film as a mask.