JPH061803B2 - Method for manufacturing semiconductor integrated circuit - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly to a method for manufacturing a circuit resistor.

[Prior Art] A conventional method of manufacturing a circuit resistor formed in a semiconductor integrated circuit will be described with reference to FIGS. 2 (a) to 2 (c).

First, as shown in FIG. 2 (a), the surface of the P-type semiconductor substrate 1 is thermally oxidized to form a first oxide film 2, and then a polysilicon layer is formed on the entire surface by a normal vapor phase growth method. Next, a large amount of P-type impurities are diffused into the polysilicon layer by the ion implantation method, and then the polysilicon layer is patterned by the usual photo-etching method to form the resistor layer 3.

Next, as shown in FIG. 2B, a second oxide film 4 is formed on the entire surface by a normal vapor phase growth method.

Next, as shown in FIG. 2 (c), a part of the second oxide film layer 4 is removed by etching to expose a part of the resistor layer 3.
Subsequently, high temperature heat treatment (950 to 1000 ° C.) is performed to anneal the resistor layer 3 made of polysilicon, and then the characteristic extracting electrode 5 is formed to complete the circuit resistance.

When forming a bipolar transistor and a circuit resistor on the same semiconductor substrate, for example, the base of the bipolar transistor is formed by low temperature diffusion, and then the resistor layer 3 is formed. Next, a polysilicon layer containing impurities for forming the emitter is formed, and then the resistor layer 3 is annealed by high temperature heat treatment (950 to 1000 ° C.), and at the same time, impurities are diffused from the polysilicon layer for forming the emitter into the base. To form an emitter. When forming a low resistance body, the polysilicon layer for forming the emitter may be formed in the same step as the resistance body layer.

[Problems to be solved by the invention]

However, in the above-described conventional method of manufacturing a circuit resistance, since the etching of the polysilicon layer is performed immediately after the P-type impurity is introduced by ion implantation, the unevenness of the unevenness as shown by the line A in FIG. 3 is caused. Depending on the impurity concentration distribution, the sidewall 3B of the resistor layer 3 made of polysilicon has an overhang shape as shown in FIG. 2 (a) regardless of whether the ordinary plasma etching method or dilute fluorinated nitric acid etching method is used. Is processed. As a result, there have been problems that a photoresist layer and a metal layer for an electrode are thinly formed in a photolithography process which is a post-process, a disconnection occurs in an electrode wiring, and reliability is lowered.

An object of the present invention is to provide a method of manufacturing a semiconductor integrated circuit having a circuit resistance with improved reliability.

[Means for solving problems]

A method of manufacturing a semiconductor integrated circuit according to the present invention includes a step of forming an insulating film on a semiconductor substrate of one conductivity type, a step of forming a polysilicon layer on the insulating film, and an impurity of one conductivity type in the polysilicon layer. After the ion implantation, a heat treatment is performed at a temperature lower than the heat treatment for activating the impurities, a step of patterning the polysilicon layer heat-treated at the low temperature to form a resistor layer, and then heating the resistor layer at a high temperature. And a step of activating the impurities by heat treatment.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

1 (a) to 1 (c) are cross-sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention.

First, as shown in ,, 1 (a), after forming a first oxide film 2 of S _i O ₂ to P-type semiconductor substrate 1, a polysilicon layer over the entire surface by vapor deposition To do. Subsequently, a large amount of P-type impurities are diffused into the polysilicon layer by ion implantation, and then at a temperature lower than a heat treatment temperature (650 to 800 ° C.) for activating impurities in a later step, the temperature is set to about 10 ° C.
Heat treatment is performed for 120 minutes to make the concentration distribution of the impurities introduced by the ion implantation method uniform as shown by the line B in FIG. Next, a part of the polysilicon layer is etched away by using a normal photo-etching method.

Next, as shown in FIG. 1 (b), the second
Oxide film 4 is formed on the entire surface.

Next, as shown in FIG. 1 (c), high temperature heat treatment (950 to 1000) for activating impurities is performed as in the conventional manufacturing method.
(.Degree. C.) to anneal the resistor layer 3 made of polysilicon, and then the characteristic drawing electrode 5 is formed to complete the circuit resistance.

As described above, in this embodiment, since the polysilicon layer is etched after the impurity concentration distribution is made uniform by the low temperature heat treatment after the ion implantation, the sidewall 3A of the resistor layer 3 has an overhang shape as in the conventional case. There is no fear of becoming. As a result, the photoresist layer and the electrode metal layer are not thinly formed in the photo-etching process and the electrode wiring is not broken, so that the reliability can be greatly improved.

In the above example, the low temperature heat treatment temperature is 650 to 80.
Although 0 ° C. is applied, 850 ° C. to 1000 ° C. is optimum from the sectional shape of the side wall of the resistor layer. However 9
Diffusion layers that have already been formed at a temperature of 00 ° C or higher,
Particularly when a bipolar transistor and a circuit resistor are formed on the same semiconductor substrate, the base diffusion layer formed at a low temperature is subjected to two high temperature heat treatments, that is, this heat treatment of the resistor layer and a heat treatment for forming an emitter in a subsequent step. Therefore, the depth of the base diffusion layer fluctuates so much that it cannot be ignored, and the high-frequency characteristics deteriorate, so that heat treatment at 800 ° C. or higher is practically impossible.

〔The invention's effect〕

As described above, according to the present invention, impurities are introduced into a polysilicon layer, and a heat treatment for impurity activation is performed at a low temperature to make the distribution concentration of impurities uniform, and then patterning is performed to form a resistor layer. It is possible to obtain a semiconductor integrated circuit having a line resistance with improved reliability without breakage of electrode wiring.

[Brief description of drawings]

1 (a) to 1 (c) are sectional views of a semiconductor chip shown in the order of steps for explaining an embodiment of the present invention, and FIGS. 2 (a) to 2 (c) are conventional semiconductor integrated circuit manufacturing processes. FIG. 3 is a cross-sectional view of the semiconductor chip shown in the order of steps for explaining the method, and FIG. 3 is a diagram showing the relationship between the depth of the resistor layer made of polysilicon and the impurity concentration. DESCRIPTION OF SYMBOLS 1 ... P-type semiconductor substrate, 2 ... 1st oxide film, 3 ... Resistor layer, 3A, 3B ... Side wall, 4 ... 2nd oxide film, 5 ... Characteristic extraction electrode.

Claims (1)

[Claims] 1. A step of forming an insulation film on a semiconductor substrate of one conductivity type, a step of forming a polysilicon layer on the insulation film, and ion implantation of impurities of one conductivity type into the polysilicon layer, followed by impurity activation. Heat treatment at a temperature lower than that for heat treatment, and a step of patterning the polysilicon layer heat-treated at the low temperature to form a resistor layer, and thereafter heat-treating the resistor layer at high temperature to activate impurities. A method of manufacturing a semiconductor integrated circuit, comprising: