JPH0618196B2 - Manufacturing method of multilayer wiring - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial field of application> The present invention relates to an improvement in a method of manufacturing a multilayer wiring, which is expected as a metal wiring technology for VLSI.

<Prior Art> High integration of integrated circuits. Multilayer wiring technology has become important as the density becomes higher. However, with the miniaturization of the through holes formed in the interlayer insulating layer, the conventional multilayer wiring technology
The film thickness of the wiring in the through hole becomes thin, and the reliability of the multilayer wiring deteriorates.

For this reason, recently, as shown in FIGS. 2A to 2C, after forming the wiring 22 of the first layer on the semiconductor substrate 21, the first interlayer insulating film 23 is formed, and further thereon. After forming the second wiring 24, a second interlayer insulating film 25 is formed, and then through holes 26 are formed in these interlayer insulating films 23.25, which lead to the wirings 22.24 of the first and second layers, respectively. .27 is opened, then tungsten 2 is placed in the through hole 26.27.
8.28 is selectively formed, and then the third wiring 2 is formed.
A method of forming 9 has been proposed.

<Problems to be Solved by the Invention> However, in the above-described conventional method, when a multilayer wiring structure having three or more layers has through holes having different depths, the difference in the depth of the through holes is caused by the conductor. This is reflected in the flatness after the selective growth, which is the step of burying, and the problem that the coating characteristics of the wiring 29 of the third layer deteriorates in the deep through hole 26 and the reliability of the multilayer wiring deteriorates.

The present invention was devised in view of the above-mentioned points, and a novel multilayer wiring capable of improving the reliability of the multilayer wiring by selectively and flatly growing a conductive material in through holes having different depths. It is intended to provide a way.

<Means for Solving Problems> In order to achieve the above-mentioned object, a method for manufacturing a multilayer wiring of the present invention includes a step of forming a conductor wiring of a first layer on a semiconductor substrate, and a conductor of the first layer. Boron is injected into the wiring Energy 5
A step of implanting 3 × 10 ¹⁶ cm ^{−3 at 0} keV, a step of forming a second-layer conductor wiring on the first-layer conductor wiring via an interlayer insulating film of the first layer, and a step of forming the second layer The step of injecting phosphorus into the conductor wiring at an energy of 100 keV and 5 × 10 ¹⁶ cm ^−3, the step of forming a second interlayer insulating film on the conductor wiring of the second layer, and the second interlayer insulation A step of forming first and second through holes in the film and the first interlayer insulating film, which communicate with the conductor wirings of the first layer and the second layer, respectively, and selective growth in the first and second through holes. With tungsten as a conductor, and a step of forming a third conductor wiring connected to the conductors embedded in the first and second through holes on the second interlayer insulating film. The conductor wiring of the first layer and the second layer described above. Different types of impurity ions are implanted, especially the first layer conductor wiring and the second layer.
By implanting different types of impurity ions into the conductor wiring of each layer, the selective growth rate of the conductor material made of tungsten embedded in the through hole is controlled, and the conductor made of tungsten is selectively and evenly flattened in the through holes having different depths. The material is grown so as to improve the reliability of the multilayer wiring.

<Operation> In the selective growth of tungsten according to the present invention, the impurity species of the impurity ion implantation into the base material are used. The growth rate of tungsten varies depending on the surface concentration and the like. For example, when ¹¹ B ⁺ is implanted at 3 × 10 ¹⁶ cm ^-2 with an implantation energy of 50 keV, compared with the case where no impurity ions are implanted into WSi _x , 5
The growth rate increases by about 0%. Meanwhile, ³¹ P ⁺ is 100 ke
When 5 × 10 ¹⁶ cm ^{-2 is} implanted by V, the growth rate is reduced by about 10%.

Therefore, by implanting different kinds of impurity ions into the conductor wiring of each layer, the conductor material made of tungsten can be selectively and flatly grown in the through hole without being limited to the depth of the contact through hole. As a result, the reliability of multilayer wiring is improved.

<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIGS. 1 (a) to 1 (i) are process diagrams showing an embodiment of a method for manufacturing a multilayer wiring according to the present invention.

First, a WSi _x is deposited at 0.5μm thick by sputtering as shown in FIG. 1 (a) to the semiconductor substrate 1, a first layer WS
i _x wiring 2 is formed. Next, as shown in FIG. 1 (b), ¹¹ B ⁺ is implanted into the entire surface of the first layer WSi _x wiring 2 by ion implantation at 3 × 10 ¹⁶ cm ^-2 at 52 keV to form an impurity ion implantation layer ( B ⁺ ) 3 is formed. Then after 0.8μm deposited an interlayer insulating film 4 by conventional techniques such as CVD, as shown in FIG. 1 (c), the WSi _x by sputtering as shown in FIG. 1 (d) 0. Second layer W with a thickness of 5 μm
The Si _x wiring 5 is formed.

Next, as shown in FIG. 1 (e), ³¹ P ⁺ of 100 keV is applied to the entire surface of the second layer WSi _x wiring 5 by ion implantation.
5 × 10 ¹⁶ cm ^{−2 is} implanted to form the impurity ion-implanted layer (P ⁺ ) 6. Next, as shown in FIG. 1 (f), C
After depositing the interlayer insulating film 7 by 1.2 μm by the conventional method such as the VD method, as shown in FIG. 1 (g), the above-mentioned first insulating film 7 is formed at a predetermined position on the interlayer insulating film 4.7. Through holes 8.9 having different depths reaching the layer and the second layer wiring 2.5 are formed. Then, as shown in FIG. 1 (h), for example, WF is formed in through holes 8.9 having different depths.
_The tungsten 10 is selectively indented and formed by the selective CVD method of tungsten by the H ₂ reduction method of ₆ . Thereafter, as shown in FIG. 1 (i), a third layer Al-Si wiring 11 is formed.

As described above, by implanting different kinds of impurity ions into the conductor wiring of each layer, tungsten can be selectively and flatly grown in through holes having different depths, and the reliability of the multilayer wiring is improved. .

It should be noted that the present invention is not limited to the above-described embodiments, and can be implemented in various modifications without departing from the spirit of the present invention. For example, the impurity ion species to be injected into the conductor wiring of each layer. Injection volume. Injection energy or presence / absence of injection.
It goes without saying that the film thickness of the interlayer insulating film can be appropriately determined. Needless to say, the present invention can also be applied to multilayer wiring having four or more layers. Furthermore, as a conductor material, WSi _x
MOSi _x . It goes without saying that other conductor materials such as Al-Si may be used.

<Effects of the Invention> As described above, according to the present invention, it is possible to selectively and flatly grow a conductor material made of tungsten in through holes having different depths, and as a result, the reliability of multilayer wiring is significantly improved. Can be improved.

[Brief description of drawings]

FIGS. 1 (a) to 1 (i) are views for explaining the steps of one embodiment of the method for manufacturing a multilayer wiring according to the present invention, and FIG.
(a)-(c) is a figure for demonstrating the process of the conventional manufacturing method of a multilayer wiring, respectively. 1 ... Semiconductor substrate, 2 ... First layer WSi _x wiring, 3 ... Impurity ion implantation layer (B ⁺ ), 4 ... Interlayer insulating film I, 5 ...
... second layer WSi _x wire, 6 ...... impurity ion implantation layer ^(P +), 7 ...... interlayer insulating film II, 8.9 ...... through hole, 10 ...... selective growth of tungsten (conductor), 11 ......
Third layer Al-Si wiring.

Claims (1)

[Claims] 1. A step of forming a first-layer conductor wiring on a semiconductor substrate, and implanting boron with an energy of 50 ke in the first-layer conductor wiring.
A step of implanting 3 × 10 ¹⁶ cm ^{−2 with} V, a step of forming a second-layer conductor wiring on the first-layer conductor wiring via a first interlayer insulating film, and a second-layer conductor Inject phosphorus into the wiring Energy 100 ke
A step of implanting 5 × 10 ¹⁶ cm ^{−2 with} V, a step of forming a second interlayer insulating film on the conductor wiring of the second layer, and a step of forming the second interlayer insulating film and the first interlayer insulating film. First and second leads to the conductor wirings of the first and second layers, respectively.
Forming a through hole, filling the first and second through holes with tungsten as a conductor by selective growth, and filling the first and second through holes on the second interlayer insulating film. A step of forming a third-layer conductor wiring connected to the formed conductor, and a method of manufacturing a multi-layer wiring.