JPH061890B2 - Waveform simulator - Google Patents

Description

The present invention relates to a waveform simulator for simulating a signal.

[Description of the Related Art] For example, when a control unit for controlling an internal combustion engine is tested at a prototype stage, signals of various sensors given by the engine operation, for example, a reference pulse for each reference rotation angle of the engine, If it is possible to simulate a rotation angle pulse for each predetermined rotation angle and a needle lift pulse that indicates the actual period of fuel injection, the actual machine test that actually uses the engine must be performed each time the test is performed. It can be avoided, making prototype testing easier.

From such a viewpoint, conventionally, a method of simulating each signal by using a plurality of oscillators or function generators has been adopted.

By the way, since signals such as the reference pulse, the rotation angle pulse, and the needle lift pulse are output in synchronization with the rotation angle of the engine, it is necessary to always synchronize them when simulating. However, in the prior art which uses a signal generating means such as an individual oscillator or a function generator for generating each of these signals, not only is it difficult and troublesome to adjust the synchronization of all the signal generating means, There is a problem that synchronization is likely to be lost due to characteristic variations and the like.

[Object of the Invention] The present invention has been made based on the above viewpoint, and an object thereof is to provide a waveform simulator capable of simulating a plurality of signals in a constantly synchronized state.

[Means for Solving the Object] In the present invention, a plurality of memories for storing waveform data, a means for converting respective stored data read from each memory into an analog, and an analog of one of the memories. The above object is achieved by a waveform simulator having means for frequency-converting the converted output, counting the pulse train, and using the count value as an address to simultaneously access the memories.

[Embodiment of the Invention] FIG. 1 is a block diagram showing an embodiment of a waveform simulator according to the present invention, and reference numerals 1 to 4 in the drawing denote RAMs for storing waveform data. These RAM1-4
The fourth RAM 4 in the memory stores waveform data of a signal that continuously changes, such as a sine wave or a sawtooth wave. Waveform data of arbitrary signals synchronized with the above signals are stored in the other RAMs 1 to 3, respectively.

FIG. 2 is an explanatory diagram showing an example of signals stored in the RAMs 1 to 4, and in this example, a simulation signal supplied to a control unit for controlling a fuel injection amount of a 4-cycle 4-cylinder diesel engine is shown. Has been done. In FIG. 2, the length L on the horizontal axis represents the address space of each of the RAMs 1 to 4, which also represents a signal for two engine revolutions. In the figure, (a) is a reference pulse stored in the first RAM1, (b) is a rotation angle pulse stored in the second RAM2, (c) is a needle lift pulse stored in the third RAM3, and (d) is a fourth RAM4. 3 shows a signal representing a change in the rotational angular velocity of the engine stored in the. The reference pulse (a) is a signal representing a pulse given for each predetermined reference rotation angle of the engine, and is the first RAM.
One is written at a predetermined position in one address space. The rotation angle pulse (b) is a signal representing a pulse given for each rotation angle narrower than the reference rotation angle, and is written in the address space in the second RAM 2 at predetermined intervals. The needle lift pulse (c) is an output pulse of the needle lift sensor attached to the fuel injection valve, that is, a signal indicating the injection start timing, and one pulse is written at a predetermined position of the third RAM 3.
Regarding the reference pulse (a) and the rotation angle pulse (b),
Although shown as a rectangular wave in FIG. 2 as shown in FIG. 2, these pulses are stored in the RAMs 1 and 2 as waveforms similar to the output waveform of the electromagnetic pickup, as shown in FIG. The same applies to the needle lift pulse (c), and a waveform similar to the output waveform of the needle lift sensor is stored in the third RAM 3. The rotational angular velocity of the engine is not constant in each cylinder, but varies depending on the explosive force of each cylinder. The waveform (d) in FIG. 2 represents such a rotational angular velocity as an analog signal having a periodicity that fluctuates in a mountain shape at each explosion, and its waveform data is written in the address space of the fourth RAM 4.

These RAMs 1 to 4 are connected to the address bus 5,
It is connected to the control device 7 via the tri-state buffer 6. The control device 7 includes a CPU 701 and each RAM 1
To an internal RAM 703 for storing waveform data and the like, and an internal ROM 702 for storing control programs and the like,
The data input device 9 connected via the input / output interface 8 is used to create and change the waveform data to be given to the RAMs 1 to 4. The data bus 10 of the controller 7 is the tristate buffer 1
The RAMs 1 to 4 are connected to the RAMs 1 to 4 via 1a to 11d.

Each of the RAMs 1 to 4 has a D / A converter 12 to 1 respectively.
5 and voltage conversion circuits 16 to 19 are provided for each RA.
The output data of M1 to 4 are configured to be converted into analog and output. That is, a reference pulse is applied to the terminal A, a rotation angle pulse is applied to the terminal B, and a needle lift pulse is applied to the terminal C, and these signals are sent to the tested control unit as a simulation signal. In addition, the voltage conversion circuit 19 corresponding to the fourth RAM 4
An analog signal representing a change in rotational angular velocity is applied to the output terminal of the.

The output terminal of the voltage conversion circuit 19 corresponding to the fourth RAM 4 is connected to the V / F converter 20, and the output terminal of this V / F converter 20 is connected to the counter 21. Counter 2
The count output terminal of 1 is the tri-state buffer 22.
It is connected to the address bus 5 via. With such a connection configuration, the V / F converter 20 frequency-converts the analog signal representing the change in the rotational angular velocity, the converted pulse train is counted by the counter 21, and the RAMs 1 to 4 are simultaneously accessed by this count value. It is supposed to do. The counter 21 is configured to be reset by the next output pulse of the V / F converter 20 after reaching the count value corresponding to the final address of each of the RAMs 1 to 4.

The above-described control device 7 has a function of loading the waveform data stored in the internal RAM 703 into the respective RAMs 1 to 4, and when loading the waveform data into the respective RAMs 1 to 4, the respective control data are transmitted via a control bus (not shown). The high-impedance state and the enable state of the tri-state buffers 6, 11a to 11d, 22 are controlled, and at the same time, the RAM 1 to
4 read mode / write mode is controlled, and each RAM1
Load waveform data into ~ 4. That is, each RAM1
4 to 4, the buffer 22 is set to high impedance and the buffers 6 and 11a to 11a are loaded.
Each RAM 1 to 1 by the counter 21 with d enabled
At the same time as stopping the access to RAM 4, the RAMs 1 to 4 are switched to the write mode to load the waveform data stored in the internal RAM 703 into the RAMs 1 to 4. After the loading is completed, the buffers 6 and 11a to 11d are set to high impedance, the buffer 22 is enabled, and at the same time, the RAMs 1 to 4 are switched to the read mode and the counter 2
1 enables each of the RAMs 1 to 4 to be accessed.

With the above configuration, each waveform data regarding the reference pulse (a), the rotation angle pulse (b), the needle lift pulse (c), and the signal (d) representing the rotation angular velocity is transmitted via the data input device 9 to the control device 7. Of the buffers 6 and 11a to 11d are loaded into the internal RAM 703 of
High impedance of the buffer 22 and each RAM1
~ 4 corresponding to the RAM1 ~ 4 through the write mode
Loaded respectively. Upon completion of loading the waveform data, the buffers 6 and 11a to 11d are set to high impedance, the buffer 22 is enabled, and the RAMs 1 to 4 are set to the read mode. Be started.

Since the voltage level of the analog signal (d) representing the rotational angular velocity output from the voltage converter 19 changes, V /
The period of the output pulse train of the F converter 20 changes accordingly, and becomes longer as the voltage level becomes lower and becomes shorter as the voltage level becomes higher. A low voltage level of the signal (d) means that the rotation angular velocity is slow, and a high voltage level means that it is fast. Therefore, the cycle of the output pulse train of the V / F converter 20 becomes longer as the rotation angular velocity becomes slower and becomes shorter as the rotation angular velocity becomes faster. As a result, the access speed of the counter 21 changes according to the change of the rotation angular velocity, and the reference pulse (a), the rotation angle pulse (b) and the needle lift pulse (c) are always synchronized with the change of the rotation angular velocity. It will be output.

When the access to the final address of each of the RAMs 1 to 4 is completed, the counter 21 is reset by the output pulse of the V / F converter 20 which is given first thereafter, and again the respective RAMs are output.
Access from addresses 0 to 1 to 4 is started.

In the embodiment described above, the case where it is applied to the control unit for controlling the fuel injection amount has been described as an example.
It can be widely applied to the case where a signal is synchronously output with respect to a continuously changing analog signal.

A RAM for storing the waveform data in the above embodiment
It is needless to say that the number is not limited and can be increased or decreased according to the number of signals to be simulated.

As described above, according to the present invention, waveform data is stored in each of a plurality of memories, the analog conversion output of one memory is frequency-converted, and each memory is simultaneously accessed by the count value of the pulse train. Therefore, it is possible to output a signal that is always synchronized with the analog output signal of the one memory from the other memory, for example, if used as a test simulator of the control unit for internal combustion engine control, Problems such as difficulty of synchronization adjustment, troublesome adjustment, and loss of synchronization can be solved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a waveform simulator according to the present invention, FIG. 2 is an explanatory view showing an example of signals stored in each RAM of FIG. 1, and FIG. 3 is a reference pulse of FIG. It is a figure which shows an example of the stored waveform of a rotation angle pulse. 1, 2, 3, 4: RAM 12, 13, 14, 15: D / A converter 16, 17, 18, 19: Voltage conversion circuit 20: V / F converter 21: Counter

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-51-112255 (JP, A) JP-A-52-58447 (JP, A) JP-A-55-90128 (JP, A) JP-A-57- 83906 (JP, A) JP 58-161503 (JP, A) JP 54-10814 (JP, A) JP 54-10811 (JP, A)

Claims (1)

[Claims] 1. A plurality of memories for storing waveform data, a means for converting the stored data read from each memory into an analog signal, a frequency conversion of an analog converted output of one of the memories, and a pulse train thereof. And a means for simultaneously accessing the memories by using the count value as an address.