JPH0624320B2 - D / A converter test method and device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is a D / C that converts a digital signal to an analog signal.
The present invention relates to a tester for an A / D converter, and more particularly to a tester for a D / A converter suitable for accurately testing dynamic characteristics even in a high conversion speed range.

[Background of the Invention]

In recent years, development and commercialization of high-speed D / A converters for converting digital data into video signals and outputting the video signals have been activated in high-definition displays of computer terminals and digital TVs. In response to this, there is a demand for development of a test device capable of testing conversion characteristics of these D / A converters in a high-speed frequency range, that is, dynamic characteristics with high accuracy by automatic processing.

Conventionally, as a linearity test method for a D / A converter, Japanese Patent Laid-Open No. 58-1
Some are described in 72560. The outline will be described with reference to FIGS. 4 and 5. In the block diagram of FIG. 4, the clock output from the clock generator 1 is counted by the counter 2
The D / A converter 3 under test receives the count output of the counter 2 as an input and performs D / A conversion. The analog signal output from the D / A converter 3 under test is the standard A / D converter 4
Is input to the control unit 5 and is converted into a digital signal by an A / D conversion instruction output from the control unit 5 at the same rate as the clock and sent to the control unit 5. The control unit 5 compares the expected value with the value obtained by the standard A / D converter 4, and the D / A to be tested is tested.
The characteristics of the converter 3 are evaluated. FIG. 5 is a timing chart of main signals at that time. The waveforms in FIG. 5 are identified as (a), (b), and (c) from the top. (A) is the output of the clock generator 1, (b) is the output of the D / A converter under test, and (c) is the standard A / D from the controller 5.
It is a conversion command pulse given to the converter 4. The counter 2 outputs digital data of +1 increment in synchronization with the counting clock. The D / A converter 3 under test outputs an analog signal that monotonically increases according to the digital data. Then, an A / D conversion instruction is output for each step of the analog signal, and the analog signal is converted into digital data by the standard A / D converter 4.

As can be seen here, the standard A / D converter 4 is the D / A to be tested.
It is operated at the same speed as the converter 3. With this configuration, it is necessary to use the standard A / D converter 4 having higher precision (higher number of bits) than the D / A converter 3 under test, but in general, the D / A converter and the A / D converter Among the converters, the D / A converter is higher in both speed and resolution. Therefore, there is a problem that the conversion speed cannot be increased and the D / A converter 3 under test cannot be applied to the characteristic test in the high speed region in order to maintain the measurement accuracy in the conventional configuration of FIG.

[Object of the Invention]

An object of the present invention is to solve the above-mentioned problems in the prior art, and to enable the characteristic test of the D / A converter under test in a high speed range while keeping the measurement accuracy of the standard A / D converter high. D
The purpose is to provide an A / A converter test device.

[Outline of Invention]

In order to achieve the above object, the present invention supplies arbitrary test digital data to a D / A converter to be tested and outputs an analog signal output from the D / A converter by the A / D converter. A method for testing a D / A converter that performs inverse conversion, stores digital data obtained by the inverse conversion, and performs digital processing, wherein the D / A converter to be tested has a resolution of test signal amplitude. A / D with higher resolution than resolution
With the converter, at a frequency lower than the operating frequency of the D / A converter with respect to the time-axis resolution of the test signal,
Equivalently, A having a resolution higher than that of the D / A converter
D / D conversion, and further in the digital processing,
The test method of the D / A converter is characterized in that the digital data obtained by the A / D conversion is rearranged according to a preset algorithm and then the characteristics are evaluated.

Example of Invention

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention. 6 is a pattern generator, 3 is a D / A converter under test, and 4 is a standard A / D.
A converter, 7 is a memory, 8 is a calculator, 9 is a first clock generator, 10 is a second clock generator, 11 and 12 are frequency synthesizers, and 13 is a reference oscillator.

Frequency F output from frequency synthesizer (I) 11
The signal of _DA is waveform-shaped by the first clock generator (I) 9 and supplied to the pattern generator 6 and the D / A converter 3 under test as a clock of frequency F _DA.
Supplies the D / A converter 3 under test by repeating digital patterns in synchronization with F _DA . The D / A converter 3 under test outputs an analog signal corresponding to the supplied digital pattern to F
Output at _AN frequency. At this time, F _AN is defined by F _AN = F _DA / n when n types of data are repeatedly output by the generation cycle of digital pattern data. On the other hand, the signal of the frequency F _AD output from the frequency synthesizer (II) 12 is waveform-shaped by the second clock generator (II) 10 and stored in the standard A / D converter 4 and the memory 7 as a clock of the frequency F _AD. Supplied and tested D / A
The analog waveform of the frequency F _AN output from the converter 3 is converted again into digital data by the standard A / D converter 4 and stored in the memory 7. By analyzing and evaluating the data thus captured by the computer 8, the D / A to be tested can be measured.
The characteristics of the transducer 3 are tested.

The frequency synthesizers (I) 11 and (II) 12 improve stability by using a highly stable reference oscillator 13 as a common signal source. That is, when each synthesizer is operated independently and there is a change in each set value,
Relative frequency fluctuations cause deterioration of measurement accuracy.On the other hand, if the oscillating sources of each synthesizer are shared, the oscillating sources are common even if there are frequency fluctuations. The deviation does not occur and the accuracy does not deteriorate.

In order to simultaneously test the D / A converter 3 under test at the highest rate, operate the standard A / D converter 4 in a high-accuracy region, and further improve the sampling data density. In addition, the frequency relationship between F _DA and F _AD is expressed as follows: F _AD = F _AN × N / M (1) F _AN = F _DA / n (2) where M and N are prime numbers. Must be set to.

The relationship between the expressions (1) and (2) will be described with reference to FIG. In the following, the waveforms in FIG. 2 are (a), (b), (c),
Specify (d). In FIG. 2, (a) shows D under test.
An example of the output waveform of the A / A converter is shown, and a D / A converter with a 3-bit (8 levels) resolution is taken as an example, and "000" to "11"
It shows a repetitive waveform in the case of increasing by 1 level in 8 steps up to 1 ". At this time, the conversion rate is F _DA , and the frequency F _AN of the repetitive waveform is n = 8 as shown in the equation (2).
In this case, F _AN = F _DA / 8.

(B) is a conversion clock of the standard A / D converter for converting the output of the D / A converter under test into a digital quantity again, and its frequency is F _AD . The A / D conversion data at this time is shown in (c), but the standard A / D converter has a 4-bit resolution higher than that of the D / A converter under test.

If the frequency relationship of F _AD , F _DA , and F _AN is set according to equations (1) and (2) as shown in FIG. 2, repetitive waveforms are obtained at N = 16 points sampled by the standard A / D converter. Therefore, data will be obtained at all different points. However, the sampled data as shown in (c) has a random arrangement, and it is difficult to predict the original waveform as it is, but as shown in (d), the original waveform can be restored by rearrangement. Is possible. The rearrangement algorithm is (x × M) Mod N = W (3) J = x (where W = 1) A _d = (i × J) Mod N (4) where x is 0 to 1 Change W to "1"
Substituting x into the equation (4) as J when
In equation (4), i corresponds to the value in parentheses () of the sample data in FIG. 2 (d), and A _d is the value below the value in parentheses (), that is, the value of data corresponding to the value of i. Indicates the memory address before rearrangement. "0" is added to i in the equation (4).
Subsequent substitution is performed to obtain A _d , and rearrangement is performed as shown in FIG. In FIG. 2, when N = 16 and M = 9 and substituted into the equation (3), J = 9 and i = 0: A _d = 0, i = 1: A _d = 9. Substituting the equation (2) into the equation (1), it becomes F _AD = F _DA × N / (M × n) (5), and in the example of FIG. 2, F _AD ≈0.2 × F _DA and the standard A The conversion clock of the D / A converter can be reduced to about 1/5 of that of the D / A converter under test. Further, the frequency relationship and the data rearrangement operation according to the equations (1) and (2) equivalently sample at a clock faster than F _DA , and in the example of FIG. 2, it is equivalent to sample at twice F _DA. Becomes

Next, another embodiment of the present invention will be described with reference to FIG.
In the following, the waveforms in FIG. 3 are (a), (b),
(C), (d), (e), (f). In the embodiment shown in FIG. 2, as the digital data to be supplied to the D / A converter under test, data which monotonically increases at each step as shown in FIG. 2 (a) is selected, but such pattern is actually used. Is few. In addition, such a monotonically increasing pattern does not make the D / A converter under test so severe. Therefore, by rearranging the patterns as shown in FIG. 3 (a) by the rearrangement operation as shown in FIG. 3 (b), the D / A converter under test becomes a severe digital pattern. The pattern of FIG. 3 (b) is a 3-bit D / A converter as shown in FIG. 3 (a), in which three repeating patterns are changed from "000" to "111" by 8 steps (= N ₁ ) in steps of +1. Extracted with, that is,
They are rearranged in the relationship of M ₁ and N ₁ . The analog output of the D / A converter under test to which such a pattern is input is converted into digital data again by the standard A / D converter. The number of data points, frequency, etc. at this time are n = 8, M
_It shows a case where N ₂ = 8 samples of the D / A converter output under test of ₂ = 5 are sampled by the standard A / D converter. That is, F _AN = F _DA / n = F _DA / 8, F _AD = F
_{Since AN} × N ₂ / M ₂ = F _DA / 5, the standard A / D converter can perform sampling at a frequency sufficiently lower than the conversion rate of the D / A converter under test.

However, the digital data sampled by the above-described relational expression has the form shown in FIG. 3 (d), which is different from the original data in FIG. 3 (a). Therefore, as in the case of the embodiment shown in FIG. 2, the sampled data are rearranged as shown in FIG. 3 (e) and FIG. 3 (f), and FIG.
It is necessary to reproduce the same waveform data as the original data of.
For that purpose, first, the data of FIG. 3 (d) is rearranged as shown in FIG. 3 (e) to reproduce the same waveform data as in FIG. 3 (d) (primary rearrangement of data). The data is rearranged by substituting M ₂ and N ₂ into the equation (3) to obtain J, and substituting the value into the equation (4).

Next, the rearrangement (secondary rearrangement of data) from FIG. 3 (e) to FIG. 3 (f) is performed by substituting M ₁ and N ₁ into the equation (3) to obtain J, and the value thereof is (4) It is done by substituting it in an expression.

Although the test described above is a severe test for the D / A converter under test, the standard A / D converter enables sampling with less burden.

〔The invention's effect〕

According to the present invention, the conversion speed of the standard A / D converter can be made lower than the conversion speed of the D / A converter under test, so that the high measurement accuracy of the standard A / D converter is maintained. The test in the highest speed range of the test D / A converter can be performed, and the data is rearranged to obtain the A / D converted value at a speed equivalent to the D / A conversion speed under test. Tests with high accuracy are possible.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a signal time chart for explaining the operation of the embodiment of FIG. 1, and FIG.
FIG. 4 is a signal time chart for explaining the operation of another embodiment of the present invention, FIG. 4 is a block diagram of a conventional example, and FIG.
FIG. 7 is a signal time chart for explaining the operation of the conventional example. 3 ... D / A converter under test 4 ... Standard A / D converter, 6 ... Pattern generator 7 ... Memory, 8 ... Computer 9 ... First clock generator 10 ... Second Clock generator 11, 12 …… Frequency synthesizer 13 …… Reference oscillator

Claims (3)

[Claims] 1. An arbitrary test digital data is supplied to a D / A converter to be tested, an analog signal output from the D / A converter is inversely converted by the A / D converter, and the inverse conversion is performed. A method for testing a D / A converter that stores the digital data obtained by performing the digital processing and that has a higher resolution than that of the D / A converter to be tested with respect to the resolution of the test signal amplitude. A / D conversion with a D / A conversion and a resolution lower than the operating frequency of the D / A converter with respect to the time-axis resolution of the test signal and equivalently higher than the resolution of the D / A converter. In addition, in the digital processing, the characteristic evaluation is performed in order to reproduce the input signal waveform by rearranging the digital data obtained by the A / D conversion according to a preset algorithm. The method of testing that the D / A converter. 2. A test method for a D / A converter according to claim 1, wherein the D / A converter to be tested operates by a clock having a frequency F _DA and is synchronized with the clock. At least M analog waveform signals of the same pattern of the test signal are repeatedly output, and the A / D converter operates by the clock of the frequency F _AD , and the M analog waveform signals of 1 / F _AD are output. Digital conversion is performed at N points (M and N are relatively prime numbers) at each time interval, and one cycle of the analog waveform signal is a clock signal F.
_It is assumed that _{DA has} n step numbers, whereby the operating frequency F _AD of the A / D converter and the operating frequency F _DA of the D / A converter are F _AD = F _DA × A test method for a D / A converter, which is set to have a relationship of N / (M × n). 3. A conversion clock generating means for defining a conversion speed of a D / A converter to be tested, a test data generating means for supplying arbitrary test digital data to the D / A converter, and the D / A converter. A test apparatus for a D / A converter, which has means for storing digital data obtained by inversely converting an analog signal output from the A converter by the A / D converter and performing digital processing by a computer, the test signal amplitude being A / D conversion is performed at a resolution higher than that of the D / A converter to be tested, and at a frequency lower than the operating frequency of the D / A converter regarding the time-axis resolution of the test signal. Equivalently, A / D conversion with a resolution higher than that of the D / A converter is performed, and the digital data obtained by the A / D conversion is preset in the digital processing. The test apparatus of the D / A converter and performs characterization on which rearranged according to an algorithm for reproducing the input signal waveform.