JPH0625958B2 - Data conversion device by key matrix - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a data conversion device by a key matrix used between a key operation unit of a television receiver and a central control device.

(Prior Art) In recent years, the development of new media devices has been remarkable, and in particular, television receivers are regarded as important as terminal display devices, and accordingly, television receivers are compatible with many media. The number of various operation keys provided on the front surface of the device for operating is increasing.

FIG. 2 shows a circuit configuration of a data conversion device using a key matrix for operating such a conventional television receiver.

In FIG. 2, 1 is a central control unit, 2 is a pull-up resistor, 3 is a strobe line, 4 is a key input data line, 5 is a key matrix, 6 is an output port, and 7 is an input port.

In the operation of this circuit, first, in the central controller 1, active low strobe pulses having mutually different phases are generated, and input to the key matrix 5 from the output port 6 through the strobe line 3. At this time, if any of the keys forming the key matrix 5 is depressed, its strobe pulse is applied to the input port 7 of the central controller 1 via the key input data line 4. Further, when there is no pressed key, a high level signal is applied to the input port 7 as it is. In this way, the central controller 1 recognizes and determines the position where the key is pressed depending on the presence or absence of a signal at the input port 7.

(Problems to be Solved by the Invention) However, in such a configuration, since a large number of strobe lines 3 and key input data lines 4 exist between the central control device 1 and the key matrix 5, the key matrix 5 is omitted. The wiring between the printed board on the front surface of the television receiver and the printed board provided in the central control unit 1 is complicated, assembly is complicated, and the manufacturing cost is high.

In view of the above drawbacks, the present invention latches parallel data, converts serial data and outputs the serial data from a bus line, and a large number of strobes provided between the front printed board and the printed board in the central control unit. The purpose is to abolish the line.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides an input terminal for inputting strobe pulses having different phases output from an output port of a central control device, and a strobe pulse as the key. An output terminal connected to a plurality of strobe lines supplied to the matrix operating section, a parallel signal input terminal from the key matrix operating section, a plurality of latch registers arranged corresponding to the parallel signal input terminal, and a serial signal. A serial signal output latch register having an output terminal connected to the Q output terminal; a three-state buffer provided between the D input terminal of the latch register arranged in the first stage of the plurality of latch registers and ground; Q terminal of the latch register arranged at the final stage of the latch register and the D of the latch register for serial signal output The control signal includes a three-state buffer provided between the input terminal and a plurality of three-state buffers provided between the Q output terminal of each of the plurality of latch registers and the D input terminal of the latch register of the next stage. The data output from the Q output terminal of each latch register is input to the D input terminal of the latch register of the next stage only when it is at the high level.
Of three-state buffers and a plurality of three-state buffers provided between the parallel signal input terminal and each D input terminal of the plurality of latch registers. Only when the control signal is low level, A second three-state buffer group in which data is input to the D input terminal of the latch register, and a control signal input commonly connected to the control terminals of the three-state buffers of the first and second three-state buffer groups. A clock signal input terminal commonly connected to the clock signal input terminals of the plurality of latch registers and serial signal output latch registers, and to each of the strobe pulse output terminal and the parallel signal input terminal of the data converter. With a pull-up resistor installed, each terminal is , So that only the terminal corresponding to the pressed key of the key matrix operating unit becomes low level, connect the serial signal output terminal and the input port of the central control unit via the bus line, and The central control unit controls the television receiver in accordance with the serial signal corresponding to the operation.

(Operation) According to the present invention having the above-described configuration, the strobe line between the central control unit and the television receiver, which has been conventionally required, is unnecessary, so that the number of assembling steps is easy and simplified, thus improving the working efficiency. At the same time, the manufacturing cost can be reduced.

(Examples) Hereinafter, the present invention will be described in detail by examples with reference to the drawings.

FIG. 1 is a circuit diagram showing a data conversion device between parallel data and serial data according to an embodiment of the present invention. In FIG. 1, 11 to 16 are input latch registers, and 17 to
21 and 22 to 27 are three-state buffers, 28 to 31 are pull-up resistors, and 32 to 35 are input / output (I / O)
Data terminals 36, control signals M0, 37 clock signals G0, 38 serial output signals H0, 39 to 42 output buffers. Input / output data terminals 32 to 35
Input and output are determined in advance. For this, the pull-up resistor 2 or the key matrix 5 shown in FIG.
It is assumed that the key matrix is connected to. This data conversion circuit operates as follows.

That is, first, the strobe pulse is output from the input / output data terminals 32 to 35 through the output buffers 39 to 42. Next, when the control signal M0 (36) is at the low level, the three-state buffers 22 to 27 are turned on, and the input / output data terminals after passing through the key matrix.
32 to 35 input signals are input latch registers 11 to 16
Join the data input of. At this time, at the same time, one pulse is input in the clock signal G0 (37) to the input latch register 11
To 16 are latched in the register. Next, the control signal M0 (3
When 6) goes high, the three-state buffers 17 to 21 are turned on. At this time, the clock signal G0
In (37), by adding the clock signal of the latch register of the previous stage to the above register, the above data is shifted and output from the Q output of the input latch register 16 as a serial output signal H038 via a bus line (not shown). Become.

The pull-up resistors 28 to 31 function to keep the input / output data terminals 32 to 35 at a high level in the normal state.

As described above, the present invention latches parallel data from the input / output data terminal by the pulse input to the input latch register when the control signal is low level, and when the control signal is high level, The latched parallel data can be shifted and output from the bus line according to the clock input to the input latch register. Therefore, the strobe line for input / output between the printed boards can be eliminated.

(Effect of the Invention) As is apparent from the above description, the present invention eliminates the input / output strobe line between the printed boards and can connect the key matrix and the central control unit by the bus line, so that the number of wirings is greatly reduced. Therefore, the assembly process can be completed in a short time, work efficiency can be improved, and cost reduction can be expected.

[Brief description of drawings]

FIG. 1 shows a second embodiment of a data conversion circuit according to the present invention.
The figure shows a conventional data conversion device in a key matrix. 11 to 16 ... Input latch register, 17 to 21, 22 to 27 ... Three-state buffer, 28 to 31 ... Pull up resistor, 32 to 35 ...
Input / output data terminal, 36 (M0) ... Control signal, 37
(G0) ... Clock signal, 38 (H0) ... Serial output signal, 39-42 ... Output buffer.

Claims (1)

[Claims] 1. A data converter arranged and connected between a key matrix operating unit of a television receiver and a central control unit for operating and controlling the television receiver by an output signal from the key matrix operating unit. In, an input terminal to which the strobe pulses having different phases output from the output port of the central controller are input, and an output terminal connected to a plurality of strobe lines for sending the strobe pulse to the key matrix operation unit, A parallel signal input terminal to which a parallel signal output from the key matrix operation unit is input, a plurality of latch registers arranged corresponding to the parallel signal input terminal, and a Q output terminal to a serial signal output terminal are connected. Serial signal output latch register, and first stage of the plurality of latch registers A three-state buffer arranged between the D input terminal of the latch register and the ground, a Q output terminal of the final stage latch register of the plurality of latch registers, and a D input terminal of the serial signal output latch register. And a plurality of three-state buffers provided between the Q output terminal of each of the plurality of latch registers and the D input terminal of the latch register of the next stage,
A first three-state buffer group in which the data output from the Q output terminal of each latch register is input to the D input terminal of the next latch register only when the control signal is at a high level, and the parallel signal input A plurality of three-state buffers provided between a terminal and each D input terminal of the plurality of latch registers, and the data from the parallel signal input terminal is the D input terminal of the latch register only when the control signal is at a low level. A second three-state buffer group, a control signal input terminal commonly connected to the control terminals of the three-state buffers of the first and second three-state buffer groups, and the plurality of latches. Common to each clock signal input terminal of the register and the latch register for serial signal output And a clock signal input terminal connection was, by arranging the pull-up resistor to each of the strobe pulse output terminal and the parallel signal input terminals of the data conversion device,
By holding each terminal at a high level in a normal state, only the terminal corresponding to the depressed key of the key matrix operation unit is set to a low level, and the serial signal output terminal and the input port of the central controller are connected. Key matrix data, characterized in that it is connected via a bus line, and the central control unit controls the television receiver according to a serial signal corresponding to an operation of the key matrix operation unit. Converter.