JPH0626295B2 - Filter circuit - Google Patents

Description

The present invention relates to a filter integrated circuit suitable for integrating a filtering circuit (hereinafter referred to as a filter) in a monolithic IC formed on a silicon wafer or the like. is there.

[Background of the Invention]

Conventionally, in order to obtain a desired signal in an electronic circuit, a reduction filter (hereinafter referred to as LPF), a high-pass filter (hereinafter referred to as HPF), a bandpass filter (hereinafter referred to as BPF), and a phase equalizer (hereinafter equalizer). , A large number of external block filters composed of inductance, capacitance, and resistance are used. For this reason, as circuit integration progresses, these filters are a factor for preventing cost reduction, size reduction, and weight reduction. In particular, in a portable VTR, which is desired to be small and lightweight, the integration of filters is an essential technology.

Inductance is unsuitable for integration, and a configuration including only capacitance and resistance is suitable for integration. For example, the Twin-T circuit shown in FIG. 6 is known as a trap filter. In Fig. 6, the resistance and capacitance are respectively Then, the trap frequency _T is Becomes

When the trap filter of FIG. 6 is integrated, a problem of variation arises. That is, the capacitance value and resistance value in the IC are
Due to the influence of variations in the impurity concentration in the semiconductor and mask shift, for example, the absolute value of capacitance is ± 15%, and the absolute value of resistance is ± 10%. Therefore, the trap frequency of the trap filter of FIG. 6 is also from a to b as shown in FIG.
It fluctuates within the range of, and in the above example, it fluctuates up to ± 25%, which is extremely difficult to put into practical use.

As a countermeasure for this, there is a method of absorbing the variation by changing the resistance value on the IC chip by laser trimming as seen in Japanese Patent Publication No. 57-58083, but there are still many problems in terms of accuracy and yield. I have left.

The prior art disclosed in Japanese Examined Patent Publication No. 52-36813 and U.S. Pat. No. 3,761,741 has a variable attenuation circuit that utilizes the fact that the emitter resistance of a transistor changes depending on the emitter current. By the same idea, it is possible to adjust the variation of the filter characteristic due to the variation of the elements in the IC. However, this technique is difficult to apply to a trap filter including resistors R ₁ , R ₂ and R ₃ as shown in FIG. 6, for example, and is difficult to apply to all filters. Furthermore, it must be adjusted from the outside to absorb variations in the IC elements, which causes a cost increase. The conventional technology has the above problems.

[Object of the Invention]

An object of the present invention is to provide a filter integrated circuit capable of automatically absorbing variations in filter characteristics caused by variations in IC internal capacitance and IC internal resistance, ensuring no adjustment and ensuring performance.

[Outline of Invention]

The present invention comprises a reference level generating circuit including a plurality of resistors for receiving a signal having a certain reference frequency and outputting a reference level, a resistor and a junction capacitance for passing the reference signal, and A pseudo filter circuit whose frequency characteristic according to the value is changed according to the first control signal, a detection circuit for amplitude-detecting the output signals of both circuits, and both detection outputs of the detection circuit are A negative feedback circuit is provided for comparing and comparing the comparison output according to the difference between the outputs of the two detection circuits to the junction capacitance of the pseudo filter circuit as the first control signal, and the negative feedback circuit is provided by this negative feedback. The output of the circuit is controlled to be equal. In addition, the resistor and the junction capacitance of the pseudo filter circuit are composed of another resistor and another junction capacitance having a relative accuracy, respectively, and the frequency characteristic according to the value of the other resistor and the other junction capacitance is the second. By providing another desired filter circuit adapted to change in accordance with the control signal and supplying the comparison output as the second control signal also to the other desired filter circuit, Absorbed fluctuations in frequency characteristics due to element variations. Further, since only the AC signals of the outputs of the reference level generation circuit means and the pseudo filter circuit means are supplied to the amplitude detection circuit means, the DC offset applied to the input of the comparison circuit can be reduced, and therefore the element The variations can be absorbed almost completely.

Example of Invention

An embodiment of the present invention will be described below with reference to FIG. First
In the figure, 1 is a reference signal input terminal, 2 is an input terminal, 3
Is an output terminal, 4 is a capacitor connection terminal, 5 is a reference level generation circuit, 6 is a pseudo filter circuit, 7 and 8 are MOS capacitors, 9 is a constant voltage source, 10 and 11 are resistors, and 12 and 13 are amplitude detection circuits. , 14 is a comparison circuit, 15 is a filter circuit, and 16 is a capacitor. The reference signal input from the input terminal 1 is guided to the reference level generation circuit 5 and the pseudo filter circuit 6. The reference level generation circuit 5 obtains the reference level, and the pseudo filter circuit 6 attenuates the level according to the filter characteristic. These outputs are capacitors 7 and 8, respectively.
Is guided to the detection circuits 12 and 13 through which they are detected. The detection outputs are compared by the comparison circuit 14, and the comparison circuit outputs the difference signal. This difference signal is negatively fed back to one end of the junction capacitor 62 that constitutes the pseudo filter circuit 6. The value of the junction capacitance 62 of the pseudo filter circuit 6 changes due to this negative feedback, and the output levels of the reference level generation circuit 5 and the pseudo filter circuit 6 become equal, so the resistor 5
If the ratio accuracy of 1, 52 is sufficiently set, it is possible to absorb the variation in the frequency characteristics of the pseudo filter circuit formed by the resistor 61 and the junction capacitance 62. Further, in a filter circuit 15 including another resistor and another junction capacitance (not shown), the junction capacitance 62 of the pseudo filter circuit 6 is joined to one end of the other junction capacitance. The frequency characteristic of the filter circuit 15 is controlled by the output voltage of the circuit 14. Therefore, if sufficient relative accuracy is maintained between the resistor and the junction capacitance (not shown) forming the filter circuit 15 and the resistor 61 and the junction capacitance 62 of the pseudo filter circuit 6, the filter circuit 15 It is possible to absorb variations in frequency characteristics due to the element.

The reason why the direct current is cut by the capacitors 7 and 8 in the above embodiment is as follows. Since the comparison circuit 14 compares the DC voltage, an error occurs in the comparison output (difference signal) due to the DC offset generated in each part of the circuit, and the element variation cannot be completely absorbed. Therefore, the detection circuits 12, 13
By cutting the direct current offset generated earlier by the capacitors 7 and 8, the direct current offset applied to the input of the comparison circuit 14 can be reduced, and the element variation can be almost completely absorbed. For example, if a color signal carrier is used as the reference signal, the frequency is 3.58MHz, so if the capacitors 7 and 8 and the resistors 10 and 11 are 10pF and 50KΩ, respectively, the cutoff frequency is 320KHz, and the reference signal is sufficiently passed. The size of the device is large enough to be provided in the IC.

FIG. 2 is a block diagram showing another embodiment of the present invention.
In FIG. 2, 17 and 18 are junction capacitors. In the embodiment of FIG. 2, the MOS capacitors 7 and 8 of FIG.
The operation is exactly the same as in the case of FIG. Since the embodiment of FIG. 2 uses the junction capacitance, the chip area can be made smaller than that of the case of FIG.

FIG. 3 is a circuit diagram showing a specific embodiment of FIG.
The circuit operation is exactly the same as in FIG. The filter circuit 15 employs a Twin-T trap circuit, but any form may be used as long as it is a filter circuit including a resistor and a junction capacitance.

FIG. 4 is a circuit diagram showing another specific embodiment of FIG. 2, and according to the embodiment, since the detection circuits 12 and 13 are constituted by the full-wave rectification circuit, the size of the detection capacitor is increased. Can be half the half-wave rectification method of FIG.

FIG. 5 is a circuit diagram showing still another specific embodiment.
In FIG. 5, 19 and 20 are junction capacitors. The embodiment shown in FIG. 5 is obtained by adding junction capacitors 19 and 20 to the embodiment shown in FIG. This junction capacitance is provided for the following purposes. When the frequency of the reference signal is low, the ripple of the detection output is large, and the ripple saturates the comparison circuit 14. In order to reduce this ripple, the junction capacitance 19,
20 is provided to prevent the comparison circuit 14 from being saturated.

〔The invention's effect〕

As described above, according to the present invention, in the unadjusted filter circuit, the input DC offset of the comparison circuit can be reduced, so that there is an effect that the element variation of the filter circuit can be almost completely absorbed.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing another embodiment of the present invention, and FIGS. 3 to 5 are circuit diagrams showing a specific example of FIG. FIG. 6 is a circuit diagram showing a Twin-T trap circuit, and FIG. 7 is a characteristic diagram showing characteristics of the trap circuit. 1 ... Reference signal input terminal 5 ... Reference level generation circuit 6 ... Pseudo filter circuit 7, 8 ... MOS capacitor 9 ... Constant voltage source, 10, 11 ... Resistor 12, 13 ... Amplitude detection circuit 14 …… Comparison circuit, 16 …… Capacitor 17,18 …… Junction capacity

Claims (3)

[Claims] 1. A reference level generating circuit means for attenuating a reference signal by a plurality of resistors having relative accuracy to each other.
It is configured by a first resistor and a first junction capacitance that allow the reference signal to pass, and a frequency characteristic corresponding to the values of the first resistor and the first junction capacitance is in accordance with the first control signal. Pseudo filter circuit means for changing the amplitude, and amplitude detecting circuit means for amplitude detecting the outputs of the reference level generating circuit means and the pseudo filter circuit means, respectively.
A voltage comparison circuit means for comparing the outputs of the two amplitude detection circuit means and generating a comparison output according to the difference between the outputs of both means, and the comparison output from the voltage comparison circuit means to the pseudo filter circuit means. Negative feedback means for negatively feeding back as the first control signal, and a second resistor and a second junction capacitance that have a relative accuracy with the first resistor and the first junction capacitance of the pseudo filter circuit, respectively. And the frequency characteristic according to the values of the second resistor and the second junction capacitance is the second
Of the other filter circuit means, and the comparison output is supplied to the other filter circuit means as the second control signal so that the variation in the frequency characteristics of the other filter circuit means is caused. And a correction means for correcting the signal processing circuit, wherein both the amplitude detection circuit means are supplied with only the AC signals output from the reference level generation circuit means and the pseudo filter circuit means. And filter circuit. 2. A filter circuit according to claim 1, wherein said both amplitude detection circuit means is constituted by a full wave rectification circuit. 3. The filter circuit according to claim 1, wherein said comparison circuit means is an amplifier which amplifies only a DC voltage and does not pass an AC signal.