JPH0628372B2 - Image reader - Google Patents

Description

The present invention relates to an image reading apparatus having a line sensor formed by connecting a plurality of solid-state image pickup devices such as CCDs in a substantially horizontal direction.

[Summary of Disclosure] The present specification and the drawings show, in an image reading apparatus having an image input sensor formed by connecting solid-state imaging devices, lost image data of a joint between solid-state imaging devices is generated from pixel data of adjacent pixels. An image reading device that faithfully reproduces an original image is disclosed.

[Prior Art] Conventionally, in order to lengthen a line sensor, an effective means for determining the signal level of the connection bit data corresponding to the gap between the line sensors when the short sensors are arranged in the horizontal direction and in series has been proposed. Nakatsuta. Further, as a pre-process of image signal processing, there is no particular method of interpolating the connection bit of signals having multi-value gradation levels. Therefore, the reproduced image has a lost image with respect to the original image.

[Problems to be Solved by the Invention] Therefore, as a method of interpolating image data corresponding to the above-mentioned "gap", it is proposed to calculate interpolation data based on image data of pixels in a line in which the gap exists. Has been done.

The present invention has been made in view of the above-mentioned drawbacks of the prior art,
The purpose is to propose an image reading apparatus excellent in image reproducibility by referring to not only lines having a gap but also image data of other lines and performing interpolation.

[Means for Achieving the Object] An image reading apparatus of the present invention for achieving the above object includes a plurality of reading elements arranged on the same line with a predetermined gap, and an image is read by the plurality of reading elements. Reading means for reading each line; calculating means for calculating interpolation data corresponding to the gap between the reading elements based on the image data output from the reading means; and the interpolation data calculated by the calculating means. Forming means for forming image data of one continuous line by inserting into the image data output from the reading means, wherein the calculating means has the gap corresponding to the interpolation data to be calculated. The interpolation data is calculated by performing arithmetic processing with reference to image data of a plurality of lines including a line.

[Operation] According to the image reading apparatus having the above-described configuration, in particular, the calculation unit refers to the image data of a plurality of lines including the line in which the gap corresponding to the interpolation data to be calculated exists, and performs the arithmetic processing, Since the interpolation data is calculated, the output image data has excellent image reproducibility.

[Embodiment] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows the basic configuration of the embodiment. Reference numeral 100 is a delay circuit, 101 is a calculation means, and 102 is a joint timing generation means.

In the above embodiment, the delay circuit 100 outputs the image data to the arithmetic means 101 so as to simultaneously output the image data corresponding to the adjacent pixels, and the arithmetic circuit 101 outputs the joints generated by the joint timing generating means 102. The image data adjacent at the timing is calculated by a predetermined calculation method and output as interpolated image data.

Hereinafter, embodiments according to the present invention will be described in detail with reference to the drawings. FIG. 2 is a schematic view of the CCD line sensor,
Is the CCD line sensor body, 1-a, 1-b, 1-c
Is a chip constituting the line sensor, and 2 is a gap between the chips. The gap 2 has a width of about 1 pixel. The image data of the original image corresponding to the gap 2 is lost. FIG. 3A is a diagram showing peripheral pixels when the pixel data read by the sensor 1 is arranged in the main scanning direction and the sub scanning direction, and the target pixel is A ₀ . Here, it is assumed that the "interpolation data" is data that should be compensated for because the data that should originally be lost due to the joint between the line sensors. In the example of FIG. 3A, "interpolation data" is inserted between A ₂ and A ₃ , A ₀ and A ₅ , and A ₆ and A ₇ . Hereinafter, two specific examples will be shown and described.

[First Embodiment] FIG. 4 is a block diagram showing the first embodiment. In the figure,
Reference numeral 1 is a line sensor composed of a solid-state image sensor such as a CCD, and the output of the line sensor 1 is quantized by an A / D converter 3. The quantized image data is serially transferred to the shift register 4 and the shift register 5 serially in synchronization with RCLK. If the shift registers 4 and 5 are delay elements of 1 pixel,
The outputs R1DATA and R2DATA of each shift register represent image data of horizontally adjacent pixels. In this example, R2
Timing is formed so that DATA is the target pixel.

When the image data corresponding to AO in FIG. 3A is being output to the target pixel R2DATA, the output of the shift register 4
R1DATA outputs image data corresponding to A5 in FIG. 3 (a). By the way, when the pixel of interest is supposed to be “interpolation data”, the image data of the left and right adjacent pixels A ₀ and A ₅ are output from the shift register 5 and the shift register 4, and these are input to the selector 9 at the same time.
One input of the selector 10 is R1 selected by the selector 9.
Either DATA or R2DATA, the other one is R2DATA. The select input CY ₂ of the selector 10 is R2DATA except at the joint, and the output of the selector 9 only at the joint,
Select each one.

The selector 9 selects which of the image data of A ₀ and A ₅ adjacent to the target pixel to be the correction data at the timing when the target pixel R2DATA should be the “interpolation data” by the input of the X terminal. You can In this way, one of the pixels adjacent to the pixel of interest is output from the selector 9,
It is input to the selector 10.

The target image data R2DATA output from the shift register 5 is input to the selector 10 and outputs R2DATA while the timing CY ₂ is “0”. At the timing when CY ₂ is “1”, the output of the selector 9 is selected as “interpolation data”.

By the way, the counter 8 has 1-a, 1-b, 1 in FIG.
It is a counter with a period of a number one greater than the number of bits in the -c chip, counting is started by the horizontal synchronizing signal HSYNC, and CY ₁ is output at the time of counting up. This CY ₁ is phase-matched by the shift register 7 in order to match the phase with the pixel of interest and is output as CY ₂ . This is the timing for forming the "interpolation data". “Interpolation data”
The shift registers 4 and 5 must stop shifting at the timing of generating. Therefore, the signal CY ₂ controls the image transfer clock ICLK by the AND gate 11 and outputs RCLK. RCLK is a partially omitted signal as shown in the timing chart of FIG. 6, is input to the shift registers 4 and 5, and the transfer is stopped when the pixel of interest is "interpolation data".

At this time, "interpolation data" is inserted between A ₀ and A ₅ by the output CY ₂ of the shift register 7, and the value is one of the adjacent image data A ₀ and A ₅ selected by the selector 9. It is selectively output according to the input X.

FIG. 6 is a timing chart corresponding to the above description when the number of bits of the CCD chips 1-a, 1-b and 1-c is "4". The counter 8 outputs CY ₁ in a cycle of 5 clocks after inputting HSYNC, and outputs CY ₂ with a delay of 1 clock. The output of the shift register 5 at this time is R2DATA as shown in FIG. 6, and the result of interpolation of "interpolation data" is DATA in the timing chart. Terminal X in Fig. 4
Depending on the state, any one of the left and right adjacent pixels is selected as the "interpolation data" data. For example, X
When = 0, the image data of the adjacent pixel on the left side is selected as the image data of the "interpolation data", and when X = 1, the image data of the adjacent pixel on the right side is selected. As described above, the correction of the “interpolation data” is performed by setting any of the adjacent pixel data as the “interpolation data” data.

Second Embodiment FIG. 5 is a diagram showing a circuit block of the second embodiment.
In the first embodiment, the image data adjacent to the left and right of the joint is selected as the "interpolation data", whereas the correction of the "interpolation data" is obtained by referring to the data of 7 pixels adjacent to the left, right, top and bottom. Is.

In FIG. 5, the input section of the 3-line memory 21 receives the value obtained by A / D converting the output of the line sensor. The output of the 3-line memory 21 is the shift register 22 and the shift register 2.
5, transferred to the shift register 28 at the same time. These 3
The signals input to the one register are the data of the line preceding the target pixel, the data of the line of the target pixel, and the data of the line next to the target pixel, respectively.

The signals input to the shift registers 22, 25, 28 are RC
It is further transferred to the shift registers 23, 26 and 29 by LK. Let the output of the shift register 26 be the pixel of interest.
Considering that this output is for A ₀ in FIG. 3 (a),
Shift registers 22, 23, 25, 26 and 28, 29
Are output as A ₃ , A ₂ , A ₅ , and A _{0 in} FIG. 3 (a), respectively.
And A ₇ and A ₆ image data. The outputs A ₃ , A ₂ , A ₅ , A ₀ , A ₇ and A ₆ of the shift registers 22, 23, 25, 26, 28 and 29 are input to the arithmetic unit 35. Further, in the present embodiment, the data A ₈ of the “interpolation data” of the previous line stored in the shift register 36 is also input to the arithmetic unit 35. FIG. 3 (b) illustrates the above-described interpolation method, which is A ₀ , A ₂ , A ₃ , A ₅ , A ₆ , A.
Reference numeral ₇ is pixel data read by the line sensor 1, A ₈ is “interpolation data” interpolated in the previous line, and CX is “interpolation data” to be interpolated. The calculation unit 35 performs a calculation to obtain “interpolation data” from the seven pixels around the pixel of interest at the timing when the pixel of interest becomes “interpolation data”, and inputs it to the selector 10. The selector 10 has exactly the same function as in the first embodiment, in which the correction data of "interpolation data" and the target pixel A ₀ are input, and the shift register 7
Depending on the value of the output CY ₂ of the target pixel, the target pixel A ₀ is directly output from the selector 10 when the target pixel is other than the “interpolation data”. The detailed operations of the counter 8, the shift register 7, the selector 10, and the AND gate 11 have been described in the first embodiment, and will be omitted.

In the arithmetic circuit 35, when the pixel of interest is the “interpolation data”, as shown in FIG. 3A, the pixels of the surrounding areas A ₂ , A ₃ , A ₀ , A ₅ , A ₆ , A ₇ Is input to calculate "interpolation data". In the figure, A ₈ is the “interpolation data” of the previous line, which is the value already calculated by the correction data and is output from the shift register 36. By the way, the shift register 36 receives, as its clock input, a signal CY ₂ representing an interval other than “interpolation data”, which is inverted by the inverter 37. This signal CY ₂
The interpolation data is shifted and transferred to the shift register 36 at the rising edge of /. Since the shift register 36 has a capacity corresponding to the number of "interpolation data" in one sensor, the shift register 36 outputs the data of the location of the corresponding "interpolation data" with respect to the "interpolation data" of the next line.

The operation circuit 35 performs the operation of CX = A3 B3 + A2 B2 + A0 B0 + A5 B5 + A6 B6 + A7 B7 + A8 B8 B3 + B2 + B0 + B5 + B6 + B7 + B8. However, B3, B2, B0, B5, B6, B7, B8 ≧ 0.

Here, Bn is a "weight", and its value will be described below as four examples.

Example 1, B3 = B2 = B0 = B5 = B6 = B7 = B8 = 1 Example 2, B3 = B2 = B0 = B5 = B6 = B7 = 1, B8 = 0 Example 3, B0 = 1, B3 = B2 = B5 = B6 = B7 = B8 = 0 Example 4, B0 = B5 = 1, B3 = B2 = B6 = B7 = B8 = 0 As described above, in the present embodiment, the generation of the “interpolation data” is performed by the adjacent 7 pixels. Refer to the data.

As described in the above two embodiments, when the line sensor is composed of several chips and has a connecting portion, by performing the above-mentioned "interpolation", it is possible to easily use the long line sensor which has not been possible in the past. I was able to do things.
In addition, by interpolating "interpolation data" in an image signal of a multi-value gradation level, it is possible to perform faithful image reproduction and handle image data before the binarized binary image. Since "interpolation data" is generated as a preprocessing of the image processing, subsequent image processing such as edge enhancement can be faithfully performed.

As described above, according to the image reading apparatus of the present invention,
It is possible to provide an image reading apparatus having excellent image reproducibility by referring to not only lines having a gap but also image data of other lines and performing interpolation.

[Brief description of drawings]

1 is a basic configuration diagram of an embodiment according to the present invention, FIG. 2 is a structural diagram of a long reading line sensor, FIG. 3 (a) is a diagram showing a pixel of interest and its surrounding pixels, FIG. (B) is a diagram showing a method of generating interpolation data in the second embodiment, FIG. 4 is a circuit block diagram of the first embodiment, FIG. 5 is a circuit block diagram of the second embodiment, and FIG. FIG. 4 is a diagram showing a timing chart of the first embodiment. In the figure, 1 ... Line sensor, 2 ... Chip gap, 3 ...
A / D converter, 4, 5, 7, 7 ... Shift register, 8 ...
Counter, 9, 10 ... Selector, 11 ... AND gate, 21 ... 3-line image memory, 22, 23, 25,
26, 28, 29 ... Shift register, 35 ... Arithmetic circuit, 36 ... Shift register, 37 ... Inverter.

Claims (1)

[Claims] 1. A reading unit having a plurality of reading elements arranged on the same line with a predetermined gap and reading an image for each line by the plurality of reading elements, and image data output from the reading unit. On the basis of the calculation means for calculating the interpolation data corresponding to the gap between the reading elements, and the interpolation data calculated by the calculation means are inserted into the image data output from the reading means to obtain continuous 1 Forming means for forming image data of a line, wherein the calculating means performs arithmetic processing by referring to image data of a plurality of lines including a line in which the gap corresponding to the interpolation data to be calculated exists. An image reading apparatus, wherein the interpolation data is calculated.