JPH0629920B2 - Method for manufacturing liquid crystal electro-optical device - Google Patents
Method for manufacturing liquid crystal electro-optical deviceInfo
- Publication number
- JPH0629920B2 JPH0629920B2 JP57193811A JP19381182A JPH0629920B2 JP H0629920 B2 JPH0629920 B2 JP H0629920B2 JP 57193811 A JP57193811 A JP 57193811A JP 19381182 A JP19381182 A JP 19381182A JP H0629920 B2 JPH0629920 B2 JP H0629920B2
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- liquid crystal
- external connection
- signal
- connection terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 30
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000034 method Methods 0.000 title claims description 8
- 239000000758 substrate Substances 0.000 claims description 11
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 7
- 239000010931 gold Substances 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 229910000679 solder Inorganic materials 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims 4
- 230000005611 electricity Effects 0.000 description 14
- 230000003068 static effect Effects 0.000 description 14
- 230000007547 defect Effects 0.000 description 7
- 230000006378 damage Effects 0.000 description 6
- 238000007740 vapor deposition Methods 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 238000007789 sealing Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000010338 mechanical breakdown Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229910052727 yttrium Inorganic materials 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
【発明の詳細な説明】 本発明は非線型な電圧−電流特性(V−I特性)を有す
る非線型素子によって駆動性能を向上させた液晶電気光
学装置の製造方法に関する。The present invention relates to a method of manufacturing a liquid crystal electro-optical device in which driving performance is improved by a non-linear element having a non-linear voltage-current characteristic (VI characteristic).
非線型素子(バリスタ、ダイオード、金属−絶縁体−金
属素子(以後MIM素子と略称する。)、放電管等)と
液晶電気光学装置を組み合わせることによって従来より
多桁の駆動が実現されることが知られている。これによ
って多量の情報を表示できる液晶表示装置や、より細密
なパターンを可能とする光スイッチ等が実現される。こ
のように多大な利点を有する電気光学装置であるが、非
線型素子を設置することに伴い、従来の液晶電気光学装
置にはみられない様々な問題が現われている。それを以
下に挙げる。By combining a non-linear element (varistor, diode, metal-insulator-metal element (hereinafter abbreviated as MIM element), discharge tube, etc.) and a liquid crystal electro-optical device, multi-digit driving can be realized as compared with the conventional one. Are known. As a result, a liquid crystal display device that can display a large amount of information, an optical switch that enables a finer pattern, and the like are realized. Although the electro-optical device has great advantages as described above, the installation of the non-linear element causes various problems not found in the conventional liquid crystal electro-optical device. These are listed below.
(1)非線型素子を均質に、かつ、欠陥を極めて低いレベ
ルに抑え、大面積に製作する技術 (2)駆動における液晶層と非線型素子性能との電気回路
的なマッチング (3)非線型素子の安定性、信頼性 いずれも重要な問題であるが、液晶パネルを完成した場
合、著しく表示品位を損なうのは画素欠陥である。その
画素欠陥を生じる原因を調べると次のように分類され
た。(1) Technology to fabricate non-linear elements uniformly and to suppress defects to a very low level in a large area (2) Electric circuit matching between liquid crystal layer and non-linear element performance during driving (3) Non-linear Both element stability and reliability are important issues, but when a liquid crystal panel is completed, it is pixel defects that significantly impair the display quality. When the cause of the pixel defect was investigated, it was classified as follows.
(1)非線型素子製作工程での断線、短絡 (2)液晶パネル組立工程での非線型素子の機械的破壊、
静電気による破壊 (3)液晶封入以後、非線型素子の静電気による破壊 また欠陥数から見た場合、静電気による破壊が多くの割
合を占めていた。この原因は主に製造工程中にあった。
従来の製造方法は、第1図に示すように非線型素子を設
置された基板1が製作され次に対向基板2とスペーサー
3を介して組立てられる。そして液晶が封入孔5から封
入され、外部接続端子4及び19が駆動回路に接続され
る。(1) Disconnection and short circuit in non-linear element manufacturing process (2) Mechanical breakdown of non-linear element in liquid crystal panel assembly process,
Destruction due to static electricity (3) Destruction due to static electricity in non-linear elements after liquid crystal encapsulation Also, from the viewpoint of the number of defects, the breakdown due to static electricity accounted for a large proportion. This was mainly due to the manufacturing process.
In the conventional manufacturing method, as shown in FIG. 1, a substrate 1 on which a non-linear element is installed is manufactured and then assembled with a counter substrate 2 and a spacer 3 interposed therebetween. Then, the liquid crystal is sealed through the sealing hole 5, and the external connection terminals 4 and 19 are connected to the drive circuit.
しかしながら、この方法によると一方の基板の外部接続
端子が治具を通じて接地状態となっている時に、人体等
から静電気を受けると非線型素子が破壊されてしまう。
これは次のように理解される。However, according to this method, when the external connection terminal of one substrate is grounded through the jig, if the static electricity is received from the human body or the like, the non-linear element will be destroyed.
This is understood as follows.
液晶パネルの一画素分の等価回路は、第2図のように、
非線型素子6、液晶層の等価容量CLCと液晶層の等価抵
抗RLCで構成されている。いまこの両端に電圧Vが印加
されると、第3図に示すように、Vが印加された瞬間、
非線型素子にVがすべて印加される。この電圧のために
非線型素子は低抵抗、つまりスイッチがONした状態と
なり、液晶層に充電を開始する。こうして液晶層の電圧
が上昇する。次に両端の電圧が下がると、非線型素子の
印加電圧VNLが低下し、高抵抗、つまりスイッチがOF
Fした状態となり、液晶層の電圧VLCは液晶層内部で放
電することによってのみ低下する。この動作から理解さ
れるように、非線型素子によって駆動性能を上げるため
には、非線型素子が液晶層の等価抵抗RLCをはさんでス
イッチングすることが必要である。これによりすみやか
な書き込みと、十分長い電圧の保持が行なわれるのであ
る。以上は、非線型素子によって駆動性能が上がる簡単
な説明であるが、非線型素子の破壊は電圧Vが非線型素
子の耐圧を越えた時に生じるものである。電圧Vが非線
型素子に初期的にかかるのは、第3図に示すように動作
上不可避である。ところで人体の持つ静電気は1000
〜5000V位である。これが非線型素子に印加される
のであるから、破壊されるのは当然とも言える。The equivalent circuit for one pixel of the liquid crystal panel is as shown in FIG.
It is composed of a non-linear element 6, an equivalent capacitance C LC of the liquid crystal layer and an equivalent resistance R LC of the liquid crystal layer. Now, when the voltage V is applied to both ends, as shown in FIG. 3, at the moment when V is applied,
All V is applied to the non-linear element. This voltage causes the non-linear element to have a low resistance, that is, the switch is turned on, and the liquid crystal layer starts to be charged. Thus, the voltage of the liquid crystal layer rises. Next, when the voltage across both ends drops, the applied voltage V NL of the non-linear element drops, and the high resistance, that is, the switch becomes OF
The liquid crystal layer voltage V LC is lowered to F state only by discharging inside the liquid crystal layer. As understood from this operation, in order to improve the driving performance by the non-linear element, it is necessary for the non-linear element to switch across the equivalent resistance R LC of the liquid crystal layer. As a result, quick writing and holding of a sufficiently long voltage are performed. The above is a brief explanation that the driving performance is improved by the non-linear element. However, the breakdown of the non-linear element occurs when the voltage V exceeds the breakdown voltage of the non-linear element. It is inevitable in operation that the voltage V is initially applied to the non-linear element as shown in FIG. By the way, the static electricity of the human body is 1000
It is about 5000V. Since this is applied to the non-linear element, it can be said that the element is destroyed.
第4図は、マルチプレックス駆動の液晶パネルにおけ
る、画素7、電極8及び電極9のトポロジー的にみた立
体回路を表している。非線型素子を付した場合も同様で
あり、第4図の画素インピーダンスZ7を第3図の等価
回路に置き換えた形となる。いまX電極8の中から
Xi、Y電極9の中からYjを選び、この両端からみた等
価回路を描いたものが第5図である。容量10CLijは
Xi電極、Yj電極間の電極間容量である。ここで、C
Lijは、一画素分の電極間容量をC0とすると、C
Lijは、(1)式で表すことができる。FIG. 4 shows a three-dimensional circuit of the pixels 7, the electrodes 8 and the electrodes 9 viewed topologically in a multiplex drive liquid crystal panel. The same applies to the case where a non-linear element is added, and the pixel impedance Z7 of FIG. 4 is replaced with the equivalent circuit of FIG. FIG. 5 is a drawing in which X i is selected from the X electrodes 8 and Y j is selected from the Y electrodes 9 and an equivalent circuit viewed from both ends is drawn. The capacitance 10C Lij is an interelectrode capacitance between the X i electrode and the Y j electrode. Where C
Lij is C when the interelectrode capacitance for one pixel is C 0.
Lij can be expressed by equation (1).
CLij=(N2/(2N−1))・C0……(1) (NはX電極及びY電極の数) この場合、画素サイズを0.5mm2、開口率を95%と
設定したパネルでは、C0=0.4pF、N=100で
CLij=20pFとなる。C Lij = (N 2 / (2N-1)) · C 0 (1) (N is the number of X electrodes and Y electrodes) In this case, the pixel size is set to 0.5 mm 2 and the aperture ratio is set to 95%. In the panel, C Lij = 20 pF when C 0 = 0.4 pF and N = 100.
Z/(N−1)は、Xi電極上、Yj電極上の他画素、Z
/(N−1)2は、Xi,Yj電極いずれにも関係しない
他画素の等価インピーダンスを表わしている。Z / (N-1) is another pixel on the X i electrode and the Y j electrode, Z
/ (N-1) 2 represents the equivalent impedance of another pixel that is not related to any of the X i and Y j electrodes.
従って第5図の回路に人体の等価容量CM11(数百p
F)に数kVの帯電をしているのと等価な静電気を加え
ると、CLij=20pFであるので、Z、Z/(N−
1)、Z/(N−1)2及びZ/(N−1)の直列イン
ピーダンスには、瞬時的に数kVが加えられることにな
る。単位画素当り最も高電圧がかかるのは、もちろん画
素(i,l)であり、画素(i,j)の非線型素子が破
壊され、静電気は中和される。多量の電荷が蓄積されて
いる場合は、他画素とりわけ、Xi電極、Yj電極上の画
素の非線型素子も破壊される。Therefore, in the circuit of FIG. 5, the equivalent capacitance C M 11 (several hundred p
When a static electricity equivalent to being charged by several kV is applied to F), C Lij = 20 pF, so Z, Z / (N−
1), Z / (N-1) 2 and Z / (N-1) series impedance, a few kV is instantaneously applied. The highest voltage per unit pixel is of course applied to the pixel (i, l), the non-linear element of the pixel (i, j) is destroyed, and the static electricity is neutralized. When a large amount of charges are accumulated, other pixels, especially the non-linear elements of the pixels on the X i electrode and the Y j electrode, are destroyed.
従来の製作方法によると、このように外部接続端子から
静電気を拾い易く、非線型素子の破壊が多数発生した。According to the conventional manufacturing method, static electricity is easily picked up from the external connection terminal in this way, and many non-linear elements are broken.
本発明はこのような欠点を除去したもので、その目的は
外部接続端子間を接続することにより、静電気の高電圧
が非線型素子に印加されるのを防止し、欠陥の少ない液
晶電気光学装置を実現する容易な製造方法を提供するこ
とにある。The present invention eliminates such drawbacks, and an object of the invention is to prevent external high voltage of static electricity from being applied to a non-linear element by connecting external connection terminals, and a liquid crystal electro-optical device having few defects. It is to provide an easy manufacturing method for realizing the above.
以下、実施例をあげ本発明を詳しく説明する。Hereinafter, the present invention will be described in detail with reference to examples.
第6図は外部接続端子間を金の蒸着膜16で接続しパネ
ル組立て工程以後を行なった例を示している。信号電極
用外部接続端子19は前もってNiメッキとハンダの電
気メッキを施され、その上に金の接続用蒸着膜16が付
設されている。この状態でパネル組立てされ、液晶封入
がされる。次に駆動回路とパネルが接続されるが、接続
用テープ15(ポリイミドテープに銅ハクが配置されて
いる)を端子に密着させ、上部から加熱する。この時ハ
ンダが溶けテープと端子が接続されると同時に、金の接
続用蒸着膜16はハンダに吸収され、接続されていた端
子群は切り離される。FIG. 6 shows an example in which the external connection terminals are connected by a vapor deposition film 16 of gold and the panel assembling process and subsequent steps are performed. The signal electrode external connection terminals 19 are plated with Ni and electroplated with solder in advance, and a vapor deposition film 16 for gold connection is provided thereon. In this state, the panel is assembled and the liquid crystal is sealed. Next, the drive circuit and the panel are connected, but the connecting tape 15 (copper hut is placed on the polyimide tape) is brought into close contact with the terminal and heated from above. At this time, the solder melts and the terminals are connected to the melted tape, and at the same time, the gold vapor deposition film 16 for connection is absorbed by the solder, and the connected terminals are separated.
第6図に示す実施例では信号電極用外部接続端子は、X
端子間で接続されるが、走査電極用外部接続端子を、Y
端子間で接続してもよい。In the embodiment shown in FIG. 6, the external connection terminal for the signal electrode is X
Connect between the terminals, but connect the external connection terminal for the scan electrode to Y
You may connect between terminals.
この等価回路を描いたものが第7図である。全画素数を
N2コ(X電極、Y電極共にN本)とすると、第2図に
示す一画素分の等価回路のインピーダンスZは、(Z/
N2)となるインピーダンス18となり、一画素分の電
極間容量C0は、N2倍されて電極間容量CL17となっ
ている。X電極とY電極を破線に示すように接続した場
合を考える。いまここで、数kVに帯電した人体の等価
容量11と等価な静電気をX電極とY電極間に加えたと
する。破線で示すように、X電極、Y電極間を接続して
あげれば電荷はすべて破線の回路を通して流れるため、
当然非線型素子に電圧はまったくかからない。このため
破壊は生じない。FIG. 7 illustrates this equivalent circuit. If the total number of pixels is N 2 (N electrodes for both X and Y electrodes), the impedance Z of the equivalent circuit for one pixel shown in FIG. 2 is (Z /
The impedance 18 becomes N 2 ), and the inter-electrode capacitance C 0 for one pixel is multiplied by N 2 to become the inter-electrode capacitance C L 17. Consider a case where the X electrode and the Y electrode are connected as shown by a broken line. Now, it is assumed that static electricity equivalent to the equivalent capacitance 11 of the human body charged to several kV is applied between the X electrode and the Y electrode. As shown by the broken line, if the X and Y electrodes are connected together, all the charge will flow through the circuit shown by the broken line.
Naturally, no voltage is applied to the non-linear element. Therefore, no destruction occurs.
次にX電極、Y電極間を接続していない第6図の実施例
の場合を考える。人体の等価容量11は数百pFであ
り、電極間容量CL17は、N=100、C0=0.4
pFとすると4000pF程度となり、人体の等価容量
CMより1桁大きい。このため、XY電極間に数kV印
加されたとしても、その瞬間CM/(CM+CL)に低下
し、この場合、1/20の数十〜数百Vが非線型素子に
印加されるだけとなる。こうして破壊を避けることがで
きる。また同様な理由から、非線型素子側の外部接続端
子だけを接続した場合、対向基板側の外部接続端子だけ
を接続した場合も、非線型素子にかかる電圧を低下させ
ることができる。しかしこれらの場合、電極間容量が両
基板の端子間を接続した場合に比べ、人体の等価容量を
より大きく上回ることができないので、効果は低下して
しまう。しかし実施上簡便であるという利点も有してい
る。Next, consider the case of the embodiment of FIG. 6 in which the X electrode and the Y electrode are not connected. The equivalent capacitance 11 of the human body is several hundred pF, and the inter-electrode capacitance C L 17 is N = 100, C 0 = 0.4.
If it is pF, it will be about 4000 pF, which is one digit larger than the equivalent capacitance C M of the human body. Therefore, even if several kV is applied between the XY electrodes, the voltage is lowered to the moment C M / (C M + C L ), and in this case, tens to hundreds of V of 1/20 is applied to the non-linear element. It will be only. In this way destruction can be avoided. For the same reason, the voltage applied to the non-linear element can be lowered even when only the non-linear element side external connection terminal is connected or when only the counter substrate side external connection terminal is connected. However, in these cases, the interelectrode capacitance cannot greatly exceed the equivalent capacitance of the human body as compared with the case where the terminals of both substrates are connected, so the effect is reduced. However, it also has the advantage of being simple to implement.
このように短絡、もしくは電極間容量による静電気の吸
収を行なえるように、外部接続端子間を接続した工程を
採用することにより、静電気による非線型素子の破壊を
皆無、もしくは極めて少ない個数に抑えることが可能と
なった。本発明の要旨は、上述のように短絡もしくは電
極間容量による静電気の吸収であるので、外部接続端子
の接続方法は本実施例に何ら限定されるものではない。In this way, by adopting the process of connecting the external connection terminals so that the static electricity can be absorbed by the short circuit or the capacitance between the electrodes, there is no destruction of the non-linear element due to static electricity, or the number is extremely small. Became possible. Since the gist of the present invention is the absorption of static electricity due to the short circuit or the inter-electrode capacitance as described above, the method of connecting the external connection terminals is not limited to this embodiment.
以上、本発明によれば非線型素子を用いた液晶電気光学
装置に特有な、静電気による非線型素子の破壊による欠
陥を防止することができ、表示品位の高い液晶電気光学
装置を実現できる。また、欠陥数が減ることで、製造に
おける歩留まりの飛躍的向上が企れる。As described above, according to the present invention, it is possible to prevent a defect, which is peculiar to a liquid crystal electro-optical device using a non-linear element, due to destruction of the non-linear element due to static electricity, and to realize a liquid crystal electro-optical device with high display quality. Further, by reducing the number of defects, it is attempted to dramatically improve the yield in manufacturing.
本発明は大情報量を取り扱うことのできる非線型素子を
用いた液晶電気光学装置の分野に画期的な製造方法を提
供するものである。The present invention provides an epoch-making manufacturing method in the field of a liquid crystal electro-optical device using a non-linear element capable of handling a large amount of information.
第1図は従来の製造工程を示すものである。 1……非線型素子側基板 2……対向基板 3……スペーサー 4……対向電極用外部接続端子 5……液晶封入孔 19……信号電極用外部接続端子 第2図は一画素分の等価回路である。 6……非線型素子 第3図は電圧Vが印加された時の、上から順に印加電
圧、非線型素子にかかる電圧VNL、液晶にかかる電圧V
LCの時間変化を示す波形である。 第4図はマルチプレックス駆動の液晶パネルの等価立体
回路を表わしている。 7……一画素の等価インピーダンスZ 8……X電極 9……Y電極 第5図はX電極のXi,Y電極のYj間からみた等価回路
を示す。 10……電極間容量 11……人体の等価容量 第6図は本発明による外部接続端子を片側ずつ接続した
場合である。 15……外部接続用テープ 16……端子短絡用金蒸着膜 第7図は第6図のX電極、Y電極からみた等価回路を示
す。 17……電極間容量CL 18……全画素の等価インピーダンスZ/N2 FIG. 1 shows a conventional manufacturing process. 1 ... Non-linear element side substrate 2 ... Counter substrate 3 ... Spacer 4 ... Counter electrode external connection terminal 5 ... Liquid crystal sealing hole 19 ... Signal electrode external connection terminal Fig. 2 is equivalent to one pixel Circuit. 6 ... Non-linear element FIG. 3 shows the applied voltage, the voltage V NL applied to the non-linear element, and the voltage V applied to the liquid crystal in order from the top when the voltage V is applied.
It is a waveform which shows the time change of LC . FIG. 4 shows an equivalent stereoscopic circuit of a multiplex drive liquid crystal panel. 7 ... Equivalent impedance of one pixel Z 8 ... X electrode 9 ... Y electrode FIG. 5 shows an equivalent circuit as seen from between the X electrode X i and the Y electrode Y j . 10 ... Capacitance between electrodes 11 ... Equivalent capacitance of human body FIG. 6 shows a case where the external connection terminals according to the present invention are connected one by one. 15 ... External connection tape 16 ... Gold vapor deposition film for short-circuiting terminals FIG. 7 shows an equivalent circuit seen from the X electrode and the Y electrode in FIG. 17 ... Inter-electrode capacitance C L 18 ... Equivalent impedance Z / N 2 of all pixels
Claims (1)
に対応して配置され前記複数の画素電極に供給する信号
を制御するための複数の非線形素子、前記複数の非線形
素子に信号を供給するための複数本の信号電極及び前記
複数本の信号電極に信号を供給するための複数の外部接
続端子を第1の基板上に形成する第1の工程と、 イ)複数本の対向電極及び前記複数本の対向電極に信号
を供給するための複数の外部接続端子を第2の基板上に
形成する第2の工程と、 ウ)前記第1の基板と前記第2の基板との間に液晶を封
入する第3の工程と、 エ)前記複数本の信号電極に信号を供給するための複数
の外部接続端子に第1の外部駆動回路を接続する第4の
工程と、 オ)前記複数本の対向電極に信号を供給するための複数
の外部接続端子に第2の外部駆動回路を接続する第5の
工程とを有する液晶電気光学装置の製造方法において、 カ)前記第4の工程の前には、前記複数本の信号電極に
信号を供給するための複数の外部接続端子の最上部にハ
ンダ薄膜層を形成し、その後前記複数本の信号電極に信
号を供給するための複数の外部接続端子を、金薄膜層で
互いに電気的に接続する工程を有し、 キ)前記第4の工程中、前記複数本の信号電極に信号を
供給するための複数の外部接続端子と第1の外部駆動回
路とを接続する際に、前記接続部に熱を加えて前記金薄
膜層の金を前記ハンダ薄膜層に吸収させて、前記複数本
の信号電極に信号を供給するための複数の外部接続端子
を互いに電気的に切り離す ことを特徴とする液晶電気光学装置の製造方法。1. A) A plurality of pixel electrodes, a plurality of non-linear elements arranged corresponding to the plurality of pixel electrodes for controlling signals supplied to the plurality of pixel electrodes, and a signal to the plurality of non-linear elements. A first step of forming a plurality of signal electrodes for supplying and a plurality of external connection terminals for supplying a signal to the plurality of signal electrodes on a first substrate; and b) a plurality of counter electrodes. And a second step of forming a plurality of external connection terminals for supplying signals to the plurality of counter electrodes on a second substrate, and c) between the first substrate and the second substrate. A third step of encapsulating liquid crystal in, d) a fourth step of connecting the first external drive circuit to a plurality of external connection terminals for supplying signals to the plurality of signal electrodes, and e) the above Second external connection terminals for supplying signals to the plurality of counter electrodes 5. A method for manufacturing a liquid crystal electro-optical device, comprising: a fifth step of connecting an external drive circuit to the step of: (4) before the fourth step, a plurality of electrodes for supplying a signal to the plurality of signal electrodes are provided. A step of forming a solder thin film layer on the top of the external connection terminals, and then electrically connecting a plurality of external connection terminals for supplying a signal to the plurality of signal electrodes with a gold thin film layer; G) During the fourth step, when connecting a plurality of external connection terminals for supplying a signal to the plurality of signal electrodes and a first external drive circuit, heat is applied to the connection portion to apply the heat. Manufacturing of a liquid crystal electro-optical device, characterized in that gold in a gold thin film layer is absorbed by the solder thin film layer, and a plurality of external connection terminals for supplying signals to the plurality of signal electrodes are electrically separated from each other. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57193811A JPH0629920B2 (en) | 1982-11-04 | 1982-11-04 | Method for manufacturing liquid crystal electro-optical device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57193811A JPH0629920B2 (en) | 1982-11-04 | 1982-11-04 | Method for manufacturing liquid crystal electro-optical device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5983189A JPS5983189A (en) | 1984-05-14 |
| JPH0629920B2 true JPH0629920B2 (en) | 1994-04-20 |
Family
ID=16314153
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57193811A Expired - Lifetime JPH0629920B2 (en) | 1982-11-04 | 1982-11-04 | Method for manufacturing liquid crystal electro-optical device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0629920B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61121080A (en) * | 1984-11-19 | 1986-06-09 | 松下電器産業株式会社 | Manufacture of thin film transistor array |
| JPS6266231A (en) * | 1985-09-19 | 1987-03-25 | Seiko Epson Corp | liquid crystal display element |
| JP2013222087A (en) * | 2012-04-17 | 2013-10-28 | Seiko Epson Corp | Electrophoretic display device and manufacturing method for the same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS54141155A (en) * | 1978-04-25 | 1979-11-02 | Sharp Corp | Production of liquid crystal cell |
| JPS5694764A (en) * | 1979-12-28 | 1981-07-31 | Fujitsu Ltd | Protection method of semiconductor device |
| JPS57108350U (en) * | 1980-12-25 | 1982-07-03 | ||
| JPS57136676A (en) * | 1981-02-18 | 1982-08-23 | Hitachi Ltd | Liquid crystal display element |
-
1982
- 1982-11-04 JP JP57193811A patent/JPH0629920B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5983189A (en) | 1984-05-14 |
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