JPH0630375B2 - Shielding structure for isolation region of semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a shield structure for an isolation region of a semiconductor device such as an integrated circuit, more precisely, dividing a semiconductor substrate into partial regions where circuit elements are to be formed, and The present invention relates to a structure that electrostatically shields a separation region in a portion where a conductive wiring layer extends over the separation region that electrically separates the partial regions from each other by a semiconductor junction.

[Conventional technology]

In a composite semiconductor device in which a plurality of circuit elements are formed in the same semiconductor substrate such as the integrated circuit described above, a plurality of semiconductor substrates are electrically separated from each other in order to eliminate mutual interference between the circuit elements through the substrate. Dividing into individual partial areas and forming circuit elements or circuit elements in the respective partial areas. Dielectric isolation is also known as a means for isolating sub-regions from each other, but an isolation region having a conductivity type opposite to that of the sub-regions is interposed between the sub-regions so that the sub-regions can be formed during operation of the circuit element. In many cases, so-called junction isolation is applied in which a reverse voltage is applied to the semiconductor junction between the partial regions and the isolation region by the applied voltage to electrically isolate the partial regions from each other.

Circuit elements such as transistors, diodes, and resistors are formed in each of the junction-separated partial regions. However, since it is a composite semiconductor device, it is necessary to connect the circuit elements. A wiring layer made of aluminum or the like is provided on the insulating film such as the deposited or grown oxide film. Since this wiring layer connects the circuit elements formed in the respective partial regions, a portion which crosses over the isolation region interposed between the partial regions is inevitably generated. However, since the insulating film that insulates the wiring layer from the substrate is usually a thin film of about 1 μm, when a high voltage is applied to the wiring layer, charges due to electrostatic induction are generated on the surface of the underlying substrate through the insulating film. It may occur that the separation function of the separation region is lost on the extremely thin surface under the insulating film. This is shown in FIG.

In FIG. 3, the substrate 11 of the semiconductor substrate 10 is, for example, p-type silicon, and a strong n-type embedded diffusion layer 12 and a strong p-type embedded separation layer 13 are diffused on the surface of the substrate 11 and then the n-type is formed. The epitaxial layer is divided into the partial regions 14 by growing a high resistance epitaxial layer and deeply diffusing the isolation region 15 with a strong p-type from the surface thereof to communicate with the buried isolation layer 13. The n-type partial region 14 normally becomes a collector region when a transistor is formed therein, and a wiring layer 40 which makes conductive contact with the collector connection layer 18 diffused by a strong n-type therein.
Gives a positive voltage. On the other hand, since the base body 11 is used while being grounded during the operation of the circuit elements, the n-type partial region 14 is used.
A reverse voltage is applied to the semiconductor junction between the p-type isolation region 15 and the p-type isolation region 15, and as a result, the n-type partial region 14 and the buried diffusion layer 12 are formed into the base 11 and the buried separation layer 13. And the isolation region 15 is an island region that is electrically floating in the p-type sea.

The wiring layer 40 is insulated from the substrate 10 by the thin insulating film 20, but in the portion where it crosses over the isolation region 15, the positive voltage thereof causes an n-type charge on the extremely thin surface 15a of the isolation region 15 under the insulating film. Is electrostatically induced. The isolation region 15 is a strong p-type and its conductivity type is not basically inverted by some n-type charges, but impurities doped on the surface near the insulating film are easily absorbed by the insulating film, Since the impurity concentration is often lower than that of the bulk part,
On the extremely thin surface 15a, when a high voltage is applied to the wiring layer 40, the conductivity type may be inverted due to the electrostatic induction. When the inversion channel under the wiring layer is generated in this manner, electrical connection occurs between the partial regions that were separated by the oblique junction, and interference occurs between the circuit elements. In order to avoid this, the thickness of the insulating film should be increased,
Since it is difficult to prevent the inversion of the surface of the isolation region when the voltage applied to the wiring layer is several hundreds V, it has been conventionally practiced to provide a shielding film between the wiring layer and the isolation region.

FIG. 4 shows this conventional example, in which the insulating film has a two-layer structure composed of a first insulating film 21 and a second insulating film 22, and a conductive shield such as polysilicon is provided between the two. Membrane 50
Is provided to make conductive contact with the surface of the separation region 15. In this case as well, electrostatic induction occurs when a high voltage is applied to the wiring layer 40, but the resulting charge only occurs on the upper surface 50a of the shielding film 50 and does not occur on the surface of the isolation region 15, so that the surface layer Inversion of the conductivity type does not occur, so that the separation function of the separation region is not impaired by electrostatic induction. If the shield film 50 is not conductively connected to the separation region 15, the shield film does not have the same potential as the separation region but has an intermediate potential between it and the wiring layer, and the shield film is separated by electrostatic induction by the intermediate potential. Since charges are generated on the surface of the region in the same amount as when there is no shielding film, it is necessary to make conductive connection with the shielding film so that the shielding film has the same potential as the separation region in order to obtain the shielding effect.

[Problems to be solved by the invention]

However, when the shielding film as described above is provided, there is a problem that the insulation reliability between the wiring layer and the isolation region tends to be lower than when the shielding film is not provided. As described above, the insulating film when the shielding film is provided has a two-layer structure of the first insulating film 21 and the second insulating film 22, and the first insulating film 21 is a shielding film.
Since 50 has the same potential as the isolation region 15, it does not serve to share the voltage at all, and therefore the second insulating film 22 exclusively bears the voltage. However, this second insulating film 22
In comparison with the first insulating film 21 provided on the flat surface of the substrate 10 which is a single crystal, it is difficult to obtain a high quality one, and the electric field concentration by the corners of the shielding film 50 is difficult. Since it is affected by an unequal electric field such as, the reliability of the insulation is likely to deteriorate. Of course, the dielectric strength value itself is not inferior, and a sufficient margin is provided for the operating voltage, but it is difficult to reduce the probability of dielectric breakdown when an abnormally high voltage is applied to the wiring layer. . If the insulating film should be destroyed, the semiconductor device itself will be damaged and the circuit will easily malfunction. In the worst case, the external circuit or device may be damaged.

It is an object of the present invention to obtain a shielding structure for a separation region of a semiconductor device which maintains the function of the separation region and does not damage the semiconductor device or its external circuit even if the insulating film should be destroyed. To do.

[Means for solving problems]

According to the present invention, a first insulating film on the isolation region side, a second insulating film on the wiring layer side, and a resistive shielding film between both insulating films are provided between the wiring layer and the isolation region as a shielding structure for the isolation region. The above-described object is achieved by providing the shield film and conductively connecting the shielding film to the separation region at a position away from the overlapping portion with the wiring layer.

As the resistive shield film in the above structure, a polysilicon film having a relatively small film thickness of about 0.5 μm is preferable, and if necessary, a lightly doped polysilicon film, for example, p-type is used.
The distance from the overlapping part of the shielding film with the wiring layer to the connection part with the isolation region varies depending on the specific resistance value of the shielding film, but when the working voltage is about 100 V, the resistance value of the shielding film between them is Should be at least 10 kΩ.

[Action]

As can be seen from the above-described configuration, also in the present invention, providing the first insulating film, the second insulating film, and the intermediate shielding film between the wiring layer and the isolation region thereunder is the same as in the prior art. However, in the present invention, a resistive shield film is used, and the connection portion of the shield film with the isolation region is separated from the overlapping portion with the wiring layer so that the shield film therebetween has a predetermined resistance value. Since the shield film is connected to the isolation region at this connection portion, the shield film below the wiring layer has the same potential as the isolation region in a normal state in which the insulation film is not broken, and thus the first insulation film No electric field is applied, and the second insulating film exclusively bears the voltage between itself and the wiring layer. Of course, in this normal state, charges are generated in the shielding film by electrostatic induction of the voltage of the wiring layer, but no charges are generated on the surface of the separation region, so that the function of the separation region is not impaired.

If an abnormal voltage is applied to the wiring layer for some reason, dielectric breakdown may occur in the second insulating film between the wiring layer and the shield film. In the present invention, the current value at that time is the resistance value of the shield film. It is limited by and does not grow to a large value. The resistance value necessary to limit this current value to the extent that it does not damage the semiconductor device may be about 10 kΩ or more as described above, but if the resistance value is further selected to be larger by one digit or more, the second insulating film It becomes possible to reduce the damage of oneself. The abnormal voltage that triggers the dielectric breakdown is often a spike voltage for a very short time, and limiting the current flowing within that short time to a small value may cause irreparable damage to the second insulating film. This is because it can be prevented. If the abnormal voltage is a spike voltage, by preventing it from developing into a large current in this way, the insulation breakdown can be a temporary breakdown of the insulation, and after the abnormal voltage disappears, the insulating film usually recovers its original withstand voltage performance. To do.

However, if dielectric breakdown occurs in the second insulating film even within a short time as described above, the lower portion of the shielding film under the wiring layer becomes substantially the same potential as the wiring layer, and the potential between the shielding film and the isolation region is increased. A voltage is applied to the first insulating film, and charges are induced on the surface of the separation region. Of course, even if the charge is induced in this way, the conductivity of the surface of the separation region is not likely to be reversed, and even if the reversal occurs, the function of the separation region is lost before the function of the separation region is lost. It takes time,
If the abnormal voltage is a spike voltage for a short time, the separation function is unlikely to be lost. However, if dielectric breakdown occurs up to the first insulating film during this time, there is no way to limit the current, so that the semiconductor device may be damaged. Therefore, in the present invention, the first
The thickness of the insulating film is selected to be larger than that of the second insulating film, so that even if the second insulating film causes dielectric breakdown or breakdown, the probability of dielectric breakdown to the first insulating film is made small. Is desirable.

As can be seen from the above description, in the case of the present invention, the probability that damage will occur in the device of the present invention is the product of the probability that the first insulating film and the second insulating film will each have a dielectric breakdown, and is extremely small. Value. Further, the probability that the isolation function of the isolation region is lost even temporarily depends on the probability of dielectric breakdown of the second insulating film, the probability that the surface of the isolation region is reversed, and the probability that the abnormal voltage is not a short time such as a spike voltage. This is a product, which is also a sufficiently small value.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 and 2. The parts common to those in FIGS. 3 and 4 preceding these figures are designated by the same reference numerals, and the description thereof will be omitted.

A high breakdown voltage npn transistor is incorporated in the n-type partial region 14 of FIG. 1 (a), and the p-type base layer 1 is shown in the figure.
6, a strong n-type emitter layer 17 and a strong n-type collector connection layer 18 are shown. In order to increase the breakdown voltage of this transistor, the depth of the partial region 14 that is the collector layer is 25
The width of the separation region 15 for separating the partial region 14 in terms of electric potential is also as wide as about 40 μm. The separation region 15 surrounds each of the partial regions 14 as shown by the partial hatching in FIG. Further, in this plan view, the contours of the respective layers 16 to 18 of the transistor are shown, and the state in which these are connected to the collector wiring layer 41, the emitter wiring layer 43, and the base wiring layer 44 is shown. All of these wiring layers are connected to other partial regions across the isolation region 15, but the collector wiring layer 41 to which the highest voltage is applied is the isolation region 15.
A shielding film 30 according to the present invention is provided at a location crossing.

The shielding film 30 in this embodiment is grown on the first insulating film 21 having a film thickness of about 1 μm, which is usually a thermal oxide film, on the substrate 10 to a film thickness of about 0.5 μm by a normal low pressure CVD method or the like. Polysilicon film, 500kΩ ~ 1 per square
It is an undoped layer having a high sheet resistance of MΩ. As shown in FIG. 1 (a), this shielding film 30 has a separation region 15
Although it is slightly narrower than the width of the isolation region 15, it has a width that almost covers the isolation region, and one end 30a thereof is projected from the collector wiring layer 41 by about 2 to 3 μm as shown in FIG. The surface is completely shielded from the influence of the voltage of the wiring layer. Shielding film
The other end 30b of 30 extends downward in the figure along the isolation region 15, and a window opened in the first insulating film 21 as shown in FIG. It is in conductive contact with the surface of the isolation region 15 via 21a. Shielding film in this embodiment
30 has a high resistance of about 1 MΩ from the overlapping portion with the collector wiring layer 41 to the conductive connection portion with the upper isolation region 15. After providing the shielding film 30 on the first insulating film 21 in this way, the second insulating film 22 is deposited on the entire surface of the substrate 10 to a thickness of 0.5 to 0.7 μm. The second insulating film 22 may be a normal silicon oxide film, and each semiconductor layer in the partial region 14 may be formed through a window opened in the second insulating film 22 and the previous first insulating film 21. An aluminum wiring layer 40 is deposited so as to be conductively connected to and is patterned into a shape as shown through a normal photo process.

As can be seen from the above film thickness, the first insulating film 21 in this embodiment has a much higher breakdown voltage than the second insulating film 22, and the semiconductor device is damaged even when the second insulating film 22 is dielectrically broken down. Be safely protected from. On the other hand, since the resistance value of the shielding film 30 is considerably high, even if the second insulating film 22 is dielectrically broken down by an abnormal voltage for a short time, almost no current flows through the breakdown path, and the insulation breakdown actually occurs. Therefore, the second insulating film 22 is rarely completely destroyed.

FIG. 2 shows a different embodiment of the present invention. In this embodiment, as can be seen from FIG. 2 (a), the shield film 30 is commonly used for the two collector wiring layers 41, 42 across the isolation region 15. Is provided. Also in this embodiment, the first insulating film 21 has a higher breakdown voltage value as the film thickness becomes larger than that of the second insulating film 22, but the polysilicon film as the shielding film 30 is formed of 10 ¹³ atoms by the ion implantation method, for example. / P with a dose of about cm ²
It is doped in shape and has a sheet resistance of about 20 to 30 kΩ per square. The same figure (b) which is the BB cross section of the same figure (a)
As can be seen from the above, the shielding film 30 has a width that substantially covers the entire width of the isolation region as in the previous embodiment, and the left end 30a thereof is also slightly projected from the left wiring layer 41, but its right end 30b is made of aluminum. It is conductively connected to the isolation region 15 via the wiring layer 31.
One end of the wiring layer 31 is in conductive contact with the shielding film 30 through the window 22a of the second insulating film 22 and the other end is the window of the first insulating film 21.
Conductive contact is made with the strong p-type isolation region 15 via 21a. As can be easily understood, this wiring layer 31 can be formed at the same time as the other wiring layers 41, 42 and the like.

In the case of this embodiment, the shielding film 30 has a resistance value of about 50 kΩ between the overlapping portion with the wiring layer 42 on the right side thereof and the connection portion of the right end 30b thereof, and the second insulating film below the wiring layer 42. When 22 has a dielectric breakdown, the resistance value of 50 kΩ enters in series, but when the second insulating film 22 under the wiring layer 41 on the left side has a dielectric breakdown, a resistance value of about 100 kΩ, which is about twice that, is connected in series. enter. Even if the series resistance of the shielding film 30 is changed to this extent in the quantity wiring layers 41, 42, the shielding effect is not particularly affected.

As can be seen from the above examples, the present invention can be implemented in various modes, including the resistance value of the shielding film and the shielding target. In the above embodiments, the partial region in which the circuit elements are formed is n-type, and the isolation region or the base is p-type. However, even if the conductivity type is reversed, there is no problem in implementing the present invention. Of course there is no.

〔The invention's effect〕

As described above, in the present invention, the semiconductor substrate is divided into the partial regions in which the circuit elements are to be formed, and the conductive wiring layer is formed on the separation region that electrically separates the partial regions from each other by the semiconductor junction. As a structure that electrostatically shields the isolation region in the crossing portion from the wiring layer, a first insulating film on the isolation region side between the wiring layer and the isolation region and a second insulating film between the wiring layers are provided.
The insulating film and the resistive shielding film between both insulating films are provided, and the shielding film is configured to be conductively connected to the separation region at a position away from the overlapping portion with the wiring layer. It is placed at the same potential as the isolation region, the conductivity type of the surface of the isolation region under the wiring layer is not reversed by electrostatically induced charge, and the isolation effect is not lost. Dielectric breakdown occurs in the second insulating film directly under the wiring layer. Since the resistance of the shielding film is inserted in series in the breakdown path when the current occurs, the breakdown current does not grow to a large value as in the conventional case, and the device of the present invention is damaged or affected by external circuits or devices. There is no risk of ripples. When the power supply voltage to the semiconductor device is about 100V, the resistance value of the shielding film is 10kΩ
With the above, the semiconductor device can be protected from damage, but by further increasing the resistance value by about one digit, the insulation breakdown can be stopped at the insulation breakdown and the insulation film can also be protected from permanent damage. Further, when an abnormal voltage is applied and dielectric breakdown or breakdown occurs in the insulating film, it is not necessary to guarantee the isolation performance of the isolation region according to the conventional wisdom.
If the thickness of the insulating film is selected to be larger than that of the second insulating film, the probability that the separation function is lost can be made sufficiently low, and at the same time, the protection of the semiconductor device can be made more complete.

As described above, the shielding structure for the isolation region of the semiconductor device according to the present invention guarantees the isolation performance of the isolation region against a normal short-time abnormal voltage, except when an extremely abnormal voltage is applied to the semiconductor device. It is expected that it can fulfill the roles of both and the protection of the semiconductor device almost completely, and contributes to the improvement of the operation reliability of the semiconductor device.

[Brief description of drawings]

1 and 3 relate to the present invention, of which FIG. 1 shows an embodiment of a shielding structure for isolation regions of a semiconductor device according to the present invention, in which an enlarged vertical cross-sectional view, a plan view and a main part thereof are shown. 2 is an enlarged plan view of a part of a semiconductor device showing another embodiment of the present invention and a cross-sectional view of a main part. FIG. 3 and subsequent drawings relate to the related art, and FIG. 3 is a partially enlarged vertical sectional view of a semiconductor device having no shielding structure, and FIG. 4 is a partially enlarged vertical sectional view of a semiconductor device having a conventional shielding structure. In the figure, 10: semiconductor device, 11: substrate substrate, 12: buried diffusion layer, 1
3: buried isolation layer, 14: partial region or epitaxial layer, 15: isolation region, 15a: surface of isolation region, 16: base layer of transistor, 17: emitter layer of transistor, 1
8: transistor collector connection layer, 20: insulating film, 21:
First insulating film, 22: Second insulating film, 21a, 22a: Window, 30:
Shielding film, 30a, 30b: Edge of shielding film, 40: Wiring layer, 41, 42:
Collector wiring layer, 43: emitter wiring layer, 44: base wiring layer, 50: conventional shielding film, 50a: charge induction part of the shielding film,
Is.

Claims (10)

[Claims] 1. A separation in a portion where a conductive wiring layer extends over a separation region in which a semiconductor substrate is divided into partial regions where circuit elements are to be formed, and the partial regions are electrically separated from each other by a semiconductor junction. A structure for electrostatically shielding an area from a wiring layer, wherein a first insulating film on the isolation area side, a second insulating film on the wiring layer side, and both insulating films are provided between the wiring layer and the isolation area. A shield structure for a separation region of a semiconductor device, comprising: a resistive shield film, and the shield film being conductively connected to the separation region at a portion apart from an overlapping portion with a wiring layer. 2. The isolation structure for a semiconductor device according to claim 1, wherein the thickness of the first insulating film is larger than that of the second insulating film. Shield structure. 3. The shielding structure according to claim 1, wherein the resistance value from the overlapping portion of the shielding film with the isolation region to the conductive connection portion with the isolation region is 10 kΩ or more. A shield structure for isolation regions of a semiconductor device. 4. The shield structure for a separation region of a semiconductor device according to claim 1, wherein the shield film is a polysilicon film. 5. The shield structure for a separation region of a semiconductor device according to claim 4, wherein the polysilicon film has a film thickness of about 0.5 μm. 6. A shield structure for isolation regions of a semiconductor device according to claim 4, wherein the polysilicon film is weakly doped. 7. The shielding structure according to claim 6, wherein the polysilicon film is 10 ¹³ atoms / nm by an ion implantation method.
A shield structure for an isolation region of a semiconductor device, which is p-type doped with a dose of about cm ² . 8. The semiconductor device according to claim 1, wherein the shielding film is provided so as to substantially cover the width of the isolation region at an overlapping portion of the wiring layer and the isolation region. Shielding structure for the separation area. 9. The shield structure according to claim 1, wherein the shield film extends along the direction in which the isolation region extends from the overlapping portion with the wiring layer, and the isolation region and the conductive region are electrically conductive in the extension portion. A shield structure for an isolation region of a semiconductor device, characterized in that the shield structure is connected to a semiconductor device. 10. The shielding structure according to claim 9, wherein the distance from the overlapping portion of the shielding film with the wiring layer to the connecting portion with the isolation region is set to be twice or more the width of the shielding film. A shield structure for a separation region of a semiconductor device, comprising: