JPH0630687B2 - Video game equipment - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video game device, and more particularly to a CRT, for example.
The present invention relates to a so-called commercial video game device for displaying a character on a screen of a (cold cathode ray tube) and playing the game, in which two people can play the same or different games.

(Description of the Related Art) Conventionally, there is a so-called video game or video game device that displays game characters on a screen such as a color CRT display and controls those characters by operating operating means such as a joystick or operation switches. It is put to practical use. The conventional video game devices can be roughly classified into those for home use and those for business use. For example, in Japanese Patent Laid-Open No. 58-190470, in a game device in which a graphic is selectively visually displayed and played, two or more game devices having the same specifications are used, and a CPU built in the game device is switched by a game key. There has been proposed a game device in which two people can play the same game by inputting an input and transferring output data from this CPU to a CPU of another game device.

However, the technique disclosed in Japanese Patent Laid-Open No. 58-190470 is configured by simply connecting the second game device, and although it can be used as a game device such as a calculator, the invention is directed to Cannot be applied to game consoles.

Further, for example, Japanese Utility Model Laid-Open No. 58-1821780 discloses a two-player game device in which a double-sided fluorescent display tube is provided in the middle of the main body to display a pattern visible from the front and back. There is. However, the fluorescent display tube displays a character by utilizing the discharge by the segment electrodes arranged in a predetermined pattern shape in advance, and its resolution (definition) is not so good. Therefore, if it is a home-use game machine such as Japanese Utility Model Laid-Open No. 182780/1983, a fluorescent display tube having a poor display definition may be used. Cannot use such a double-sided fluorescent display tube as a display, and an arcade game machine needs to use a CRT as in the conventional case.

However, in the case of an arcade game machine using a CRT, it is necessary to install two Cs so that two people can play the same game.
When RT is provided, the game machine becomes very large. This is because the neck of the CRT is extended from the funnel on the back side of the screen.

Note that none of the above publications teaches or suggests a small arcade game machine using two CRTs.

(Object of the Invention) Therefore, a main object of the present invention is to provide an arcade game machine using two CRTs, which can be miniaturized.

(Summary of the Invention) The present invention is directed to a first section that has a trapezoidal cross section, is inclined in opposite directions, and has a width larger than a CRT screen.
And one housing having a second inclined surface, and first and second provided in the housing such that the screen is exposed on each of the first and second inclined surfaces of the housing.
CRT, the first CRT is provided at a position where the screen is unevenly distributed to one end side of the first inclined surface, and the second CRT has the screen where the screen is the other end of the second inclined surface. Two sets of game operation means, which are provided so as to be unevenly distributed to the side, and which are provided in the casing in correspondence with each of the first and second CRTs and which can be manually operated, and each of the operation means. Of the two corresponding control means for providing data for display to the corresponding first and second CRTs, and directly or indirectly between the one control means and the other control means. To the first and second CRs corresponding to one of the control means.
A video game device in which data from the other control means is given to one side of T via the communication means.

(Effect of the Invention) According to the present invention, the first CRT is provided at a position where the screen is unevenly distributed to one end side of the first inclined surface, and the second CRT has the screen of the second inclined surface. Since it is provided so as to be unevenly distributed on the other end side, the funnels and necks projecting to the back side of the screens of the first and second CRTs do not interfere with each other, and therefore the first and second inclined surfaces. Can be made as small as possible,
Therefore, even if two CRTs are provided so that two people can play the same or different games, the housing, that is, the game machine itself does not become large.

Further, according to the present invention, since the communication means for exchanging data between the two control means is provided, the same game is displayed on two CRTs and a plurality of people operate different operation means. Thus, the game characters displayed on the opponent's CRT can be controlled by each other. Further, since the communication means is shared by the two control means, it is possible to make the video game apparatus smaller and cheaper than the apparatus in which the two video game apparatuses are simply docked.

The above and other objects and features of the present invention will become more apparent from the following detailed description with reference to the drawings.

(Description of Embodiments) FIG. 1 is an overall perspective view showing an embodiment of the present invention.
The video game device according to this embodiment includes a housing 1,
Legs for installation are provided below the housing 1. The housing 1 has a shape such that the side surface trapezoidal housing 1 is placed on a table having a substantially T-shaped side surface,
CRTs 2 and 3 are provided on the sloped portion of the trapezoidal portion, with the respective screens contradictory to each other. At this time, as can be seen clearly from FIG. 1, the CRT 2 is mounted at a position where the screen thereof is unevenly distributed on one end side of one inclined surface, and the CRT 3 is arranged such that the screen thereof is unevenly distributed on the other end side of the other inclined surface. Be installed as described. Therefore, a funnel or neck (not shown) protruding behind the screens of the two CRTs 2 and 3
Do not interfere with each other. Therefore, according to this embodiment, the distance between the two inclined surfaces can be made as small as possible, so that even if two CRTs 2 and 3 are provided so that two people can play the same or different games, the casing is The body 1, that is, the game machine itself is not enlarged. Further, the coin insertion ports 4 and 5 are provided on the sloped portion of the trapezoidal portion.
Is provided. These coin insertion openings 4 and 5 are for inserting coins as valuable media into the coin insertion openings, thereby enabling the game to be played. Therefore, the video game device of this embodiment is a commercial video game machine. Is configured as. The valuable medium may be a card such as a magnetic card or an optical card in addition to the above coin, and any valuable medium can be used.

Various operation means and switches for playing a game are provided at both ends of the table portion of the housing 1. That is, two sets of joysticks 6, 12 and operation buttons 8, 10, 14 and 1 are provided at one end.
6 sets are provided, and four mode buttons 18 and 2 are further provided.
0, 22 and 24 are provided. At the other end, two sets of joysticks 7, 13 and operation buttons 9,
A set of 11, 15 and 17 is provided, and further four mode buttons 19, 21, 23 and 25 are provided.
Therefore, in this video game device, up to four people can play the game using each of the four sets of operating means. Here, the joysticks 6, 12, 7 and 13 are, as is known,
This is for moving the game character displayed on the screens of the CRTs 2 and 3 vertically and horizontally. In addition, operation buttons 8, 10, 14, 16, 9, 1
1, 15 and 17 are for causing the game character to perform a specific type of action, such as a jump, a launch or a strike. Then, in this video game device, the game can be played by selecting any one of the four modes. Mode buttons 18, 22 and 1
9, 23 are used for selecting the first mode, and mode buttons 20, 24 and 21, 25 are used for selecting the second mode. For example, if a tennis game can be played on this video game device, the first mode button 18 and the second mode button 20 respectively select the "single" mode, and the first mode button 22 and the second mode button 24 are selected. You can select "Doubles" for each. Similarly, the first mode button 19 and the second mode button 21 can select "single", and the first mode button 23 and the second mode button 25 can select "doubles". The first mode buttons 18, 22, 19 and 23 are
The first mode of this video game device, that is, the mode that can be independently played on each side, is selected, and the second mode buttons 20, 24, 21 and 25 are in the second mode, that is, the players on each side play the same game. You can select the mode. In the first mode, therefore, each player advances the game against the corresponding computer system built in the housing 1. On the other hand, in the second mode, the players on each side play the game against humans facing each other.

The specific content of the game is not limited to the above tennis game, and may be any type of game such as a game simulating another ball game, a card game, or mahjong.

FIG. 2 is a block diagram showing an embodiment of the present invention.
The left side of FIG. 2 constitutes one computer system 26, and the right side constitutes another computer system 27. The computer system 26 is associated with the CRT 2 etc. on the left side in FIG. 1, and the computer system 27 is provided in association with the CRT 3 etc. on the right side in FIG. Computer system 26 includes a CPU (central processing unit) to which associated mode buttons 18, 20, 22 and 24 are connected. Further, the CPU 28 has a coin selector 3 for discriminating the type and amount of coins inserted from the coin insertion slot 4.
0 is provided. It should be noted that the coin selector 30 will be replaced with a card reader if the valuable medium to be inserted is a card. And CPU
28 further includes operating means 6 to 16 shown in FIG.
Are connected, but their illustration is omitted in FIG.

The CPU 28 is, for example, MOS Technology.
An IC6502 manufactured by (Moss Technology) may be used. The CPU 28 has a ROM (read only memory) 36, a RAM (random access memory) 36 through a 16-bit address bus 32 and an 8-bit data bus 34.
38 and a PPU (image processing unit) 40, respectively. The ROM 36 stores an operation program and a game program for the CPU 28, and for example, IC2764 manufactured by Intel (Intel) may be used. As the RAM 38, for example, IC6116 manufactured by Hitachi (Hitachi) is used, and sequentially stores data necessary for the progress of the game. PPU40 is CPU2
It is for processing or controlling the display of the CRT 2 based on the data from 8, for example, Nintendo
IC2C03 manufactured by (Nintendo) is used. PPU4
0 further includes character ROM 42 and video R
AM44 is connected. These are all Hit
IC6116 manufactured by atchi (Hitachi) can be used. The character ROM 42 is for displaying a character required for the game, such as a ball or a player on the screen in the case of a ball game, or a card or the like in the case of a card game, and the video RAM 44 is a court or a player in the case of a ball game. It is for fixedly displaying the background of the game including the net or goals.

A sound generator 46 is further connected to the CPU 28, and the sound generator 46 generates a sound effect if necessary.

The other computer system 27 has the same CPU 2
9, including this CPU 29 and its associated memories 37, 3
9, 41, 43 and 45 are constructed in the same manner as the computer system 26 described above. Therefore, the details of these configurations are omitted here to avoid redundancy. The CPU 29 also includes a mode button 1
9, 21, 23 and 25 are connected, and operating means 7 to 17 for the game shown in FIG. 1 are also connected although they are not shown here. The coin selector 31 and the voice generator 47 connected to the CPU 29 are the same as the coin selector 30 and the voice generator 46 described above.

In order to configure the communication means, in this embodiment, C-RA
An M (common random access memory) 101 is provided. As the C-RAM 101, for example, Hitachi
C-MOS static RAM6 manufactured by chi (Hitachi)
116 is used and has a capacity of, for example, 2 KB. The C-RAM 101 includes an address bus 103 from the address selector 102 and a data bus 106 from three-state buffers 104 and 107 as gate circuits.
Connected respectively. As the address selector 102, for example, a TTL circuit IC74LS157 manufactured by TI (Texas Instruments) can be used. Then, the address selector 102 includes address buses 32 and 33.
Either of them is selectively connected to the address bus 103. Also, the tri-state buffer 104 is connected to the data bus 34 and 1
06, the 3-state buffer 107 is connected to the data bus 35.
And 106, respectively. As the three-state buffers 104 and 107, for example, an IC74LS245 manufactured by TI (Texas Instruments) can be used, and either one of "1", "0", or high-impedance three states can be used depending on a given signal. Can be taken. These selector 102 and three-state buffer 10
A signal line 108 from the output port of the CPU 28 included in the one computer system 26 is connected to 4, 107. That is, the signal line 108 is a terminal of the CPU 29 included in the other computer system 27.
In addition to being connected to ▼, it is connected to the control terminal of the address selector 102, further connected to the 3-state buffer 107, and further connected to the 3-state buffer 104 via the inverter 105. The signal line 109 from the output port of the CPU 29 is connected to the terminal () of the CPU 28. Therefore, the C-RAM 1 forming these communication means
01 and the like are basically one computer system 2
Signal line 10 from the output port of CPU 28 included in 6
It will be controlled by 8 signals. That is, these communication means 101 to 109 give priority to one CPU 28 when a conflict occurs.

The IC used in this circuit is not limited to the above-mentioned example, and similar or different ICs may be used, and it is needless to say that discrete ICs may be used.

The PPUs 40 and 41 are CRs with RGB terminals.
Although it is for displaying T2 and T3, this may be one for driving the CRT by a color television system such as the NTSC system.

In the embodiment of FIG. 2, first, the operation in the case of exchanging data between one computer system 26 and the other computer system 27 using the communication means 101 will be described.

In the initial state, the signal lines 108 and 109 of both output ports of the CPUs 28 and 29 are both “0”. Three
Since both state buffers 104 and 107 are of low level drive, tristate buffer 107 is activated and data buses 35 and 106 are connected. on the other hand,
Since the 3-state buffer 104 is provided with “1” inverted by the inverter 105, this buffer 10
4 is in a high impedance state, and the data buses 34 and 106 are disconnected from each other. At the same time, "0" is also given to the address selector 102, so that the selector 10
2 selectively connects the address bus 33 to the address bus 103. In this way, the computer system 27
Can access the C-RAM 101. In this state, the computer system 27 changes the C-RAM 101
It is possible to write data to and read data from the computer system 2.
CPU 7 to use one of the computer systems 26 while the C-RAM 101 is in use.
29 outputs “1” to the signal line 109. Then C
The terminal ▲ ▼ (this is an interrupt request terminal) of the PU 28 becomes “1”, and the CPU 28 recognizes this and knows that the C-RAM 101 cannot be used. On the other hand, since the signal line 108 from the CPU 28 is “0”, “0” is given to the ▲ ▼ terminal of the CPU 29, and the CPU 29 uses the address buses 33 and 103 and the data buses 35 and 106 to make the C-RAM 101. To access. When the CPU 29 has finished using the C-RAM 101, the CPU 29 sets its output port to "0".
To Then, the C-RAM 101 of one computer system 26 can be accessed.

When the signal line 109 from the output port of the CPU 29 becomes "0", the CPU 28 confirms "0" input to the ▲ ▼ terminal and sets the output port to "1". Therefore, "1" is input to the terminal ▲ ▼ of the CPU 29, and the CPU 29 at that point in time C-RAM 10
Recognize that you cannot access 1.

When the signal line 108 from the output port of the CPU 28 becomes “1”, the address selector 102 selectively connects the address bus 32 to the address bus 103. At the same time, the 3-state buffer 104 is provided with "0" inverted by the inverter 105, and the 3-state buffer 104 connects the data buses 34 and 106. On the other hand, since "1" is given to the tri-state buffer 107, the buffer 107 is in a high impedance state and the data buses 35 and 106 are disconnected from each other. In this way, the CPU 28 can write data in or read data from the C-RAM 101 through the address buses 32, 103 and the data buses 34, 106.

Computer systems 26 and 27 are simultaneously C-RA
When trying to access M101, first, CPU2
8 looks at his terminal ▲ ▼. At this time, CPU2
Since both 8 and 29 were not connected to the C-RAM, the terminal 28 of the CPU 28 is naturally "0". Therefore, the CPU 28 outputs "1" to its output port, and "1" is given to the terminal ▼ of the CPU 29 via the signal line 108. As a result, the CPU 29 recognizes that the C-RAM 101 cannot be accessed. In this way, the computer system 26 (CPU 28) and the computer system 27 (C
If there is a conflict with the PU 29), priority is given to the computer system 26.

Access to the C-RAM 101 is performed as described above. For example, data from the CPU 28 is transferred to the C-RAM 101.
At a predetermined address of the C-RAM1 by the CPU 29
Data is transferred from the CPU 28 to the CPU 29 by reading the same address of 01.
Conversely, when data is transferred from the CPU 29 to the CPU 28, the necessary address of the C-RAM 101 may be used.

In the above-described embodiment, the C-RAM is used when data is transferred between the two computer systems 26 and 27.
Indirectly with 101 being interposed. However, various other communication means can be considered.

For example, if the CPUs 28 and 29 are capable of relatively high-speed processing, data can be exchanged directly without using a common memory means such as the C-RAM 101 by a connecting line connecting the ports of the CPU. I can.

A DMA method (direct memory access method) can also be used. That is, the CPU 29 is the CPU 2
When the data from 8 is requested, the content of the RAM 38 may be read into the RAM 39 as it is, and in the opposite case, the CPU 28 may copy the content of the RAM 39 to the RAM 38.

Further, another RAM added to each of the CPUs 28 and 29 may be used as the communication means. Then, the CPUs 28 and 29 write data in the RAMs 38 and 39, respectively, and add additional R to the other party.
The data may be written also in the AM, and the CPU of the other party may read the data from the associated additional RAM as required.

As described above, various types of communication means can be used, so that the most suitable means may be selected in consideration of the cost and the simplicity of the circuit configuration.

The operation or operation of the embodiment shown in FIGS. 1 and 2 will be described below with reference to the flow charts shown in FIGS. 3A and 3B and FIGS. 4 to 6. In the following description, the computer system 26, that is, the CPU 28 is on the “self” side, and the computer system 27, that is, the CPU 29 is on the “other” side.

In the first step 201, the CPU 28 determines, based on the data from the coin selector 30, whether or not its own credit (C1) is greater than half (Q / 2) of the number of credits (Q) required for playing in the second mode. To judge. If the own credit (C1) has not reached (Q / 2), the CPU 28 at the next step 203, the second mode flag FL of the RAM 38 shown in FIG.
12 is set to "0" so that it can be recognized that the second mode cannot be performed. If step 201
If “YES” in, the CPU 28 further proceeds to the next step 205, in which the credit (C
It is determined whether the sum of 1) and the opponent's credit (C2) is larger than the number of credits (Q) required for playing in the second mode. If "NO" in this step 205, the second mode flag FL12 in a step 203.
Is set to "0", and if "YES", the second mode flag FL12 is set to "1". In this way, it is determined whether or not the inserted coin (value medium) has reached the number of credits required for playing the second mode game, and if not, the setting of such second mode is prohibited. To do.

After resetting or setting the second mode flag FL12 in step 203 or 207, in next step 209, the CPU 28 determines whether its own credit (C1) is larger than the number of credits (P) required for playing in the first mode. Determine whether This step 2
If “NO” in 09, the next step 211
At "1", "0" is written in the first mode flag FL11 of the RAM 38, and if "YES", "1" is written in the first mode flag FL11. Then, CPU2
8 detects whether or not the first mode button 18 (or 22) is turned on, and if "NO", it is as it is, and if "YES", the first mode flag FL11 is not "1" in the following step 217. Only then does the process go to step 219. CP in step 219
U28 detects whether the second mode button 20 (or 24) is turned on.

In the previous step 217, the first mode flag FL1
If 1 is set, the CPU 28 performs a process for playing the game in the first mode. That is, in the next step 221, the number of credits (P) required for playing the game in the first mode is set to the own credit (C1).
And the rest is stored as a new (C1). Then, by the method as described above, the C-RA
Call the predetermined address of M101, and enter the first address as shown in FIG.
“1” is written in the mode flag FL111. In this way, it is possible to inform the CPU 29 that the CPU 28 is operating in the first mode. And
The CPU 28 executes the game in the first mode (step 225). Note that the routine of this game may be a known one and is not particularly important to the present invention, so a detailed description thereof will be omitted here. However, in the first mode game, the joystick 6 (the set of operation buttons 8 and 10 and / or the joystick 12, the set of operation buttons 14 and 16) shown in FIG.
Playing a game against is as described above. Then, when the first mode game 225 ends,
The CPU 28 uses the first mode flag FL of the C-RAM 101.
Write “0” in 111.

In step 219, when the CPU 28 detects that the second mode button 20 (or 24) is not turned on, the process proceeds to the next step 229, and the CPU 28
It is determined whether the first mode flag FL121 of the C-RAM 101 is "1". That is, it is determined whether or not the other party is in the first mode. Then, if “YES” in this step 229,
Further, in step 231, it is detected whether or not the first mode flag FL11 of the RAM 38 of its own is "1" to judge whether or not the player can play the game of the first mode. If the game of the first mode can be played, in the subsequent step 233, the display "Please press the button 18 (or 22)" is displayed on the CRT 2 (FIG. 1). If the game in the first mode cannot be played, the process returns to the first step 201.

If “NO” in step 229, CP
U28 further performs C- in the following step 235.
It is detected whether or not the second mode flag FL122 of the RAM 101 is "1" and it is determined whether or not the other party selects the second mode. If “YES” in this step 235, C in the next step 237
Display "Please press button 20 (or 24)" on RT2 (Fig. 1).

If “NO” in step 235, the CPU 28
In the next step 239, it detects whether or not the second mode flag FL12 of its own RAM 38 is "1", and determines whether or not its own side can play the second mode game. If “NO”, the process proceeds to the previous step 231, and if “YES”, in the next step 241, the first mode flag F of its own is similarly performed.
It is determined whether L11 is "1" to determine whether the first mode is playable. If the first mode is playable, a display "Press button 18 (or 22) or 20 (or 24)" is displayed on the CRT 2 (Fig. 1) (step 243).

After the display steps 233, 237 and 242, the process returns to the first step 201 again.

If “YES” in the previous step 219 (FIG. 3A), the CPU 28 determines in the next step 241 that
It is determined whether or not the second mode flag FL12 of itself is "1" to determine whether or not the second mode is playable. If "NO" in this step 241, in the next step 243, the CPU 28 causes the C-RAM
It is detected whether the second mode flag FL122 of 101 is "1" and it is determined whether the other party is in the second mode.

If "YES" in the previous step 241, the program proceeds to step 245, and the CPU 28 sets "1" in the second mode flag 112 of the C-RAM 101 there.
Write. Then, in the next step 247, it is judged whether or not a fixed time, for example, 5 seconds has elapsed, and if the time is over, CR in the next step 249.
After setting the second mode flag FL112 of the AM 101 to "0", the process returns to the first step 201. And step 2
C-RAM 10 before time-out at 51
If it is determined that the second mode flag FL122 of the other party of 1 is "1", that is, the other party has also selected the second mode, the CPU 28 switches from the credit (C1) of its own to the second mode in the next step 253. Half (Q / 2) of the number of credits (Q) required for play is subtracted, and the rest is stored as new own credit (C1). Then, in step 255, the second mode game is executed. At this time, not only the display on the CRT 2 on the own side is changed according to the operation of the operation means 6 to 16 (FIG. 1) on the own side, but also the CR on the other side is changed.
The display on T3 also changes, and by operating the operation means 7 to 17 on the other side, not only CRT3 but also CRT
As described above, the display of 2 also changes. As described above, the data transfer during this period is performed by sharing the data area of the C-RAM 101 in this embodiment. Then, when the second mode ends,
In the final step 257, the CPU 28 executes C-RA
The second mode flag FL112 of M101 is set to "0" and the process returns to the first step 201.

In the previous step 243 (Fig. 3A), "YES"
In that case, the CPU 29 of the other party sends the credit (C
Half of the number of credits (Q / 2) necessary for playing in the second mode is subtracted from 2) and the rest is stored in the RAM 39 as a new credit (C2). And C
The PU 29 determines in step 261 that the C-RAM 10
With the second mode flag 112 of 1 set to "1", the routine 255 of the second mode game is entered. Even in this case, the second mode game can be played again.

If “NO” in step 243, the program proceeds to step 229, as in the case of “NO” in step 219 above.

Further, in the above embodiment, when the player's own side and the opponent's side independently play the game of the first mode, the contents of the game may be the same, and several games can be selected. Thus, different games may be played. For that purpose, a plurality of game software (ROM) may be provided so that any one can be selected.

[Brief description of drawings]

FIG. 1 is an overall perspective view showing an embodiment of the present invention. FIG. 2 is a block diagram showing an example of the electric circuit of the embodiment shown in FIG. 3A and 3B are flow charts for explaining the operation or operation of this embodiment. FIGS. 4 to 6 are diagrams schematically showing flags in the memory. In the figure, 1 is a housing, 2 and 3 are displays, and 4 and 5
Is a coin slot, 6, 12, 7, 13 are joysticks, 8, 14, 16, 9, 11, 15, 17 are operation buttons, 18, 22, 19, 23 are first mode buttons, 2
0, 24, 21, 25 are second mode buttons, 26, 27
Is a computer system, 101 is a C-RAM, 102
Is an address selector, and 104 and 107 are tri-state buffers.

Continuation of the front page (56) Reference JP-A-53-13823 (JP, A) JP-A-55-88788 (JP, A) JP-A-57-192585 (JP, A) JP-A-58-190470 (JP , A) Actual opening 58-40193 (JP, U) Actual opening 57-64385 (JP, U) Actual opening 58-182780 (JP, U) Actual opening 37-20450 (JP, Y1)

Claims (8)

[Claims] 1. A first and a second having a trapezoidal cross section, inclined in opposite directions and having a width larger than that of a CRT screen.
(1) having an inclined surface, and first and second provided in the housing so that the screen is exposed on each of the first and second inclined surfaces of the one housing. CRTs (2, 3) of the first CRT (2), the screen of the first CRT (2) is provided at a position unevenly distributed to one end side of the first inclined surface, and the second CRT (3) is A screen is provided so as to be unevenly distributed on the other end side of the second inclined surface, and is provided in the one casing (1) corresponding to each of the first and second CRTs and is manually operated. Two possible sets of game operating means (6-16: 7-17), each corresponding to the first and second corresponding operating means (6-16: 7-17) depending on the state of the corresponding one. CR
Two control means (26:27) for giving data for display to T (2: 3), and one control means (26) and the other control means (2)
7) is provided with communication means (101-109) for directly or indirectly exchanging data with the first means corresponding to one of the control means (26:27).
And a video game device in which data from the other control means is given to one of the second CRTs (2: 3) via the communication means (101-109). 2. The communication means is a common memory means (101) accessible by the two control means (26:27), and the common memory means (101) and the control means (26:
27) bus means (32, 3) connected to each of
4, 103, 106: 33, 35, 103, 106), The video game device according to claim 1. 3. The communication means is the control means (26: 2).
7) bus means (32, 34, 103, 10) connected to the control means (26:27) in response to a signal from the same.
6:33, 35, 103, 106) to disable one of them (102, 104, 105, 107)
The video game device according to claim 2, further comprising: 4. The bus means comprises the common memory means (101) and the control means (26:
27) address buses (32,
103: 33, 103), and the common memory means (101) and the control means (26:
27) data buses (34, 1) connected to each
06:35, 106). The video game device according to claim 3. 5. The address disabling means selectively switches the address buses (32, 103: 33, 103) in response to a signal from the control means (26: 27), and the signal. According to the data bus (34, 106: 3
Gate circuit (104: 1
07), the video game device according to claim 4. 6. A mode setting means (18-) which is connected to at least one of the control means and can select a plurality of modes.
24: 19-25), wherein the communication means (101-109) is activated in response to a predetermined mode being selected by the mode setting means (18-24: 19-25). The video game device according to any one of items 1 to 5. 7. The mode setting means (18-24: 19-)
When another mode is set by 25), the control means (26:27) respectively respond to the corresponding first operation means (6-16: 7-17) only in accordance with the state of the corresponding operation means (6-16: 7-17). 7. The video game device according to claim 6, which controls the contents of the second CRT (2: 3). 8. An inlet (4: for introducing a valuable medium).
5), connected to said control means (26:27), said inlet (4:
5) Value judgment means (30:31) for judging the value of the valuable medium, and setting to the predetermined mode in response to the value judgment means (30:31) judging a certain value. Video game device according to claim 6 or 7, comprising means (28:29) for enabling.