JPH0638449B2 - Element isolation method for semiconductor device - Google Patents

Description

TECHNICAL FIELD The present invention relates to an element isolation method for a semiconductor device capable of increasing the degree of integration of a MOS semiconductor device or the like.

[Prior Art] In the conventional manufacturing process of a MOS type semiconductor device, a LOCOS isolation method is widely used for element isolation.
3A to 3F are sectional views showing a typical LOCOS separation method in the order of steps.

As shown in FIG. 3A, on the P-type semiconductor substrate 41,
The thermal oxide film 42 is formed to a thickness of about 100 to 2000 Å. Then, CVD (chemical vapor) is formed on the thermal oxide film 42.
The nitride film 43 is grown by the deposition method.

After that, a photoresist 44 is selectively formed on the nitride film 43 which is to form the activation region.

Next, as shown in FIG. 3B, the photoresist 44
Is used as a mask to selectively remove the CVD nitride film 43 and the thermal oxide film 42 in the region not covered with the photoresist 44.

Next, as shown in FIG. 3C, the photoresist 44
Then, the surface of the P-type semiconductor substrate 41 is selectively oxidized by using the CVD nitride film 43 as a mask to form a field oxide film 45.

Next, as shown in FIG. 3D, after removing the CVD nitride film 43, the thermal oxide film 42 is removed by etching until the surface of the P-type semiconductor substrate 41 is exposed in the activation region. .

Next, as shown in FIG. 3E, a gate insulating film 46 is formed on the surface of the P-type semiconductor substrate 41 in the activation region.

Next, as shown in FIG. 3 (f), the field oxide film 4
A polycrystalline silicon gate electrode 47 having a predetermined width extending in the direction in which 5 are arranged is patterned. After that, the MOS type semiconductor device is manufactured through a normal process.

[Problems to be Solved by the Invention] However, in the above-described conventional method, it is necessary to provide an inactive region having a finite size on the surface of the substrate as an element isolation region, and the inactive region is a photoresist. An area wider than the area defined by the mask of 44 is called a bird's beak formed around the area.

For this reason, the effective channel width of the transistor is reduced, and the formation of bird's beaks is a factor that reduces the transistor efficiency.

Further, since the element isolation region is formed on the surface of the substrate, an inactive region has to be secured on the surface of the substrate, which is a factor preventing high integration.

The present invention has been made in view of such problems,
An object of the present invention is to provide an element isolation method for a semiconductor device, which can significantly improve the degree of integration without complicating the process.

[Means for Solving the Problems] The element isolation method for a semiconductor device according to the present invention comprises a step of stacking a first oxide film and a first nitride film on the surface of a semiconductor substrate, and a photoresist as a mask. A step of selectively removing a first nitride film and a first oxide film, and a region extending to a predetermined depth from the surface of the semiconductor substrate to form a groove or a recess; and using the first nitride film as a mask, Oxidizing a side surface and a bottom surface of the groove or the recess to form a second oxide film; forming a second nitride film on the second oxide film on the side surface of the groove or the recess; Forming a third oxide film on the lower side and bottom of the groove or the recess by oxidizing the semiconductor substrate using the second nitride film as a mask; and removing the first and second nitride films. The third oxide film is And a step of selectively removing the side surface of the groove or the recess so as to remain.

[Operation] In the present invention, the semiconductor substrate is formed using the first and second nitride films provided as masks by selectively forming the groove or the recess in the semiconductor substrate and covering the region other than the bottom surface of the groove or the recess. Oxidize. As a result, a third oxide film is formed on the bottom of the side surface of the groove or the recess and on the bottom surface of the groove. Next, the first and second nitride films are removed, and the third oxide film is selectively removed by leaving only the side surface of the groove. Then, an oxide film for element isolation is formed on the side wall of the groove, and the bottom surface of the groove and the main plane of the semiconductor substrate (top surface of the convex portion) are utilized as active regions. Therefore, the element isolation region is formed on the side surface of the groove perpendicular to the main plane of the substrate, and it is not necessary to secure a region along the substrate surface as the element isolation region as in the conventional case, so that the degree of integration can be remarkably improved.

[Embodiment] Next, an embodiment of the present invention will be described with reference to the accompanying drawings.

First, as shown in FIG. 1A, a first oxide film 2 is formed on a P-type semiconductor substrate 1, and C is formed on the first oxide film 2.
A first nitride film (first CVD nitride film) 3 is grown by the VD method. Next, the photoresist 4 is selectively formed on the first nitride film 3 with an appropriate length interval.

After that, as shown in FIG.
Using as a mask, the first CVD nitride film 3 and the first oxide film 2
Are selectively removed, and the surface of the P-type semiconductor substrate 1 is selectively removed over a predetermined depth. As a result, a groove portion having the groove bottom surface 5 and the groove side surface 6 is formed on the surface of the P-type semiconductor substrate 1.

Next, as shown in FIG. 1C, after removing the photoresist 4, the bottom surface 5 and the side surface 6 of the groove portion of the P-type semiconductor substrate 1 are oxidized by using the first CVD nitride film 3 as a mask, and the groove is formed. A second oxide film 7 is formed on the bottom surface 5 and the groove side surface 6.

Further, a second nitride film (second
CVD nitride film 8 is grown.

Next, as shown in FIG. 1D, the second CVD nitride film 8 is formed.
Is anisotropically etched so that only the portion forming the side wall of the groove remains and the other portion is removed by etching.

Next, as shown in FIG. 1 (e), the first CVD nitride film 3
A field oxide film 9 is formed by thermal oxidation using the second CVD nitride film 8 remaining on the side walls of the groove as a mask. In this case, the field oxide film 9 is formed on the side surface 6 of the groove.
In the above, due to the diffusion growth from the groove bottom surface 5, the groove swells to the same shape as the bird's beak.

Next, as shown in FIG. 1F, the first CV nitride film 3 and the second CVD nitride film 8 remaining on the side surface 6 of the groove are removed.

Then, as shown in FIG. 1 (g), the oxide film 9 is anisotropically etched to leave the field oxide film 9 only on the side surface 6 of the groove portion and selectively remove the field oxide film 9 in other portions. To remove. In this case, the first oxide film 2 is similarly removed.

Next, as shown in FIG. 1 (h), after the gate insulating film 10 is formed on the substrate surface (the upper surface of the protruding portion and the bottom surface of the groove portion), the polycrystalline silicon gate electrode 11 is spread over the plurality of groove portions with a predetermined width. Pattern is formed so as to extend.

FIG. 1 (i) is a perspective view showing a part of the layer structure thus formed. The cross-sectional view of FIG. 1 (h) is taken along the plane A of FIG. 1 (i). Subsequent steps will be described based on the cross-sectional view taken along the plane B or C of FIG. 1 (i).

1 (j) to (l) are cross-sectional views taken along plane B of FIG. 1 (i), and FIGS. 1 (m) to (o) are taken along plane C of FIG. 1 (i). FIG.

First, as shown in FIGS. 1 (j) and 1 (m), N-type impurities such as arsenic are ion-implanted into the substrate 1 using the selectively formed polycrystalline silicon gate electrode 11 as a mask, and N
The mold diffusion layer 12 is formed.

Next, as shown in FIGS. 1 (k) and 1 (n), an interlayer insulating film 13 is formed on the entire surface.

Finally, as shown in FIG. 1 (l) and FIG. 1 (o),
A semiconductor device is manufactured by forming a contact opening portion 14 in the interlayer insulating film 13 and selectively forming an aluminum electrode 15 so as to be embedded in the opening portion 14.

In this way, according to the method of this embodiment, after the grooves are formed on the surface of the semiconductor substrate 1 at an appropriate interval, the substrate is oxidized by using the first nitride film 3 and the second nitride film 8 as masks. Then, a field oxide film (third oxide film) 9 is formed below the groove bottom surface 5 and the groove side surface 6. And the first and second
After removing the nitride films 3 and 8, the third oxide film 9 is left only on the groove side faces 6 and the other portions are selectively removed. As a result, an element isolation region is formed by the field oxide film 9 on the side surface of the groove. This element isolation region is not formed to spread in the direction along the surface of the semiconductor substrate 1 as in the conventional case, but is formed to spread on the side surface of the groove portion, that is, in the direction perpendicular to the surface of the semiconductor substrate 1. because there is,
By utilizing the main plane (upper surface of the convex portion) and the bottom surface of the groove of the semiconductor substrate 1 as active regions for forming elements, the degree of integration can be significantly improved. Further, in this element isolation method, it is not necessary to add a photomask step as compared with the conventional method, and the steps are not complicated. Furthermore, since the oxide film 9 for element isolation on the side surface of the groove formed in this way is formed with an appropriate inclination with respect to the side wall of the groove, it is possible to form a gate electrode in a later step, for example. Workability is improved.

2 (a) and 2 (b) are respectively a perspective view and a sectional view showing a semiconductor device manufactured by the second embodiment method of the present invention.

In the second embodiment, first, the P-type semiconductor substrate 1
An N-type well 16 is formed in the N-type well 16, and a recess 1 deeper than the depth of the N-type well 16 is formed in the formation region of the N-type well 16.
Form 7. Then, similarly to the first embodiment, the field oxide film 9 is formed only on the side surface of the recess 17, and the polycrystalline silicon gate electrode 11, the diffusion layer 12 and the interlayer insulating film 1 are formed.
3 and the aluminum electrode 15 are formed,
Manufacture semiconductor devices.

In the semiconductor device manufactured as described above, the aluminum electrode 15 connected to the N-type diffusion layer 12 formed in the N-type well 16 is formed as the drain and the N-type diffusion layer is formed on the bottom surface of the concave portion of the P-type semiconductor substrate 1. A high breakdown voltage N-type transistor is formed by using the aluminum electrode 15 connected to 12 as a source. On the other hand, in the method of this embodiment, the number of steps is not increased as compared with the conventional method.

[Effects of the Invention] As described above, according to the present invention, a groove or a recess is selectively formed in a semiconductor substrate, and an oxide film for element isolation is selectively formed on a side surface of the semiconductor substrate to perform element isolation. Since the bottom surface of the recess and the main surface of the semiconductor substrate are utilized as active regions, it is not necessary to provide a region for element isolation extending along the surface of the semiconductor substrate unlike the element isolation by the conventional method. Remarkably improved.

Further, in the method of the present invention, it is not necessary to newly add a photomask step, and there is an advantage that the oxide film for element isolation is formed in self-alignment with the side wall of the groove.

Further, when an oxide film for element isolation is formed on the side wall of the groove by the method of the present invention, this oxide film is formed with an appropriate inclination with respect to the side wall of the groove. It is extremely effective in improving workability.

[Brief description of drawings]

1 (a) to (h), FIGS. 1 (j) to (l), and FIGS. 1 (m) to (o) are sectional views showing an embodiment of the present invention in the order of steps, and FIG. ) Is also a perspective view showing a process in the middle thereof, FIG. 2 (a) is a perspective view showing another embodiment of the present invention, FIG. 2 (b) is a sectional view thereof, and FIGS. (F) is sectional drawing which shows the conventional method in order of process. 1, 41; P-type semiconductor substrate, 2; first oxide film, 3; first
CVD nitride film, 4, 44; photoresist, 5; groove bottom surface, 6; groove side surface, 7; second oxide film, 8; second CVD nitride film, 9, 45; field oxide film, 10, 46; gate insulating film , 11, 47; polycrystalline silicon gate electrode, 1
2; N-type diffusion layer, 13; interlayer insulating film, 14; contact opening portion, 15; aluminum electrode, 16; N-type well,
42; thermal oxide film, 43; CVD nitride film

Claims (1)

[Claims] 1. A step of stacking and forming a first oxide film and a first nitride film on a surface of a semiconductor substrate, and a step of using the photoresist as a mask from the first nitride film and the first oxide film and the surface of the semiconductor substrate. A step of selectively removing a region over a predetermined depth to form a groove or a recess; and using the first nitride film as a mask to oxidize the side and bottom surfaces of the groove or the recess to form a second oxide film. And a step of forming a second nitride film on the second oxide film on the side surface of the groove or the recess, and the semiconductor substrate is oxidized by using the first and second nitride films as a mask. Forming a third oxide film on the bottom and bottom of the side surface of the groove or the recess; removing the first and second nitride films and leaving the third oxide film only on the side surface of the groove or the recess. And the step of selectively removing Isolation method for a semiconductor device which is characterized in that.