JPH0642255B2 - Terminal position determination method of functional block in IC - Google Patents

Description

The present invention relates to a method for computer edit design (CAD), and more particularly to a method for determining the position of input / output terminals in a functional block of an IC.

[Conventional technology]

In recent years, with the improvement in the degree of integration of semiconductor integrated circuit devices,
In particular, functional blocks (CPU, registers, counters, etc.
A chip floor plan in which a large number of elements are combined and a certain large block is placed at the optimum position of the chip is indispensable, and layout design using CAD is also applied in this field. It's starting. One of the important problems in the chip floor plan is to arrange the input / output terminals for connecting the wirings connecting the functional blocks at optimal positions on the sides of the functional blocks. If this terminal position is improper, the wiring connecting the functional blocks is unnecessarily bent, the wiring area is increased, the interval between the functional blocks is increased, and the chip area is increased.

An example of a conventional method for determining the terminal position of a functional block will be described with reference to FIGS. 9, 10 and 11.

FIG. 9 is a flowchart showing the outline of the procedure of IC layout design using CAD.

First, the functional blocks are arranged roughly (step 130).
0), the temporary terminal position is determined on the functional block side (step 1400). The temporary terminal is a temporary terminal that collectively represents a plurality of terminals arranged on the sides of each functional block, and subsequent processing is performed by using this temporary terminal as a mark. FIG. 10 shows a conventional example of the method of determining the position of the temporary terminal. That is, a line connecting the centers of the functional blocks and a boundary side of the functional block (a virtual side that defines a boundary of an area that does not actually exist but is considered to be occupied by the functional block, hereinafter also referred to as a block side. ) Is the method of arranging the terminal at the intersection (with IPSJ 30th (first half of 1985))
Nationwide Lecture Collection (III) P, 2077 Standard Cell LSI
Floor plan system creation support-system outline-).
When connecting the block A and the blocks B, C, and D, respectively, connect the centers O ₁ , O ₂ , O ₃ , and O ₄ of the respective blocks to the intersection of this line segment and the boundary side of each functional block. Place the temporary terminals Q _{1 to} Q ₆ . Next, the functional blocks are connected by global wiring (step 1500). The global wiring is to allocate each wiring to a wiring channel between the functional blocks in order to make the wiring density of the entire chip uniform. It is a virtual wiring having a certain width corresponding to the temporary terminal. Next, the wiring area between the functional blocks is calculated (step 1600), and the functional block interval is corrected based on this result (step 1700). Next, in the vicinity of the temporary terminal position,
Arrange the required number of input / output terminals as shown in Figure 11 to determine the terminal position (step 1800), and then design the channel wiring or functional block (step 1900). Is an example of a layout designed according to the above flow. Block A and block B in the figure
The terminals P ₁₈ , P ₁₉ , P ₂₄ , ₂₅ for connecting to and are shown by white circles, and the other terminals P ₁₆ , P ₁₇ , P ₂₀ , P ₂₁ ,
P ₂₂ , P ₂₃ , P ₂₇ , and P ₂₆ are indicated by black circles.

[Problems to be solved by the invention]

In the above-described conventional input / output terminal position determining method, the temporary terminals are determined in consideration of the positional relationship of the centers of the functional blocks, and the input / output terminals are arranged in the vicinity of the temporary terminal positions. Since only the positional relationship of the centers of the functional blocks is taken into consideration, and other factors such as the size of the functional blocks and the overlap of the sides that were in the opposite direction between the functional blocks are not considered, the adjacent blocks as shown in FIG. functional blocks a, wiring L ₁₁ connecting the sides each other that had opposite the B, L ₁₂ and is not in the terminal P ₁₆ to be connected respectively P _22, P ₁₇ and P ₂₃ are opposed position, the wiring L _11, L ₁₂ has a drawback that the wiring area is increased and the distance between adjacent functional blocks that need to be arranged with a minimum distance is increased, resulting in an increase in the chip area.

[Means for solving problems]

The terminal position determination method of the functional block in the IC of the present invention is, for each terminal located on the boundary side of each functional block,
Arrangement priority direction determining means for determining an arrangement priority direction that serves as an index of a preferable arrangement position on the boundary side, and a pair of adjacent functional blocks having an interconnection relationship, the boundary side of each functional block is defined by the X-axis. Alternatively, when the projection is performed on the Y axis and the overlap occurs, the relative positional relationship of the pair of functional blocks is determined as the first positional relationship,
The adjacent functional block relative positional relationship discriminating unit that discriminates the second positional relationship when no overlap occurs, and at least each part of the pair of functional blocks having the first positional relationship faces each other on each boundary side. First terminal position assigning means for deciding positions of terminals to be arranged other than terminals to which wirings connecting the pair of blocks are connected, based on the arrangement priority direction; X on the side where no terminals are placed
The length L _a of the overlapping portion by projecting onto the axis or the Y axis,
When the length L _a is equal to or larger than the product of the number of wirings connecting between the set of blocks and the wiring pitch, the wiring is connected to the terminal connecting between the set of functional blocks. Second terminal position assigning means arranged in a portion where no terminals are arranged in each of the boundary sides so as to be as straight as possible, and the length L _a is the number of wirings connecting the one set of blocks and wiring. When it is smaller than the product of the pitch and the terminals other than the terminals to which the wires connecting between the set of blocks whose positions have already been determined are connected, the length L _a is equal to or more than the product of the number of wires and the wire pitch. And a terminal to which a wire connecting between the pair of blocks is connected is arranged in a portion where no terminal is arranged on each boundary side so that the wire is as straight as possible. Terminal position assignment It has a hitting means.

[Action]

With respect to the one determined to have the positional relationship 1 by the relative positional relationship determining means of the adjacent functional blocks, first, the terminal position of the wiring that connects the sides that do not face each other is determined, and the facing sides are connected in the overlapping portion of the remaining portions. Determine the positions of the wiring terminals so that they face each other, and if the area for arranging those terminals is insufficient, move the terminal positions of the wiring that connects the sides that do not face each other as described above, and In order to ensure the above, the wiring connecting the adjacent functional blocks should be as straight as possible, the interval between these blocks can be minimized, and the optimum chip floor plan can be achieved.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of a layout design method using a terminal position determining means 13 of a functional block which is an embodiment of the present invention, and FIG. 2 is a diagram for explaining a terminal arrangement priority direction. 3 to 5 are diagrams showing the layout state in the main steps when the layout design is performed using this embodiment, and FIG. 6 is a flow chart showing the layout design procedure of this embodiment.

The layout design method of the present embodiment is based on various information indicating the type of functional block, wiring connection relationship, and the like, which are input, and the block layout determining means 2 for determining the schematic layout of the functional block, and the aforementioned A temporary terminal position determining means 3 for determining a temporary terminal position by a method; a wiring area calculating means 4 for applying a global wiring and calculating a wiring area;
Block interval correction means 5 for correcting the interval between functional blocks (hereinafter, also simply referred to as a block) based on the calculation result.
And a terminal position determination means 13 and a layout pattern output means 11.

Further, the terminal position determining means 13 and the terminal arrangement priority direction determining means 6 for determining the terminal arrangement priority direction and the positional relationship between the adjacent functional blocks are the positional relationship 1 or the positional relationship 2 (described later).
Based on the output of the relative positional relationship determining means 7 of the adjacent functional block for determining whether or not, the input information, the terminal arrangement priority direction determining means 6 and the relative positional relationship determining means 7 of the adjacent functional block, etc., predetermined processing described later is performed. First, second, third and fourth terminal position determining means 8 for determining the operating terminal position,
It consists of 9, 10, and 11.

Next, the layout design procedure will be described.

The outline of the design procedure according to this embodiment is the same as the procedure of the conventional example shown in FIG. 9, but since the content of step 1800 for determining the terminal position is different from that of the conventional example in the present embodiment, the following mainly describes step 1800. The part related to the contents will be described.

It is assumed that the processing from step 1300 to step 1700 in FIG. 9 has already been completed by each means from the block arrangement determining means 2 to the block interval correcting means 5.

First, in the terminal position determining means 13 of the present embodiment, the terminal placement priority direction determining means 6 determines the placement priority direction for each terminal. For example, as shown in FIG.
When there is a connection relationship between the blocks B and D by the wirings L ₁ and L ₂ , respectively, in order to shorten the distance l of the wiring L ₁ and reduce the wiring area, the terminals P ₁₂ and P ₁₄ are respectively set. Since it is better to place the block side up and down,
The priority direction for the terminal P ₁₂ is “up”, and the terminal P ₁₄
The preferred direction for is determined to be "down." Terminal P ₁₃ ,
The same is true for P _15, respective priority direction is determined as "lower", "above" (step 100).

Next, the relative positional relationship between the adjacent functional blocks is determined by the relative positional relationship determining means 7 of the adjacent functional blocks to be a positional relationship (positional relationship 1) in which overlapping occurs when the block sides are projected on the X axis or the Y axis. It is determined whether or not there is an overlap (positional relationship 2) in which no overlap occurs (step 200).
For example, in FIG. 3, when the sides of the block A and the block B are projected on the Y axis, an overlapping portion 16 is generated, so that the block A and the block B have a positional relationship 1 with respect to the side parallel to the Y axis. On the other hand, since there is no overlap between the block A and the block B when projected on the Y axis, the positional relationship 2
It is in. It should be noted that although similar processing is performed in the X-axis direction as well, description thereof will be omitted in this embodiment.

Next, the terminals are arranged by the first terminal position allocating means 8. In this case, if there is only the connection relationship between the blocks in the positional relationship 2, the processing by the first terminal position allocation means 8 is not performed, and the information is the second and third information.
Is sent to the fourth terminal position allocating means 11 via the terminal position allocating means 9 and 10, and each terminal position is determined by the fourth terminal position allocating means 11 by a method similar to the conventional one (step 1000). The processing by the terminal position determining means 13 ends. On the other hand, when there is an adjacent block in the positional relationship 1, a terminal to which a wiring connecting the two opposing sides of this block is connected and a terminal other than the wiring connecting the two opposing sides of this block are connected. First, the arrangement of terminals to which wirings other than the wirings that connect the opposite two sides are connected, considering the above-mentioned priority direction and the number of wirings (multiplicity) actually connected to the terminals. (Step 300). FIG. 4 shows a state in which this process is completed for blocks A and B.

Next, a second terminal position assignment means 9, projecting portions terminals in two opposing sides are not arranged in the X-axis or Y-axis, the overlap portion is a, that the length as L _a (step 400 ). Next, the relationship between the length L _a and the product of the wiring pitch M and the number N of wirings that connect two opposing sides is La _a > N.
It is determined whether M or L _a = N · M (steps 500 and 600).

When the relation of L _a > N · M is established, the terminal position is determined in the central part of the block side corresponding to the part a so that the wiring connecting the two opposite sides becomes a straight line (step 80).
0) and L _a = N · M, the terminal position is determined on the block side corresponding to part a so that the wiring connecting the two opposing sides becomes a straight line (step 90).
0). Next, the positional relationship 2 is calculated by the fourth terminal position assigning means 10.
The terminal position determination device determines the terminal position on the side that is connected only to the side (step 1000).
The process by 13 ends.

On the other hand, as a result of the determination by the second terminal position determining means described above,
When the relationship of L a _<N · M is satisfied, the third terminal position assigning means 10, first, in order to relationship L _a ≧ N · M, except two opposing sides already placed has been determined of the terminals of the wiring connecting the are connected (Figure 4 of the terminal P ₁ to P _7), it is moved in consideration of the number of wires to be connected to the fact that pin placement priority direction described above (step 700) . When the arrangement priority direction is the same, the terminal having a smaller number of wires connected to the terminal is preferentially moved. In FIG. 5, the terminal P ₂ is moved downward. After that, the positions of the terminals (terminals P _{8 to} P _{11 in} FIG. 5) are determined so that the wiring connecting the two sides is a straight line at the portion corresponding to the portion a on the two sides facing each other (step 800). Or step 900). Next, the fourth terminal position allocating means 11 determines the terminal position on the side connected to only the side having the positional relationship 2 (step 1000), and the processing by the terminal position determining device 13 ends.

The layout pattern output means 11 adds a predetermined wiring to the terminals whose layout has been determined by the above processing, and outputs the constructed layout pattern.
It is made into a drawing or displayed by (not shown). In addition,
In the layout pattern of FIG. 5, blocks A and B
The wirings L ₄ and L ₅ connecting between the wirings and the wiring L ₆ connecting the blocks A and D intersect each other, but either one of the wirings L ₄ , L ₅ or the wiring L ₆ is formed of, for example, polysilicon. The other is formed of, for example, a first layer aluminum wiring.

As described above, in the present embodiment, the linearization of the wiring connecting the adjacent blocks is given the highest priority, the other terminal positions are appropriately moved, and this is surely executed,
The distance between adjacent functional blocks having opposite sides can be minimized, and as a result, an optimum chip floor plan can be achieved.

FIG. 7 is a layout diagram showing an example of a positional relationship between blocks in an IC to which another embodiment of the present invention is applied, and FIG.
The figure is a flow chart showing the processing procedure in the other embodiment.

In the above-described embodiment, the target IC is a one-layer wiring IC, but this embodiment is a two-layer (or more) wiring IC.
The present invention is applied to.

In the case of the multilayer wiring IC, unlike the case of the above-described embodiment, it is possible to pass through the adjacent block and make an electrical connection with another block. In such a case, the following processing is performed and The same processing as that in the above embodiment is executed. That is, as shown in FIG. 7, when connecting the block E and block G the wiring L ₁₂ of the second layer is the wiring L ₁₂ passes through the upper block F, such a case, the A point where the wiring L ₁₂ and the side of the block F intersect with each other when viewed from above.
K ₁ , L ₂ (indicated by triangles in the figure) are virtual terminals,
Handle it in the same way as an input / output terminal. Therefore, when deciding the positions of the terminals P ₃₂ and P ₃₃ that connect the wirings connecting the block E and the block G, the positional relationships between the block E and the block F and between the block F and the block G are considered in consideration of the virtual position. The positions of the terminals K ₁ and K ₂ are determined by using them as a medium.

Wiring of the same type in the same layer cannot intersect, or
By design, prohibition information such that a wiring cannot be passed over a specific area of a certain block is input in advance through the input terminal 1. Next, the processing procedure of this embodiment will be described.

The processing procedure in the present embodiment is almost the same as the processing procedure in the above-described embodiment, except that step 1100 is newly added and step 1200 is provided instead of step 100.

Step 1100 is a step in which, when global wiring is performed, the wiring that has passed through the block is determined as a virtual terminal by finding a point where the wiring intersects the side of the block, and step 1200 is arranged not only for each terminal but also for each virtual terminal. This is the step of determining the priority direction. The subsequent steps are the same as those in the above-described embodiment. In this embodiment, the effect of the present invention and the effect of using the multi-layer wiring are synergized, and a chip floor plan with a minimum chip size can be achieved.

〔The invention's effect〕

As described above, the present invention preferentially determines the position of the terminal to which the wiring that connects the functional blocks that overlap when projected onto the X axis or the Y axis is connected so that the wiring is as straight as possible. As a result, it is possible to suppress an increase in the wiring area due to bending of the wiring, and it is possible to achieve an optimum chip floor plan.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a layout design method using a terminal position determining means 13 of a functional block which is an embodiment of the present invention, and FIG. 2 is a diagram for explaining a terminal arrangement priority direction. 3 to 5 are diagrams showing the layout state in the main steps when the layout design is performed using this embodiment, FIG. 6 is a flowchart showing the layout design procedure of this embodiment, and FIG. 7 is the book. A layout diagram showing an example of a positional relationship between blocks in an IC to which another embodiment of the invention is applied, FIG. 8 is a flowchart showing a processing procedure in the other embodiment, and FIG. 9 is an IC using CAD.
Flow chart showing the outline of the layout design procedure,
FIG. 10 is a diagram for explaining a conventional example of a method of determining the temporary terminal position, and FIG. 11 is a layout diagram showing an example of a layout pattern determined by the conventional example. 2 ... Block placement determining means, 3 ... Temporary terminal position determining means, 4 ... Wiring area calculating means, 5 ... Block spacing correcting means, 6 ... Terminal placement priority direction determining means, 7 ... Adjacent function block Relative position relationship determining means, 8 ... first terminal position assigning means, 9 ... second terminal position assigning means, 10 ... third terminal position assigning means, 11 ... fourth terminal position assigning means , 12 …… Layout pattern output means, 13 …… Terminal position determining means, 16 …… Overlapping part, 100 to 1200 …… steps, L _{1 to} L ₁₂ … wiring, A to G …… Function block, P ₁ to P ₇ , P ₂₈ , P ₂₉ ...... Input / output terminals connected to wirings other than the wiring connecting the two opposite sides, P _{8 to} P ₁₁ , P ₃₂ , P ₃₃ ...... Connected to wiring connecting the two opposite sides output terminals being, K _1, K ₂ ...... virtual terminal, a ...... adjacent functional blocks Overlapping portions in the case of projecting the portions where the terminal in two sides toward is not placed in the X-axis or Y-axis, the length of the portion of the L _a ...... _a.

Claims (1)

[Claims] 1. A terminal position deciding method for deciding a terminal position of a functional block such as a CPU and a register arranged on an XY plane, wherein each terminal located on a boundary side of each functional block is:
Arrangement priority direction determining means for determining an arrangement priority direction that serves as an index of a preferable arrangement position on the boundary side, and a pair of adjacent functional blocks having an interconnection relationship, the boundary side of each functional block is defined by the X-axis. Alternatively, when the projection is performed on the Y axis and the overlap occurs, the relative positional relationship of the pair of functional blocks is determined as the first positional relationship,
The adjacent functional block relative positional relationship discriminating unit that discriminates the second positional relationship when no overlap occurs, and at least each part of the pair of functional blocks having the first positional relationship faces each other on each boundary side. First terminal position assigning means for deciding positions of terminals to be arranged other than terminals to which wirings connecting the pair of blocks are connected, based on the arrangement priority direction; X on the side where no terminals are placed
The length L _a of the overlapping portion by projecting onto the axis or the Y axis,
When the length L _a is equal to or larger than the product of the number of wirings connecting between the set of blocks and the wiring pitch, the wiring is connected to the terminal connecting between the set of functional blocks. Second terminal position assigning means arranged in a portion where no terminals are arranged in each of the boundary sides so as to be as straight as possible, and the length L _a is the number of wirings connecting the one set of blocks and wiring. When it is smaller than the product of the pitch and the terminals other than the terminals to which the wires connecting between the set of blocks whose positions have already been determined are connected, the length L _a is equal to or more than the product of the number of wires and the wire pitch. And a terminal to which a wire connecting between the pair of blocks is connected is arranged in a portion where no terminal is arranged on each boundary side so that the wire is as straight as possible. Terminal position assignment Terminal position deciding method of functional block in IC having contact means.