JPH0644755B2 - Microprocessor synchronization method for data transmission system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Field of Industrial Application The present invention relates to a modem synchronization method in a data transmission system,
In particular, it relates to a method for synchronizing a multiprocessor modem with the operation of a terminal device.

For the purpose of providing MPU modems (hereinafter simply referred to as modems) used in data transmission systems with advanced processing functions 2
A method may be adopted in which multiple MPUs (microprocessors) are connected in parallel and the program is processed in parallel. In such a case, there is a condition that the transmission / reception operations of the above MPUs must be performed in synchronization. As a standard for this synchronization, the modulation speed of the modem becomes the standard,
A method of synchronizing each signal pulse with this modulation speed is adopted. On the other hand, there is a clock that requires high accuracy inside the modem. For example, in the case of 2400Hz, 2400Hz ± 0.01
High accuracy of up to% is required. Also, the modulation rate in the modem is expressed in units of Baud, Is defined by the relationship.

This modulation rate, that is, the baud rate (BaundRate) is expressed as a function in FBO, and hence the internal clock of the modem output by the MPU is expressed as FBO. Therefore, in the data transmission system, each device on the sending side, that is, the terminal is an FB.
It is necessary to operate based on O 2. For example
Looking at 2400Hz, each operation with a predetermined phase and amplitude must be performed between each MPU with 1 / 2400sec as one cycle. Therefore, it is necessary to synchronize with the FBO of the modem in order for the above devices to operate in a synchronized state.

(2) Conventional Technique FIG. 1 shows a conventional example of a multiprocessor type originating side control device in which two MPUs are connected in parallel to perform data processing. One of the two MPUs 1, 2 is the master MPU,
The other operates as a slave MPU. These MPUs 1 and 2 are connected in parallel to one bus line S1, and the master MPU1 and slave MPU2 are mutually connected by a signal line S2 to transmit and receive data. However, as shown in Fig. 1, when two processors are used in parallel connection, even if these processors 1 and 2 are said to be in parallel, there is always a master-slave relationship between them. To do. In Fig. 1 above, MP
U1 is the master and MPU2 is the slave. And the master MPU1
When is output in synchronization with FBO, slave MPU2 monitors this and operates in synchronization with master MPU1.

On the other hand, the data pulse transmitted from the terminal device side is C
It passes through the 100 series interface specified by CITT, V24, and is input to the MPU modem by clock operation in a state in which the phase is completely matched by the transmission timing signal (ST1) in the 100 series interface. Therefore, in order for the MPU modem to send this data pulse to another terminal device, the FBO signal of its own is sent to ST1.
In addition to synchronizing with the signal, the master MPU1 and the slave MPU2 must be synchronized with each other for data processing.
The synchronization control of the FBO signal and the ST1 signal at the time of transmitting the data is called "pull-in" of ST1, and is executed instantaneously, for example, when the transmission request signal RS is sent from the terminal device to the modem 10. .

Conventionally, ST1 pull-in in modem 10 is shown in Fig. 2 (a).
It was performed according to the time charts shown in (b) to (b).
In this figure, (a) shows the ST1 clock signal from the terminal device, and (b) shows the FBO which is a clock signal specific to the modem 10.
Indicates (1).

As shown in these (a) and (b), between the terminal device and the master MPU1 in the modem 10, the rising edge of ST1 is in a state ("1") after the rising edge of FBO (1) is completed. It is assumed that the phases match and a certain phase shift occurs between the two clocks.

As shown in (d), the master MPU1 monitors the state of "1" or "0" of ST1 according to the program, and repeats the monitoring until ST1 becomes "1" next time.

Assuming that the time point when ST1 changes from "0" to "1" is t1, t1 can be recognized by the position of the program that the master MPU1 runs, and the MPU1 is in the shaded area (h) in the program periodically. Corresponding time is given, and during this period, the time when ST1 converts from "0" to "1" is detected and captured. Then, at the time point t1, the rise of ST1 is confirmed.

Since the program of the master MPU1 runs in units of one FBO cycle (1/2400 sec in the above example), the time from the time t1 to the program end can be calculated. Now, let this time be A.

Since the ST1 cycle is already known from the bit transmitted from the terminal device side (1/9600 sec in the above example), from the time point t1 to the next time point when ST1 converts to "1" (t2 and It is possible to obtain the time until it does). Now, let B be that time.

Therefore, since FBO becomes "0" at the program end, it is possible to obtain C from B-A = C from the above. Therefore, by delaying the rising edge of the last block of the program P by C time, the modem 10 synchronizes with ST1. FBO (2) in (C) shows the state at this point, and once FBO (2) is reached, synchronization can be maintained by the PLL.

With the above procedure, the master MPU1 and the terminal device could be synchronized.However, in order to synchronize the master MPU1 and the slave MPU2 next time, the data between the master MPU1 and both members should be changed every time ST1 is pulled in above. Time C using transmission buses S1 and S2
Is sent to the slave MPU2, and the slave MPU2 follows this and extends the program to synchronize with the master MPU1.

(3) Problems to be Solved by the Invention However, in the method of synchronizing the master MPU1 and the slave MPU2 associated with the ST1 pull-in according to the related art, the program extension time C calculated in the master MPU1 is The data of was sent to the slave MPU2 in the form of so-called data transmission using the buses S1 and S2, so for the buses S1 and S2, it is used in a special way. Therefore, a special device must be provided in the circuit of the buses S1 and S2 in preparation for the occurrence of the synchronization event.
This leads to complexity of the device. In addition, the master MPU 1 separately outputs the information of the time C to the slave MP each time it outputs the information for synchronization.
There was the complication that it had to be sent to U2. Also, in order to send information for synchronization using the buses S1 and S2, the data transmission must be interrupted, which causes a problem that the data processing capability of the master and slave MPU1 and 2 decreases. .

(4) Means for Solving the Problems The present invention has been made by paying attention to the above-mentioned conventional problems, and an object thereof is to provide ST1 dedicated to synchronization between a plurality of MPUs in a multiprocessor modem. Set up a service line,
It is to solve the above-mentioned conventional problems by providing a method of synchronizing the MPU with improved bus utilization efficiency.

In order to achieve such an object, the present invention provides a transmission timing signal ST1 which is transmitted from a terminal device to the modem in a multiprocessor type modem having a master and a slave microprocessor and which performs a rising / falling operation. In order to synchronize the operation of the microprocessor with the operation of the terminal device, a signal line dedicated to transmitting the transmission timing signal is provided between the plurality of microprocessors. , When the rise of the transmission timing is detected, the microprocessor calculates the adjustment time for synchronizing with the terminal device by program processing, while the first microprocessor is dedicated to the second microprocessor corresponding to the slave. Of transmission timing through the signal line The gist is that the rising edge detection signal and the activation of the first microprocessor are transmitted to synchronize the second microprocessor.

(5) Action Because of this configuration, when the master MPU pulls in ST1, it is not necessary to give the information of the detected and calculated time to the slave MPU, and the slave MPU sends ST1 through the signal line.
It suffices to monitor the rise of the master MPU and the start of the synchronous operation of the master MPU, and the operation for the synchronization can be simplified and speeded up.

(6) Embodiment FIG. 3 shows a multiprocessor type control device having a master MPU and a slave MPU according to an embodiment of the present invention. The control device 20 has two MPUs 1 and 2 which are in a relationship of a master and a slave, and these MPUs 1 and 2 are connected in parallel to one bus line S1.
The MPU2 and the MPU2 are connected to each other by a signal line S2 to exchange data such as FBO. Further, a ST1 pull-in control signal line S3 is newly provided between the master MPU1 and the slave MPU2. Bus lines S1 and S2 are mainly used for normal data transmission with other terminal devices or CPUs, and signal lines
S3 is exclusively used to obtain synchronization between both master MPU1 and slave MPU2 due to ST1 pull-in between both MPUs.

The control device having such a configuration operates according to the time charts shown in FIGS. 2 (a) to (e). Of these, the time charts (a) to (d) have already been described for the above-mentioned conventional example, and therefore will be briefly described here.

First, the master MPU1 is the hatched part (h) of its own program P.
When the rising point t1 of ST1 is captured at, the time C for pulling in ST1 is calculated. Then master MPU1 is FB
In order to perform ST1 pull-in operation at O, FBO (1) is caused to perform a stretch operation for a time C, and FBO (2) is obtained. As a result, after detecting the rising edge of ST1 at time t1, the next time ST1 rises (time t2), the master MPU1's oscillation clock FBO also rises at the same time as ST1 at time t2.

On the other hand, when the ST1 rising edge is detected by the master MPU1, the control signal on the ST1 pull-in signal line S3 is shown in FIG.
As shown in (e), time C is output by the output from the master MPU1.
It changes from Hi to Low only during the period. The slave MPU2 constantly monitors the falling of the output signal from the master MPU1 in the (h) part of the program, interrupts its program if a falling edge occurs at time t1, and then outputs from the master MPU1. Wait for monitoring until the signal rises. Then, when the time C has passed, the slave MPU recognizes the rising of the output signal from the master MPU and restarts the execution of the interrupted program, so that the slave MPU can also synchronize with ST1 and FBO. it can.

When the ST1 and FBO are synchronized in this way, the three members, the terminal device, the master MPU1 and the slave MPU2, operate in synchronism, and thereafter, the program processing is performed with the correct phase relationship as shown in FIG. Is done. In addition, in this Figure 4, the transmission bit of ST1 is 9600 bits / sec, and the synchronization state in the case where the clock of FBO is 2400 Hz is shown.
ST1 4 bits are processed for one cycle of FBO.

5 and 6 show master MPU1 and slave, respectively.
7 is a flowchart showing ST1 pull-in operation in MPU2. As is clear from FIG. 5, in the master MPU1, the rising edge of ST1 is monitored in the process (h) in the program, and if there is a rising edge, the level of the ST1 pull-in control signal line S3 is changed from H to L, and the program The extension time C is calculated. Then, after the lapse of time C, the level of the ST1 pull-in control signal line S3 is changed from L to H and the operation of synchronizing with ST1 is performed.
It should be noted that when the rising monitor time of ST1 elapses a predetermined time, it is checked whether or not the time is up, and if the time is up, the process A,
That is, the ST1 pull-in process in the master MPU1 is completed. This is to prevent a long time from passing without being synchronized.

On the other hand, the slave MPU2 monitors whether or not there is a falling edge of the control signal passing through the signal line S3, and if there is a falling edge, monitors whether or not there is a next rising edge, and there is this rising edge. At this point, synchronize with the master MPU1. If the control signal does not fall for a predetermined time, the time is up and the process B, that is, the ST1 pull-in process in the slave MPU2 is completed.

(7) Effects of the Invention As described above, according to the present invention, in a multiprocessor type data transmission system having a plurality of MPUs having master and slave relationships, ST1 pull-in is provided between MPUs separately from a bus line. Since the ST1 signal is pulled in and synchronized by connecting the signal line of ST1 and switching the level of this signal line, it is not necessary to transmit the synchronization information from the master MPU to the slave MPU, and the operation is simple and the bus line is Can be effectively used. In addition, the software related to ST1 pull-in becomes easier and the program becomes shorter. Further, various effects can be obtained, such as a simple structure without the need for providing a control circuit for synchronization on the bus of the transmission circuit.

[Brief description of drawings]

FIG. 1 is a diagram showing a conventional example of a microprocessor type control device in which MPUs are connected in parallel, FIG. 2 is a timing diagram of the ST1 pull-in operation which is also used in the present invention and partly in the conventional art. FIG. 3 is a diagram showing a program control method for determining, FIG. 3 is a diagram showing the program control state between the master and slave MPUs of the present invention with respect to FIG. 1, and FIG. 4 is a terminal device side and MPU side in data transmission. Fig. 5 shows the relationship of clocks, and Fig. 5 shows the master for ST1 pull-in
The flow chart of the MPU, and Fig. 6 is the flow chart of the slave MPU for ST1 pull-in. 1 …… Master MPU 2 …… Slave MPU S1, S2 …… Bus line S3 …… ST1 Signal line for pull-in

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-57-204651 (JP, A) JP-A-56-90644 (JP, A) Actually developed JP-A-57-114439 (JP, U)

Claims (1)

[Claims] 1. In a multiprocessor type control device in which a plurality of microprocessors are connected in parallel to perform data processing, a microprocessor is connected to a terminal based on a transmission timing signal transmitted from the terminal device to the control device. A method of synchronizing with a device, wherein a signal line dedicated to pulling in a transmission timing signal is provided between the plurality of microprocessors, and in the first microprocessor, when the rising of the transmission timing is detected, the microprocessor is the terminal device. While obtaining the adjustment time for synchronization with the first microprocessor, the first microprocessor notifies the second microprocessor of the rise time of the transmission timing signal and the elapsed time of the adjustment time through the dedicated signal line. Data characterized by synchronizing the two microprocessors Micro processor synchronization method of the transmission system.