JPH0646792B2 - Same screen display method for different video signals - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a same screen display system for different kinds of video signals, that is, a display system for simultaneously displaying a plurality of video signals of different systems on the same screen. is there.

[Conventional technology]

2. Description of the Related Art Conventionally, as shown in FIG. 2, a display circuit of this type has a structure in which video signals S ₄ and S ₅ having different sampling structures are written in separate display memories 7 and 8 and then combined by a combining circuit 9 to form It was displayed on the screen.

[Problems to be solved by the invention]

In the above-mentioned conventional display method, since video signals having different sampling structures are written in different display memories, the number of display memories corresponding to the types of video signals is required, and a circuit for synthesizing them is required. Becomes Therefore,
There is a problem that many peripheral circuits are required and the circuit scale becomes large.

The present invention is intended to solve such a problem of the conventional one, and provides a same screen display system of different kinds of video signals using a single display memory and having a small circuit scale.

[Means for solving problems]

According to the present invention, a reference video signal and a second video signal having a different sampling structure from the reference video signal are written to the first FIFO memory for odd lines and the second FIFO for even lines for each line. , The first FIFO
An odd line signal read from the memory at twice the writing speed, and an even line signal read from the second FIFO memory at twice the writing speed;
The odd-line signal and the even-line signal are interpolated by averaging the odd-line signal, the even-line signal, and the interpolated signal for one screen according to a predetermined order so that the sampling structures are equal. Same screen display of different video signals, characterized by writing to a display memory, reading the contents of the display memory at a constant speed, and simultaneously displaying the reference video signal and the second video signal on the same screen. The method is used.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention, and FIG. 3 is a heterogeneous input video signal S handled in this system.
₁ and S ₂ , where S ₁ is a reference video signal that is a non-interlaced signal and S ₂ is a video signal that is an interlaced signal. FIG. The data structure, (b) shows the reference video signal S ₁ written into the display memory 6 from the FIFOs ₂ and 3, and (c) shows the video signal S ₂ written into the display memory. The two video signals S ₁ and S ₂ are switched by a switch,
It is sent to the spatial filter 1. The spatial filter 1 is an LPF for preventing the generation of aliasing noise, and can change the limiting band according to the thinning rate of the signal. The reference video signals S ₁ and S ₂ that have undergone the change of the limited band by the spatial filter 1 are divided into even-numbered lines and odd-numbered lines of the one-frame video signal, and the odd-numbered lines are stored in the FIFO memories 2 and 3 for each line, and the odd-numbered lines are FIFO 2 , Even lines are alternately written to the FIFO3. When writing to FIFO2,3, S ₁
The written as it is, for S _2, since the first field there is only even or odd lines of the signal, as shown on the left side of FIG. 2 (c), performs a decimation in the horizontal direction, one line of Writing is performed so that the number of pixels becomes 1/2 of S ₁ . Then, the signal S ₁ is alternately read at the same speed as the writing, and the signal S ₂ is alternately read at a speed twice that of the signal S ₁ .

The video signal for one line read from the FIFOs 2 and 3 is divided into a, b, and c and written into the display memory 6. a is an odd line signal read from the FIFO 2, c is an even line signal read from the FIFO 3, b is a and b obtained through the adder 4 and the coefficient unit 5.
Is an interpolated signal obtained by averaging.

For the reference signal S ₁ , a and c are alternately displayed on the display memory 6
To write, for S ₂ is a at twice speed _{S 1,} b,
c is written in order. Thus, it is possible that the number of vertical lines S ₂ to twice the S _1. Furthermore, S ₁ ,
When the numbers of lines of S ₂ are not equal, when writing to the display memory 6 so that the numbers of lines of S ₁ and S ₂ are equal,
The line of S ₂ is thinned out appropriately. For example, when S ₂ is larger than S ₁ , thinning is performed when writing S ₂ in the display memory 6. For example, when _{S 1} is the _{S 2} 500 at 400, _{S 2} also becomes a 400 line by omitting the writing of one line per five lines. When S ₂ is smaller than S _1, writing is performed twice when writing S ₂ in the display memory. For example, when S ₁ is 500 and S ₂ is 400, S ₂ becomes 500 lines by writing the same data twice for every 5 lines. When the number of pixels in one line is not equal, for example, the number of pixels in one line is made equal, so that for S ₂ , the signal of one pixel is written twice at a certain ratio.

As described above, S ₁ and S ₂ are written in the display memory 6 with the same sampling structure. By reading out the display memory 6 at a constant speed, S ₁ and S ₂ are simultaneously displayed on the same screen in the same size.

〔The invention's effect〕

As described above, according to the present invention, a display memory for one screen is used and video signals having different sampling structures are written in the same display memory, so that different video signals are simultaneously displayed on the same screen. Made it possible.

According to the present invention, the circuit scale can be made smaller than that of the conventional method, and the device can be made compact and the cost can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit configuration diagram showing an embodiment of the present invention, FIG. 2 is a configuration diagram showing a conventional display system, and FIG. 3 is a configuration and movement of different video signals S ₁ and S ₂ handled in this system. FIG. S ₁ , S ₂ ... input video signal, S ₃ ... output video signal, 1
...... Spatial filter, 2, 3 ...... FIFO type memory, 4 …… Adder, 5 …… Coefficient unit (K = 1/2), 6 …… Display memory, S ₄ , S ₅ …… Input video signal , S ₆ ... output video signal, 7, 8 ... display memory, 9 ... combination circuit.

Claims (1)

[Claims] 1. A reference video signal and a second video signal having a sampling structure different from that of the reference video signal are written to a first FIFO memory for odd lines and a second FIFO for even lines for each line. An odd line signal read from the first FIFO memory at twice the write speed, an even line signal read from the second FIFO memory at twice the write speed, and the odd line Signal and the interpolation signal obtained by averaging the signals of the even lines are used for displaying one screen according to a predetermined order so that the sampling structures of the odd line signal, the even line signal, and the interpolation signal are equal. Write to the memory, read the contents of the display memory at a constant speed,
The same screen display method for different kinds of video signals, wherein the reference video signal and the second video signal are simultaneously displayed on the same screen.